Altera Cyclone III LS FPGA User Manual

Cyclone III LS FPGA Development Kit

User Guide

101 Innovation Drive
San Jose, CA 95134

www.altera.com

Document Version: 1.0
Document Date: October 2009

Copyright © 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other
countries. All other product or service names are the property of their respective holders. Altera products are protected under numerous U.S. and foreign patents and pending ap­plications, maskwork rights, and copyrights. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty,
but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of
any information, product, or service described herein except as expressly agreed to in writing by Altera Corporation. Altera customers are advised to obtain the latest version of
device specifications before relying on any published information and before placing orders for products or services

.

UG-01071-1.0

Contents

Chapter 1. About This Kit

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1

Kit Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1

Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1

Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1

Chapter 2. Getting Started

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1

Before You Begin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1

Inspect the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1

References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1

Chapter 3. Software Installation

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–1

Installing the Altera Complete Design Suite . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–1

Licensing Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–1

Installing the Cyclone III LS FPGA Development Kit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–2

Installing the USB-Blaster Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–2

Chapter 4. Development Board Setup

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–1

Setting Up the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–1

Factory Default Switch Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–2

Chapter 5. Board Update Portal

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–1

Connecting to the Board Update Portal Web Page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–1

Using the Board Update Portal to Update User Designs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–2

Chapter 6. Board Test System

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–1

Preparing the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–3

Running the Board Test System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–3

October 2009 Altera Corporation Cyclone III LS FPGA Development Kit User Guide

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Using the Board Test System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–3

The Configure Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–4

The Config Tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–4

MAX-II Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–4

JTAG Chain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–6

Board Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–6

Flash Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–6

The GPIO Tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–6

Character LCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–7

User Dip Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–7

User LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–7

Pushbutton Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–8

The SRAM&Flash Tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–8

SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–8

Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–9

The DDR2 Tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–9

Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–10

Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–10

Stop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–10

Performance Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–10

Error Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–11

Number of addresses to write / read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–11

Data Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–11

Read/Write control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–11

The HSMC Tab . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–11

Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–12

Data Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–13

Error Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–13

Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–13

Stop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–13

Performance Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–13

The Power Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–13

MAX II Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–14

Power Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–15

Power Graph . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–15

Graph Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–15

Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–15

Calculating Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–15

Configuring the FPGA Using the Quartus II Programmer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–16

Appendix A. Programming the Flash Memory Device

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A–1

CFI Flash Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A–1

Preparing Design Files for Flash Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A–2

Creating Flash Files Using the Nios II EDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A–2

Programming Flash Memory Using the Board Update Portal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A–3

Programming Flash Memory Using the Nios II EDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A–3

Restoring the Flash Device to the Factory Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A–4

Restoring the MAX II CPLD to the Factory Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A–5

Additional Information

Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–1

How to Contact Altera . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–1

Cyclone III LS FPGA Development Kit User Guide October 2009 Altera Corporation

Typographic Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–1

v

October 2009 Altera Corporation Cyclone III LS FPGA Development Kit User Guide

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Cyclone III LS FPGA Development Kit User Guide October 2009 Altera Corporation

Introduction

Kit Features

1. About This Kit

The Altera® Cyclone® III LS FPGA Development Kit is a complete design
environment that includes both the hardware and software you need to develop
Cyclone III LS FPGA designs. The board and the one-year license for
software provide everything you need to begin developing custom Cyclone III LS
FPGA designs. The following list describes what you can accomplish with the
dev

elopment kit:

 Develop and test memory subsystems consisting of DDR2 memory

 Take advantage of the modular and scalable design by using the high-speed

mezzanine card (HSMC) connectors to interface to over 20 different HSMCs
provided by Altera partners

the Quartus® II

This section briefly describes the Cyclone III LS FPGA Development Kit contents.

Hardware

 Cyclone III LS FPGA development board—A development platform that allows

you to develop and prototype hardware designs running on the Cyclone III LS
EP3CLS200 FPGA.

 For detailed information about the board components and interfaces, refer to the

Cyclone III LS FPGA Development Board Reference Manual.

 Power supply and cables—The development kit includes the following items:

 Power supply and AC adapters for North America/Japan, Europe, and the

United Kingdom

 USB cable

 Ethernet cable

Software

 Altera Complete Design Suite DVD—A DVD that includes the following items:

 Quartus II Software—The Quartus II software, including the SOPC Builder

system development tool, provides a comprehensive environment for
system-on-a-programmable-chip (SOPC) design. The Quartus II software
integrates into nearly any design environment and provides interfaces to
industry-standard EDA tools.

© October 2009 Altera Corporation Cyclone III LS FPGA Development Kit User Guide

1–2 Chapter 1: About This Kit

Kit Features

f The kit includes a development kit edition (DKE) license for the Quartus II

software (Windows platform only). This license entitles you to all the
features of the subscription edition for a period of one year. After the year,
you must purchase a renewal subscription to continue using the software.
For more information, refer to the Altera website (www.altera.com).

 MegaCore

®

IP Library—A library that contains Altera IP MegaCore functions.
You can evaluate MegaCore functions by using the OpenCore Plus feature to
do the following:

 Simulate behavior of a MegaCore function within your system

 Verify functionality of your design, and quickly and easily evaluate its size

and speed

 Generate time-limited device programming files for designs that include

MegaCore functions

 Program a device and verify your design in hardware

1 The OpenCore Plus hardware evaluation feature is an evaluation tool for

prototyping only. You must purchase a license to use a MegaCore function
in production.

f For more information about OpenCore Plus, refer to AN 320: OpenCore

Plus Evaluation of Megafunctions.

 Nios

®

II Embedded Design Suite (EDS)—A full-featured set of tools that allow
you to develop embedded software for the Nios II processor which you can
include in your Altera FPGA designs.

 Cyclone III LS FPGA Development Kit CD-ROM—A CD-ROM that includes all

the documentation and design examples for the kit.

f Use the following links to check the Altera website to ensure you have the latest

software versions:

 For the Altera Complete Design Suite, refer to the Quartus II Subscription Edition

Download page.

 For the Cyclone III LS FPGA Development Kit, refer to the Cyclone III LS FPGA

Development Kit page.

Cyclone III LS FPGA Development Kit User Guide © October 2009 Altera Corporation

Introduction

f For complete information about the development board, refer to the Cyclone III LS

2. Getting Started

This user guide leads you through the following Cyclone III LS FPGA development
board setup steps:

 Inspecting the contents of the kit

 Installing the Altera Complete Design Suite DVD software

 Setting up, powering up, and verifying correct operation of the development

board

 Configuring the Cyclone III LS FPGA

 Running the Board Test System designs

FPGA Development Board Reference Manual.

Before You Begin

Before using the kit or installing the software, check the kit contents and inspect the
board to verify that you received all of the items listed in this section. If any of the
items are missing, contact Altera before you proceed.

Inspect the Board

To inspect the board, perform the following steps:

1. Place the board on an anti-static surface and inspect it to

2. Verify that all components are on the board and appear intact.

1 In typical applications with the Cyclone III LS FPGA development board, a heat sink

is not necessary. However, under extreme conditions or for engineering sample silicon
the board might require additional cooling to stay within operating temperature
guidelines. You can perform power consumption and thermal modeling to determine
whether your application requires additional cooling.

f For more information about power consumption and thermal modeling, refer to

AN 358: Thermal Management for FPGAs.

ensure that it has not been

damaged during shipment.

c Without proper anti-static handling, you can damage the board.

References

Use the following links to check the Altera website for the following other related
information:

© October 2009 Altera Corporation Cyclone III LS FPGA Development Kit User Guide

2–2 Chapter 2: Getting Started

 For the latest board design files and reference designs, refer to the Cyclone III LS

References

FPGA Development Kit page.

 For additional daughter cards available for purchase, refer to the Development

Board Daughtercards page.

 For the Cyclone III LS device documentation, refer to the Literature: Cyclone III

Devices page.

 To purchase devices from the eStore, refer to the Devices page.

 For Cyclone III LS OrCAD symbols, refer to the Capture CIS Symbols page.

 For Nios II 32-bit embedded processor solutions, refer to the Embedded

Processing page.

Cyclone III LS FPGA Development Kit User Guide © October 2009 Altera Corporation

Introduction

This section explains how to install the following software:

 Altera Complete Design Suite

 Cyclone III LS FPGA Development Kit

 USB-Blaster™ driver

Installing the Altera Complete Design Suite

The Altera Complete Design Suite provides the necessary tools used for developing
hardware and software for Altera FPGAs. Included on the Altera Complete Design
Suite DVD are the Quartus II software and the Nios II EDS. The Quartus II software
(

including SOPC Builder) and the Nios II EDS are the primary FPGA development

tools u

sed to create the reference designs in this development kit. To install the Altera

software tools, perform the following steps:

3. Software Installation

1. Insert the Altera Complete Design Suite DVD into your computer.

2.

Follow the installer instructions to complete the installation process.

f If you have difficulty installing the Quartus II software, refer to the Quartus II

Installation & Licensing for Windows and Linux Workstations.

Licensing Considerations

Before using the Quartus II software, you must request a license file from the Altera

Licensing page on the Altera website and install it on your computer. When you

request a license file, Altera emails you a license.da

To license the Quartus II software, you need your computer’s network interface card
(N

IC) ID, a number that uniquely identifies your computer. On the computer you’ll

use to run the Quartus II software, type ipconfig /all at a command
determine the NIC ID. Your NIC ID is the 12-digit hexadecimal number on the
Physical Address line.

To obtain a license, perform the following steps.

1. Go to the Get M

2. Under Development Kit Licenses Request, click Licenses for RoHS-Compliant
Kits.

3. Follow the on-screen instructions to request your license. Altera sends you a
license file through email.

t file that enables the software.

prompt to

y Altera License page on the Altera website.

4. To install your license, refer to Specifying the License File in Quartus II Installation &

Licensing for Windows and Linux Workstations.

© October 2009 Altera Corporation Cyclone III LS FPGA Development Kit User Guide

3–2 Chapter 3: Software Installation

<install dir>

cycloneIIILS_3cls200_fpga

documents

board_design_files

The default Windows installation directory is C:\altera\

<version>

\.

examples

factory_recovery

demos

kits

Installing the Cyclone III LS FPGA Development Kit

Installing the Cyclone III LS FPGA Development Kit

To install the Cyclone III LS FPGA Development Kit, perform the following steps:

1. Insert the Cyclone III LS FPGA Development

Kit CD-ROM into your computer.

1 The CD-ROM should start an auto-install process. If it does not, browse to

the CD-ROM drive and double-click on the setup.exe file.

2. Follow the on-screen instructions to complete the installation process.

The installation program creates the dir

ectory structure for the Cyclone III LS FPGA

Development Kit files shown in Figure 3–1.

Figure 3–1. Cyclone III LS FPGA Development Kit Installed Directory Structure

Tab le 3–1 lists the file directory names and a description of their contents.

Table 3–1. Installed Directory Contents

Directory Name Description of Contents

board_design_files Contains schematic, layout, assembly, and bill of material board design files. Use these files as a

starting point for a new prototype board design.

demos Contains demonstration applications.

documents Contains the development kit documentation.

examples Contains the sample design files for the Cyclone III LS FPGA Development Kit.

factory_recovery Contains the original data programmed onto the board before shipment. Use this data to restore

the board with its original factory contents.

Installing the USB-Blaster Driver

The Cyclone III LS FPGA development board includes integrated USB-Blaster
circuitry for FPGA programming. However, for the host computer and board to
communicate, you

f Ins

Cyclone III LS FPGA Development Kit User Guide © October 2009 Altera Corporation

tallation instructions for the USB-Blaster driver for your operating system are
available on the Altera website. On the Altera Programming Cable Driver Information
page of the Altera website, locate the table entry for your configuration and click the
link to access the instructions.

must install the USB-Blaster driver on the host computer.

Introduction

The instructions in this chapter explain how to set up the Cyclone III LS FPGA
development board.

Setting Up the Board

To set up and power up the board, perform the following steps:

1. The Cyclone III LS FPGA development board ships with its board switches

pr

econfigured to support the example designs in the development kit. If you
suspect your board might not be currently configured with the default settings,
follow the instructions in “Factory Default Switch Settings” on page 4–2 to return
the board to its factory settings before proceeding.

2. The development board ships with example designs stored in the flash memory
device. Verify the PGM/USER LOAD switch (SW2.6) is set to the on position to
load the design stored in the factory portion of flash memory. Figure 4–1 shows the
switch location on the Cyclone III LS FPGA development board.

4. Development Board Setup

3. Connect the DC adapter (+16 V, 3.75 A) to the DC power jack (J5) on the FPGA
board and plug the cord into a power outlet.

c Use only the supplied power supply. Power regulation circuitry on the

board can be damaged by power supplies with greater voltage.

4. Set the POWER switch (SW1) to the on position. When power is supplied to the
board, a blue LED (D3) illuminates indicating that the board has power.

The MAX II device on the board contains a parallel flash loader
When the board powers up, the PFL reads one of two designs from flash memory and
configures the FPGA. The PGM/USER LOAD switch (SW2.6) controls which design
to load. When the switch is in the on position, the PFL loads the design from the
factory portion of flash memory. When the switch is in the off position, the PFL loads
the design from the user portion of flash memory.

1 The devel

dir>\kits\cycloneIIILS_3cls200_fpga\examples\max2 directory.

When configuration is complete, the CONF DONE LED (D14) illuminates, signaling
that the Cyclone III LS device configured successfully. If the
Quartus II software INIT_DONE option on, the
illuminates when the device enters user mode.

opment kit includes the MAX II configuration design in the <install

FPGA INIT DONE LED (D14)

(PFL) megafunction.

loaded design has the

f For mor

Flash Loader with the Quartus II Software.

© October 2009 Altera Corporation Cyclone III LS FPGA Development Kit User Guide

e information about the PFL megafunction, refer to AN 386: Using the Parallel