Altera Cyclone III FPGA Starter Board User Manual

101 Innovation Drive
San Jose, CA 95134
www.altera.com

Cyclone III FPGA Starter Board

Reference Manual

Document Version: 1.4
Document Date: April 2012

© 2012 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are
Reg. U.S. Pat. & Tm. Off. and/or trademarks of Altera Corporation in the U.S. and other countries. All other trademarks and service marks are the
property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its semiconductor produc ts
to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any
time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described
herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for products or services.

Part Number MNL-01016-1.4

ii 0 Altera Corporation
Cyclone III FPGA Starter Board Reference Manual April 2012

Contents

Chapter 1. Introduction

General Description ............................................................................................................................... 1–1

Board Component Blocks ................................................................................................................ 1–2

Block Diagram .................................................................................................................................. 1–3

Handling the Board ............................................................................................................................... 1–3

Chapter 2. Board Components and Interfaces

Board Overview ..................................................................................................................................... 2–1

Featured Device ..................................................................................................................................... 2–5

Clocking Circuitry ................................................................................................................................. 2–6

Jumpers ................................................................................................................................................... 2–7

Interfaces ................................................................................................................................................. 2–8

USB Interface ..................................................................................................................................... 2–8

HSMC Expansion Connector .......................................................................................................... 2–9

General User Interfaces ................................................................................................................. 2–10

Push-Buttons .............................................................................................................................. 2–11

LEDs ............................................................................................................................................ 2–12

Memory ................................................................................................................................................. 2–13

Parallel Flash ................................................................................................................................... 2–13

DDR SDRAM .................................................................................................................................. 2–15

SSRAM ............................................................................................................................................. 2–17

Power Supply ....................................................................................................................................... 2–19

Statement of China-RoHS Compliance ............................................................................................ 2–20

Additional Information

Revision History ............................................................................................................................... Info–i

How to Contact Altera ..................................................................................................................... Info–i

Typographic Conventions .............................................................................................................. Info–ii

Altera Corporation iii
April 2012 Preliminary

Contents Stratix Device Handbook, Volume 1

iv Altera Corporation

Preliminary April 2012

1. Introduction

General Description

The Cyclone®III starter board provides a hardware platform that offers a
unique opportunity to customize your development environment via
expansion connectors and daughtercards, as well as evaluate the

®

feature-rich, low-power Altera

Cyclone III device.

For more functionality, you can expand the starter board through

®

daughtercards connected to the Altera

High Speed Mezzanine Card

(HSMC) connector.

f For the latest information about available HMSC daughtercards, go to

www.altera.com/products/devkits/kit-index.html.

The main features of the Cyclone III starter board are:

■ Low-power consumption Altera Cyclone III EP3C25 chip in a

324-pin FineLine BGA (FBGA) package

■ Expandable through HSMC connector

■ 32-megabyte (MB) DDR SDRAM

■ 16-MB parallel flash device for configuration and storage

■ 1-MB high-speed SSRAM memory

■ Four user push-button switches

■ Four user LEDs

The main advantages of the Cyclone III starter board are:

■ Facilitates a fast and successful FPGA design experience with

example designs and demonstrations.

■ Directly configure and communicate with the Cyclone III device via

the on-board USB-Blaster

■ Active parallel flash configuration

■ Low power consumption

■ Cost-effective modular design

™

circuitry and JTAG header

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April 2012 Preliminary

General Description

Board Component Blocks

■ Altera Cyclone III EP3C25F324 FPGA

● 25K logic elements (LEs)

● 66 M9K memory blocks (0.6 Mb)

● 16 18x18 multiplier blocks

● Four PLLs

● 214 I/Os

■ Clock management system

● One 50-MHz clock oscillator to support a variety of protocols

● The Cyclone III device distributes the following clocks from its

on-board PLLs:

• DDR clock

• SSRAM clock

• Flash clock

■ HSMC connector

● Provides 12 V and 3.3 V interface for installed daughtercards

● Provides up to 84 I/O pins for communicating with HSMC

daughtercards

■ General user-interface

● Four user LEDs

● Two board-specific LEDs

● Push-buttons:

• System reset

• User reset

• Four general user push-buttons

■ Memory subsystem

● Synchronous SRAM device

• 1-MB standard synchronous SRAM

• 167-MHz

• Shares bus with parallel flash device

● Parallel flash device

• 16-MB device for active parallel configuration and storage

• Shares bus with SRAM device

● DDR SDRAM device

• 56-pin, 32-MB DDR SDRAM

• 167-MHz

• Connected to FPGA via dedicated 16-bit bus

■ Built-in USB-Blaster interface

● With the Altera EPM3128A CPLD

● For external configuration of Cyclone III device

● For system debugging with the SignalTap

debugging console

● Communications port for Board Diagnostic graphical user

interface (GUI)

®

and Nios®

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Cyclone III FPGA Starter Board Reference Manual April 2012

Introduction

Block Diagram

Figure 1–1 shows a functional block diagram of the Cyclone III FPGA

starter board.

Figure 1–1. Cyclone III FPGA Starter Board

HSMC

84

Handling the Board

Switches

4

LEDs

4

4

4

Cyclone III
EP3C25F324

4

USB

Blaster

DDR

32MB

Parallel Flash

72

42

16MB

SSRAM

1MB

When handling the board, it is important to observe the following
precaution:

c Static Discharge Precaution—Without proper anti-static handling,

the board can be damaged. Therefore, use anti-static handling
precautions when touching the board.

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April 2012 Cyclone III FPGA Starter Board Reference Manual

Handling the Board

1–4 Altera Corporation
Cyclone III FPGA Starter Board Reference Manual April 2012

2. Board Components and Interfaces

Board Overview

f For information on powering-up the Cyclone III FPGA starter board and

This chapter provides operational and connectivity detail for the board’s
major components and interfaces and is divided into the following major
blocks:

■ Featured device

■ Clocking circuitry

■ Jumpers

■ Interfaces

● USB interface

● Altera

● General user interfaces

■ Memory

■ Power supply

■ Statement of China-RoHS compliance

®

HSMC expansion connector

1 The board schematics, physical layout database, and

®

manufacturing files for the Cyclone

III FPGA starter board are
included in the Cyclone III FPGA Starter Kit in the following
directory:

<install path>\cycloneIII_3c25_start\board_design_files

installing the demonstration software, refer to the Cyclone III FPGA
Starter Kit User Guide.

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April 2012 Preliminary

Board Overview

Cyclone III Device (U1)

User Push Button Switches

User LEDs

USB
UART (U8)

HSMC
Connector (J1)

DC Power
Input (J2)

Power Switch
(SW1)

USB
Connector
(J3)

Configuration Done LED

32-MB
DDR SDRAM (U4)

Flash LED

1-MB SSRAM (U5)

50-MHz

System Clock

Reconfigure

and Reset

Push Buttons

16-MB

Parallel

Flash (U6)

JTAG Header (J4)

2.5 V I/O Power
Measurement (JP3)

FPGA Core Power
Measurement (JP6)

Figure 2–1 shows the top view of the Cyclone III FPGA starter board.

Figure 2–1. Top View of the Cyclone III FPGA Starter Board

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Cyclone III FPGA Starter Board Reference Manual April 2012