Altera Cyclone II EP2C35 PCI Development Board User Manual
101 Innovation Drive
San Jose, CA 95134
(408) 544-7000
www.altera.com
Cyclone II EP2C35
PCI Development Board
Reference Manual
Development Board Version: 1.0.0
Document Version: 1.0.0
Document Date: May 2005
Copyright © 2005 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and
service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holders. Altera products are protected under numerous U.S. and foreign patents and pending applications, maskwork rights, and copyrights. Altera warrants
performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make
changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera
Corporation. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.
Part Number MNL-CII021805-1.0
Development Board Version 1.0.0 Altera Corporation
Cyclone II EP2C35 PCI Development Board Reference Manual Preliminary May 2005
Contents
About This Manual
How to Contact Altera .............................................................................................................................. v
Typographic Conventions ........................................................................................................................ v
Chapter 1. Introduction
General Description ............................................................................................................................... 1–1
Components ...................................................................................................................................... 1–1
Block Diagram .................................................................................................................................. 1–3
Handling the Board ............................................................................................................................... 1–4
Chapter 2. Board Components & Interfaces
Board Overview ..................................................................................................................................... 2–1
Component Operation .......................................................................................................................... 2–4
Cyclone II Device .............................................................................................................................. 2–4
PCI & PCI-X Bus Support & Compatibility .................................................................................. 2–4
Memory .............................................................................................................................................. 2–5
Clocks & Clock Distribution ........................................................................................................... 2–6
Power ................................................................................................................................................. 2–7
LEDs ................................................................................................................................................... 2–9
Board DIP Switch Settings ............................................................................................................ 2–11
Push-Button Switches .................................................................................................................... 2–13
Interface Operation .............................................................................................................................. 2–14
Altera Daughter Card (PROTO1) Interface ................................................................................ 2–14
10/100 Ethernet .............................................................................................................................. 2–14
RS-232 Serial Interface ................................................................................................................... 2–15
AS Interface ..................................................................................................................................... 2–15
JTAG ................................................................................................................................................. 2–15
SignalTap II Logic Analyzer ......................................................................................................... 2–15
Mictor Probe .................................................................................................................................... 2–15
Chapter 3. Using the Board
Introduction ............................................................................................................................................ 3–1
Apply Power to the Board .................................................................................................................... 3–1
Configure the Cyclone II Device ......................................................................................................... 3–2
Serial Flash Configuration .............................................................................................................. 3–2
JTAG Configuration ......................................................................................................................... 3–3
Program the Serial Flash Memory ....................................................................................................... 3–3
Active Serial Programming ............................................................................................................. 3–5
In-System Programming via the JTAG & the SFL Solution
(User-Programmable EPCS64 Device Only) ................................................................................ 3–7
Configure the Board for Bench-Top Operation ................................................................................. 3–8
Altera Corporation i
May 2005 Preliminary
Contents Cyclone II EP2C35 PCI Development Board Reference Manual
Chapter 4. Pin-Outs & Signal Specifications
Introduction ............................................................................................................................................ 4–1
PCI & PCI-X Bus Interfaces .................................................................................................................. 4–1
Memory ................................................................................................................................................... 4–5
DDR2 SDRAM Memory .................................................................................................................. 4–5
I/O & Serial I/O .................................................................................................................................... 4–8
10/100 Ethernet ................................................................................................................................ 4–8
RS-232 Serial Interface ................................................................................................................... 4–11
Configuration ....................................................................................................................................... 4–11
JTAG Header ................................................................................................................................... 4–11
AS Interface Header ....................................................................................................................... 4–12
EPCS64 Serial Flash Interface ....................................................................................................... 4–12
Control & User Settings ...................................................................................................................... 4–13
User LEDs ........................................................................................................................................ 4–13
DIP Switch Bank Board & User Settings ..................................................................................... 4–13
Push-Button Switches .................................................................................................................... 4–14
Altera Daughter Card & Mictor Probe ............................................................................................. 4–15
ii Altera Corporation
Preliminary May 2005
About This Manual
This manual provides comprehensive information about the Altera®
Cyclone™II EP2C35 PCI Development Board.
How to Contact
Altera
For the most up-to-date information about Altera products, go to the
Altera world-wide web site at www.altera.com. For technical support on
this product, go to www.altera.com/mysupport. For additional
information about Altera products, consult the sources shown below.
Information Type USA & Canada All Other Locations
Technical support www.altera.com/mysupport/ www.altera.com/mysupport/
(800) 800-EPLD (3753)
(7:00 a.m. to 5:00 p.m. Pacific Time)
Product literature www.altera.com www.altera.com
Altera literature services literature@altera.com literature@altera.com
Non-technical customer
service
FTP site ftp.altera.com ftp.altera.com
Typographic
(800) 767-3753 + 1 408-544-7000
This document uses the typographic conventions shown below.
+1 408-544-8767
7:00 a.m. to 5:00 p.m. (GMT -8:00)
Pacific Time
7:00 a.m. to 5:00 p.m. (GMT -8:00)
Pacific Time
Conventions
Visual Cue Meaning
Bold Type with Initial
Capital Letters
bold type External timing parameters, directory names, project names, disk drive names,
Italic Type with Initial Capital
Letters
Command names, dialog box titles, check box options, and dialog box options are
shown in bold, initial capital letters. Example: Save As dialog box.
filenames, filename extensions, and software utility names are shown in bold
type. Examples: f
Document titles are shown in italic type with initial capital letters. Example: AN 75:
High-Speed Board Design.
, \qdesigns directory, d: drive, chiptrip.gdf file.
MAX
Altera Corporation iii
May 2005 Preliminary
Typographic Conventions Cyclone II EP2C35 PCI Development Board Reference Manual
Visual Cue Meaning
Italic type Internal timing parameters and variables are shown in italic type.
Examples: t
PIA
, n + 1.
Variable names are enclosed in angle brackets (< >) and shown in italic type.
Example: <file name>, <project name>.pof file.
Initial Capital Letters Keyboard keys and menu names are shown with initial capital letters. Examples:
Delete key, the Options menu.
“Subheading Title” References to sections within a document and titles of on-line help topics are
shown in quotation marks. Example: “Typographic Conventions.”
Courier type Signal and port names are shown in lowercase Courier type. Examples: data1,
tdi, input. Active-low signals are denoted by suffix n, e.g., resetn.
Anything that must be typed exactly as it appears is shown in Courier type. For
example:
c:\qdesigns\tutorial\chiptrip.gdf. Also, sections of an
actual file, such as a Report File, references to parts of files (e.g., the AHDL
keyword
SUBDESIGN), as well as logic function names (e.g., TRI) are shown in
Courier.
1., 2., 3., and
a., b., c., etc.
● • Bullets are used in a list of items when the sequence of the items is not important.
■
Numbered steps are used in a list of items when the sequence of the items is
important, such as the steps listed in a procedure.
v The checkmark indicates a procedure that consists of one step only.
1 The hand points to information that requires special attention.
The caution indicates required information that needs special consideration and
c
understanding and should be read prior to starting or continuing with the
procedure or process.
The warning indicates information that should be read prior to starting or
continuing the procedure or processes
r The angled arrow indicates you should press the Enter key.
f The feet direct you to more information on a particular topic.
iv Altera Corporation
Preliminary May 2005
1. Introduction
General Description
The Cyclone™II EP2C35 PCI Development Board provides a hardware
platform for developing and prototyping high-speed PCI and PCI-X bus
interfaces, double data rate 2 (DDR2) SDRAM, and the 10/100 Ethernet
interface.
®
Based on Cyclone II FPGAs and using Altera
MegaCore® functions or
Altera Megafunction Partners Program (AMPPSM) megafunctions, the
Cyclone II EP2C35 PCI Development Board allows users to quickly solve
design problems that typically require time-consuming, custom
solutions.
The board supports the EP2C35F672 Cyclone II device, which is
optimized for high-bandwidth DSP functions. The board also supports
the PCI Local Bus Specification, Revision 3.0 and PCI-X, Revision 2.0 mode 1.
Altera provides a DDR2 SDRAM reference design for use as either a
design starting point or an experimental platform. The reference design is
designed and tested by Altera engineers and distributed with the PCI
Development Kit, Cyclone II Edition (ordering code: PCI-DEVKIT-2C35).
f For more information on the DDR2 SDRAM reference design, refer to
AN 390: PCI-to-DDR2 SDRAM Reference Design.
Components
The board provides the following components:
■ Short-form universal PCI (3.3 or 5.0 V) card
● 32 or 64-bit PCI bus operating at 33 or 66 MHz
● 32 or 64-bit PCI-X bus operating at 66 or 100 MHz
■ Memory
● Two 32-MByte DDR2 SDRAM devices
● EPCS64 devices
■ FPGA device configuration
● Switch-selectable on power-up, choose one of two serial
configuration devices (EPCS64 devices). One device contains
the pre-loaded factory default design, and the other device is for
user-programming. Configuration data is downloaded via the
™
USB-Blaster
■ Flexible clocking options
● Socketed 100-MHz high-speed clock oscillator
● SMA connector clock input
Altera Corporation Core Version a.b.c variable 1–1
May 2005 Preliminary
download cable.
General Description
■ Switches and indicators
● Two user-definable push-button switches
● Five-position, user-definable dual in-line package (DIP) switch
bank
● Eight user-definable LEDs
● Power and configuration status LEDs
● Serial port TX/RX activity LEDs
● Ethernet LEDs (integrated in RJ45 connector)
● Configuration done and status LEDs
● Configuration source (local/user) toggle switch
■ Flexible power options
● PCI connector
● External power supply via laptop power supply cable
■ Expansion & Debugging Interfaces
● Joint Test Action Group (JTAG) interface connector
● 32-bit Mictor probe connector
● Altera Daughter Card (PROTO1)
● 10/100 Ethernet (RJ-45 connector)
● Serial RS-232 (DB-9 connector)
1–2 Core Version a.b.c variable Altera Corporation
Cyclone II EP2C35 PCI Development Board Reference Manual May 2005
Block Diagram
Figure 1–1 shows the board’s block diagram.
Figure 1–1. PCI Development Board, Cyclone II Edition Block Diagram
PCI, PCI-X
Connector
Introduction
PCI Bus Switches
64-MByte DDR2
SDRAM Memory
Altera Daughter
Card (PROTO1)
Mictor Probe
Debug Connector
10/100 Ethernet
JTAG Connector
External Power
Connector
+16 V DC INPUT
PCI Edge
Connector
+3.3V
RS-232
Powe r
Regulators
EP2C35F672
Cyclone II
Device
+3.3 V
+1.8 V
+1.2 V
Power LEDs
High-Speed Clock Oscillator
SMA Clock Connector
Pushbutton Switches
DIP Switch Settings
User DIP switches
Jumpers
Status LEDs
User LEDs
EPCS64 Safe Flash
Serial Programmer
To gg l e
Switch
Active Serial
Configuration
EPCS64 User Flash
Serial Programmer
Altera Corporation Core Version a.b.c variable 1–3
May 2005 Cyclone II EP2C35 PCI Development Board Reference Manual
Handling the Board
Handling the
Board
When handling the board, it is important to observe the following
precaution:
Static discharge precaution—Without proper anti-static handling
the board can be damaged. Therefore, take anti-static
precautions while handling the board.
1–4 Core Version a.b.c variable Altera Corporation
Cyclone II EP2C35 PCI Development Board Reference Manual May 2005
2. Board Components & Interfaces
Board Overview
This chapter provides operational and connectivity detail for the board’s
major components and interfaces.
f For pin-outs and signal specifications, refer to Chapter 4, Pin-Outs &
Signal Specifications.
™
Figure 2–1 shows a top view of the Cyclone
Board.
Figure 2–1. Cyclone II EP2C35 PCI Development Board Major Components & Interfaces
Reconfigure
User Push-
Button Switches
Configuration
Status LED
(D10 Botton Red)
Configuration
Done LED
(D10 Top Green)
EPCS64 Device
Select Switch (J3)
User (Down) & Safe (Up)
JTAG Connector (J8)
SMA Clock (J5)
10/100 Ethernet
Connector (RJ1)
Power Indicators
(D13 through D15)
RS-232 (J12)
RS-232 Tx LED(D18)
RS-232 Rx LED (D17)
(S1, S5)
Push-Button
Switch (S2)
User LEDs
(D1 through D8)
Power Switch
(SW1)
PCI Connector (J13)
Cyclone II Device (U9)
User
Reset
(S3)
Mictor Probe
Connector (J4)
10/100 Ethernet
MAC/PHY (U3)
User DIP Switch
Bank (S4)
PCI Level Converters
(U13 through U17)
(U20 through U24 on back)
Altera Daughter
Card Interface
(J1, J6, J7)
II EP2C35 PCI Development
Power Supply Input
Ground Test Point (TP1)
VREF Test Point (TP4)
User-Programmable
EPCS64 Device (U7)
Safe (Factory-Programmed)
EPCS64 Device
(U19 on back)
Active Serial
Interface
Connector (J11)
DDR2 SDRAM
(U6, U10)
Altera Corporation Core Version 4.0.0 2–1
May 2005 Preliminary
Board Overview
Table 2–1 lists the board’s major components and interfaces.
Table 2–1. Cyclone II EP2C35 PCI Development Board Components & Interfaces (Part 1 of 2)
Type
FPGA Cyclone II device U9 The EP2C35F672 device is installed on the board for the
PCI, PCI-X PCI connector J13 Universal PCI and PCI-X bus interfaces. Refer to
Memory DDR2 SDRAM U6, U10 167 MHz, 32-MByte DDR2 SDRAM
Configuration User and local-serial
Clock High-speed clock
Control User reset push-
User settings User push-button
Component/
Interface
PCI level converters U13 through
FLASH memory
JTAG connector J8 JTAG test and control as well as USB-Blaster
Active serial (AS)
connector
Configuration status
LED
Configuration done
LED
oscillator
SMA clock J5 Clock input.
Ethernet clock OSC1 25-MHz Ethernet clock
button switch
Reconfigure pushbutton switch
PCI Mode
DIP switch
PCI XSPD
DIP switch
PCI SPD
DIP switch
switches
User DIP switch bank S4,
Board
Reference
PCI Development Kit, Cyclone II Edition. Note (1)
Table 2–2 on page 2–4.
Level converters for 5.0-V PCI compatibility. Refer to
U17, U20
through U24
U7, U19 Switch-selectable, factory-programmed (safe) EPCS64
J11 AS configuration interface for EPCS64 device
D10 (bottom)
(red)
D10 (top)
(green)
Installed at J9100-MHz high-speed reference clock.
S3 User-defined hardware reset.
S2 Reconfigure Cyclone II device.
S4,
position 1
S4,
position 2
S4,
position 3
S1, S5 User configurable.
positions 4-8
“PCI Level Converters” on page 2–4.
or user-programmable EPCS64 for Cyclone II device
configuration.
configuration interface.
programming (may not be installed).
Indicates reconfiguration in progress or configuration
error.
Indicates Cyclone II configuration is complete.
Enables PCI-X extensions. See Table 2–3 on page 2–5.
If enabled, selects PCI-X operating speed (i.e., 66 or
133 MHz). See Table 2–5 on page 2–5.
Selects PCI bus operating speed (66 or 33 MHz). See
Table 2–4 on page 2–5.
User configurable, 5 switches.
Description
2–2 Core Version 4.0.0 Altera Corporation
Cyclone II EP2C35 PCI Development Board Reference Manual May 2005
Board Components & Interfaces
Table 2–1. Cyclone II EP2C35 PCI Development Board Components & Interfaces (Part 2 of 2)
Type
User indicator User LEDs D1 through D8User configurable.
Power Power connector J2 External power supply connector.
Powe r
indicators
Test points VREF TP4 VREF test point near VTT/VREF regulator.
Expansion
interface
I/O 10/100 Ethernet U3, RJ1,
Serial I/O RS-232 U12, J12 RS-232 serial interface level shifter, DB9 connector.
Debug Mictor probe J4 Mictor probe interface for Agilent logic analyzers.
Component/
Interface
+5.0-V power OK
LED
+3.3-V power OK
LED
+1.8-V power OK
LED
+1.2-V power OK
LED
Ground TP1 Ground test point near power connector.
®
daughter
Altera
card (PROTO1)
RS-232 Tx LED D18 RS-232 transmitter active indicator.
RS-232 Rx LED D17 RS-232 receiver active indicator.
Board
Reference
D15 5.0-V power supply indicator.
D13 3.3-V power supply indicator.
D14 1.8-V power supply indicator.
D16 1.2-V power supply indicator.
TP2 Ground test point near PWR SWITCH.
TP3 Ground test point near MICTOR.
TP5 Ground test point near oscillator socket.
TP6 Ground test point near DDR2 SDRAM.
TP7 Ground test point near QDRII SRAM.
J1, J6, J7 Interface to Altera daughter card (PROTO1).
10/100 Ethernet MAC/PHY, RJ-45 connector,
OSC1
25-MHz oscillator.
Description
Note to Ta b le 2 –1 :
(1) The Cyclone II EP2C35 PCI Development Board was designed to use either the EP2C35F672, EP2C50F672, or
EP2C70F672 device. However, the board ships with—and was only tested with—the EP2C35F672 device.
Altera Corporation Core Version 4.0.0 2–3
May 2005 Cyclone II EP2C35 PCI Development Board Reference Manual
Component Operation
Component
Operation
This section describes the board’s operation, providing detailed
component descriptions.
Cyclone II Device
The Cyclone II device (U9) is connected to all of the board’s components
through appropriate on-chip interfaces and board circuitry. The device
supports PCI and PCI-X bus interfaces, the DDR2 SDRAM, as well as the
10/100 Ethernet. Users can program the Cyclone II device to implement
custom designs.
f For more information on Cyclone II devices, refer to the Cyclone II Device
Family Data Sheet section of the Cyclone II Device Handbook.
PCI & PCI-X Bus Support & Compatibility
The board is compatible with Altera® PCI MegaCore® functions
(pci_mt64, pci_mt32, pci_t64, pci_t32), AMPP
megafunctions, and other third-party vendor megafunctions.
The Cyclone II devices and PCI connector (J13) support PCI Local Bus
Specification, Revision 3.0 and PCI-X, Revision 2.0 mode 1. See Table 2–2.
Table 2–2. PCI & PCI-X Bus Support
Application Width (Bits) Voltage (V) Speed (MHz)
PCI 32 and 64 3.3 or 5.0 V 33 or 66 MHz
PCI-X 32 and 64 3.3 V 66 or 100 MHz
SM
PCI and PCI-X
PCI Level Converters
Board components U13 - U17 and U20 - U24 are IDT IDTQS3861Q level
converters that convert between 5.0-V PCI backplane signals and
Cyclone II 3.3-V signals.
2–4 Core Version 4.0.0 Altera Corporation
Cyclone II EP2C35 PCI Development Board Reference Manual May 2005
Board Components & Interfaces
PCI Operating Mode, Speed & DIP Switch Settings
Tables 2–3, 2–4, and 2–5 list the board’s PCI operating mode and speed,
and the corresponding DIP switch (S4) bank setting.
Table 2–3. PCI Operating Mode Setting
DIP Switch Position 1 (PCI Mode) PCI Operating Mode
Off PCI-X at the speed shown in Table 2–5.
On PCI at the speed shown in Table 2–4.
Table 2–4. PCI Operating Speed Setting
DIP Switch Position 3 (PCI SPD) PCI Operating Speed (MHz)
Off 66 MHz
On 33 MHz
Table 2–5. PCI-X Operating Speed Setting
DIP Switch Position 2 (PCI XSPD) PCI-X Operating Speed (MHz)
Off 133 or 100 MHz
On 66 MHz
Memory
The board has the following memory components:
■ Two 32-MByte DDR2 SDRAM devices
■ Two EPCS64 serial configuration (flash) devices
DDR2 SDRAM Memory
The board was tested with the Altera 167-MHz, DDR2 SDRAM Controller
MegaCore function version 3.2.0. Two 16M × 16 DDR2 SDRAM devices
are connected to banks 3 and 4 of the Cyclone II device as a single
16M × 32 memory block.
EPCS64 Serial Configuration (Flash) Devices
The board has two EPCS64Sl16N serial configuration devices (U7 and
U19) that upon power-up programs the Cyclone II device. The board
contains one EPCS64Sl16N device that is user-programmable, and one
preloaded, factory-programmed EPCS64Sl16N device.
Altera Corporation Core Version 4.0.0 2–5
May 2005 Cyclone II EP2C35 PCI Development Board Reference Manual
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