Alinco DJ-X2T, DJ-X2E Service Manual

DJ-X2E/DJ-X2T
Service Manual
CONTENTS
SPECIFICATIONS
1) G EN E RAL .............................................................................2
2) REC EIV E R
CIR CUIT DESC RIPTIO N
2) M 38224M6M(E:XA0728, T:XA 0729)
3) Terminal function of C P U ..................................................7
SEM IC ONDU CTO R DATA
1) NJM2070M (X A0210 )
2) uPD3140GS-E1 (X A 0312)...........................................8~9
3) TC4W53FU (XA0348)........................................................9
4) S-80730SL-AT (X A 00356)............................................. 10
5) M5222FP-600C (X A038 5 )............................................. 10
6) XC62SPR332MR (XA0519)...........................................11
7) NJM2904V (XA0573)....................................................... 11
8) MB88347LPFV-G-BND-EF (XA 0 599)
9) TK11816M (X A0665)....................................................... 13
10) TTK10931V (XA 066 6)
........................................................................... 2
.............................
........................................................8
........................
....................................................
12
13
11) TA4101FTE12L (XA 0667)
12) S-80829ALNP-EAS-T2 (XA 0668)................................ 14
13) BR24C64F-E2 (X A06 6 9)................................................ 15
14) uPC2757T-E3 (XA 0743)................................................. 16
15) Transistor, Diode, and LED Ontline Drawings
6
16) LCD C onnection...............................................................18
EXPLO DED VIEW
1) Front View
2) Rear V iew ........................................................................... 20
PARTS LIST
CPU U nit.............................................................................21
MAIN Unit....................................................................21~25
ADJU STME NT
1) Entering and releasing the adjustment mode
2) Adjustment..................................................................26~27
PC BOARD V IE W
SCHEM ATIC D IAG R AM
BLOCK D IA GR AM ................................................................ 32
........................................................................... 19
...........................................................
..............................................
..............................................30~31
...........
...........
28~29
14
17
26
ALINCO,INC.
SPECIFICATIONS
1) GENERAL
Receiving coverage
Wave type Ant. impedance Ant. terminal Supply voltage
Ground Current consumption
Temperature range
Frequency stability
Dimension
Weight
E : 0.522 ~ 999.995MHz T : 0.530 ~ 823.995MHz
850.000 ~ 868.995MHz
895.000 ~ 999.995MHz FM, WFM, AM 50Q SMA DC 3.8V (Internal lithium-ion battery) DC 4.5V (when using EDH-27)
Negative ground
Reception : approx. 80 mA Battery save (1 : 4) : approx.25mA
-10 ~ +60°C (14 ~ 140°F) ±5 ppm (-10 ~ +60°C) (+14 ~ +140°F) 58 (W) x 90 (H) x 15 (D) mm (without projections)
(2.28(W) x 3.54(H) x 0.59(D) in.)
Approx. 85g (Lithium-ion battery inclusive)
(Approx. 3oz.)
2) RECEIVER
System
First I.F. Second I.F. Third I.F. Sensitivity
Selectivity typ.
Triple-conversion superheterodyne
248.45MHz
38.85MHz 450kHz AM/FM -6dB/12kHz or over, -60dB/30kHz or less WFM -6dB/150kHz or over
FM/WFM 12dB SINAD, AM 10dB S/N FM : 30 ~ 108 0.63uV (-4dBu)
136~222 0.40uV (-8dBu) 222 ~ 470 0.50uV (-6dBu) 470 ~ 770 0.56uV (-5dBu) 770~1000 0.71uV (-3dBu)
WFM : 76 ~ 108 3.20uV (10dBu)
175~222 2.20uV (7dBu) 470 ~ 770 3.20uV (10dBu)
AM : 0.5 ~ 1.62 7.10uV (17dBu)
1.62 ~ 30 1.40uV (3dBu)
108~136 2.00uV (6dBu) 222 ~ 330 1.80uV (5dBu)
2
CIRCUIT DESCRIPTION
1) Receiver
1. Receiver system : Triple Superheterodyne Conversion
1st IF. : 248.45MHz
2nd IF. : 38.85MHz 3rd IF. : 450KHz
2. Front End
0.5 ~ 29.995MHz
The signal from the antenna is switched by the band switch (D109), passed through the low-pass filter and amplified by RF amplifier Q109. Then the signal is fed to the 1st mixer IC103 via the band switch D115.
30 ~ 136.995MHz
The signal from the antenna is switched by the band switch (D128), passed through the low-pass filter and amplified by RF amplifier Q111. Then the signal is fed to the 1st mixer IC103 via the band switch D112.
137 ~ 222.995MHz
The signal from the antenna is switched by the band switch (D116), passed through the low-pass filter and amplified by RF amplifier Q116. Then the signal is fed to the 1st mixer IC103 via the band switches D107 and D129.
223 ~ 367.995MHz
368 ~ 469.995MHz
470 ~ 999.995MHz
3. Mixer
The 1st Mixer
The signal from the antenna is switched by the band switch (D132), passed through the low-pass filter and amplified by RF amplifier Q118. Then the signal is fed to the 1st mixer IC103 via the band switches D107 and D129.
The signal from the antenna is switched by the band switch (D122), passed through the low-pass filter and amplified by RF amplifiers Q123 and Q138. Then the signal is fed to the 1st mixer IC103 via the band switch D134.
The signal from the antenna is switched by the band switch (D133), passed through the low-pass filter and amplified by RF amplifier Q126. Then the signal is fed to the 1st mixer IC103 via the band switch D120.
The input signal and 1st local signal generate sum and difference frequencies in the mixer IC103. SAW filter FL101 selects the signal of 248.45MHz and eliminates the adjacent channel signals.
The 2nd Mixer
The input signal and the 2nd local signal generate sum and difference fre quencies in the mixer IC104. Then the signals are divided into the receiving sides of FM/AM and WFM at D113 and D114.
3
FM/AM
WFM
4. IF
FM/AM
FM
In the receiving side of FM/AM the signal of 38.85MHz is selected by crystal
filter XF101. Then the signal is amplified at the 1st IF amplifier Q112 after eliminating the adjacent channel signal.
In the receiving side of WFM the signal of 38.85MHz is selected by band-pass
filter. Then the signal is amplified at the 1st IF amplifier Q112 after eliminating the adjacent channel signal.
The amplified signal at the 1st IF amplifier Q112 is led to the demodulator pin 24 of IC105. The signal of 12.8MHz from the reference buffer output of IC101 is multiplied by 3 in Q133. Then the signal is mixed with the signal of pin 1 of
IC105 in the mixer circuit inside of IC105 and converted into the 2nd IF signal
of 450kHz. The converted 2nd IF signal is output from pin 3 of IC105.
The output signal from pin 3 of IC105 is led to pin 7 of IC105 after eliminating the adjacent channel signal at the ceramic filter FL103. The input 2nd IF signal to pin 7 of IC105 is demodulated at the limiter amplifier and quadrature detector circuits inside of IC105, then output from pin 12 of IC105 as an AF signal.
AM
WFM
5. Squelch
The output signal from pin 3 of IC105 is led to the pin 5 of IC105 after eliminat ing the adjacent channel signal at the ceramic filter FL103. The 2nd IF signal input to pin 5 of IC105 is AM-demodulated inside of IC and output from pin 13 of IC105 as an AF signal. The 1st IF amplifier Q112 is controlled by reverse AGC at AGC amplifier Q117 to get better audio output even though the input is changed, and the gain is controlled.
The output signal from pin 3 of IC105 is led to pin 7 of IC105. The input 2nd IF signal to pin 7 of IC105 is demodulated at the limiter amplifier and quadrature detector circuits inside of IC, then output from pin 12 of IC105 as an AF signal.
The AF signal got from pin 12 of IC105 is fed to pin 19 of IC105. The input signal is output from pin 21 of IC105 passing through the noise filter amplifier and rectifier circuits inside of IC. The rectified signal is added to the A/D port of the microcomputer IC1. Judging the signal, the microcomputer controls ON/OFF of the audio output.
4
6. Audio
FM/AM/WFM
7. VCO
The 1st Local
The 2nd Local
The selection of receiving audio output signal between FM/WFM and AM is performed at IC106. The volume of output audio signal is adjusted at the electronic volume IC108 via the AF amplifier Q120. After converting the im pedance of the signal whose volume is adjusted at Q124, the signal is input to pin 2 of audio power amplifier IC110 and output from pin 6 to drive a speaker, etc.
The VCO for the 1st local consists of the Colpitts oscillator. D106, D108 and
L105 determine the frequency, and they are oscillated at the transistor Q103.
The oscillated signal is added to pin 2 of PLL-IC101 through the butter ampli fiers Q105 and Q134.
The VCO for the 2nd local consists of the Colpitts oscillator. D110, D111 and
L113 determine the frequency, and they are oscillated at the transistor Q110.
The oscillated signal is added to pin 19 of PLL-IC101 through the butter am plifier Q135.
8. PLL
The 1st Local
The 2nd Local
PLL-IC101 is used to control the oscillation frequency of VCO. The micro
computer IC1 sends the signal with serial data to control IC101. The 12.8
MHz reference frequency of IC101 oscillates the crystal oscillator X101 at the
inside circuit.
Using the control signal from IC1, IC101 compares the divided value of the
added signal to pin 2 of IC101 with the divided value of 12.8 MHz reference frequency inside IC101. When the phase difference is occurred, IC101 out puts the pulse signal from pin 8 and converts into DC voltage at the active filter Q107 and Q108. Then it is fed to the cathode of the VCO vari-cap diodes of
D106 and D108 to reduce the phase difference. This brings the stable oscilla
tion at the desired frequency.
Using the control signal from IC1, IC101 compares the divided value of the
added signal to pin 19 of IC101 with the divided value of 12.8 MHz reference frequency inside IC101. When the phase difference is occurred, IC101 out puts the pulse signal from the charge pump output pin 13 and converts into
DC voltage at the inside circuit for the active filter. Then it is fed to the cathode
of the VCO vari-cap diodes of D110 and D111 to reduce the phase difference. This brings the stable oscillation at the desired frequency.
5
2) M38224M6M (E:XA0728, T:XA0729)
CPU
Terminal Connection (TOP VIEW)
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6
3) Terminal function of CPU
No. Terminal Signal I/O Description
1 AN7 BP NC 2 AN6 BATT I Battery input
3 P65 PCNT 0 4 AN4 SMT I S-meter input 5 AN3 SQL I Squelch input
6
P62 AFPC O AF power supply
7 P61 BND3 O Band3 SW
8 P60 BND2 O Band2 SW
9 P57 RC O RX SW
10 P56 BND4 O Band4 SW 11 P55 BND5 O Band5 SW 12 P54 BND1 O Band1 SW
13 P53 DATA/UL I/O Data/Unlock 14 P52 STB2 O DAC strobe 15 P51 CLK O Clock 16 P50 STB1 O PLL strobe 17 P47 ATT O ATT SW 18 P46 P2C O PLL 2ch SW 19 TXD CTX O Clone TX
20 RXD CRX I Clone RX 21 P43 BEEP O Beep output 22 INT0 BU I Backup interrupt
23 P41 UP I Key input 24 P40 DOWN I Key input 25 RESET RESET I Reset interrupt 26 P71 SDA I/O EEPROM data 27 P70 SCK O EEPROM clock 28 XIN XIN I Clock input 29 XOUT XOUT O Clock output 30 VSS GND 31 P27 KEY8 I Key input 32 P26 KEY7 I Key input 33 P25 KEY6 I Key input 34 P24 KEY5 I Key input 35 P23 KEY4 I Key input 36 P22 KEY3 I Key input 37 P21 KEY2 I Key input 38 P20 KEY1 I Key input 39 P17 BND6 O Band6 SW 40 P16 PLLC O PLL power supply
No. Terminal Signal I/O Description
41 P15 P1C O PLL 1ch SW 42 P14 DBC O Doubler SW 43 P13 ASW O Whip antenna SW 44 SEG26 SEG26 O 45 SEG25 SEG25 O 46 SEG24 SEG24 O 47 SEG23 SEG23 O 48 SEG22 SEG22 O 49 P05 SCT O Secret SW 50 SEG20 SEG20 O 51 SEG19 SEG19 O 52 P02 EAR O Earphone antenna SW 53 SEG17 SEG17 O 54 SEG16 SEG16 O 55 SEG15 SEG15 O 56 SEG14 SEG14 O 57 SEG13 SEG13 O 58 SEG12 SEG12 O 59 SEG11 SEG11 O 60 SEG10 SEG10 O 61 SEG9 SEG9 O 62 SEG8 SEG8 O 63 SEG7 SEG7 O 64 SEG6 SEG6 O 65 SEG5 SEG5 O
66 SEG4 SEG4 O
67 SEG3 SEG3 O
68 SEG2 SEG2 O
69 SEG1 SEG1 O 70 SEG0 SEG0 O 71 VCC VDD 72 VREF VDD 73 AVSS GND 74 COM3 COM3 O 75 COM2 COM2 O 76 COM1 COM1 O 77 COMO COM0 O 78 VL3 VL3 I 79 VL2 VL2 I 80 VL1 VL1 I
7
SEMICONDUCTOR DATA
1) NJM2070M (XA0210)
2) uPD3140GS-E1 (XA0312)
80 ~ 550MHz Dual PLL Synthesizer Specifications
Operating frequency:
Consumption current:
Operationg voltage:
200 ~ 400MHz (Vin=-12 ~ -0dBm, pin 2 and 19 input) 80 ~ 550MHz (Vin=-8 ~ -0dBm, pin 2 and 19 input)
2.7 ~ 4.1mA (Vcc=1.8V while 1 channel is used)
4.3 ~ 6.6mA (Vcc=1.8V while both channels are used) 0 ~ 10uA (Vcc=1.8V in power save mode)
3.5 ~ 5.3mA (Vcc=5V while 1 channel is used)
5.6 ~ 8.6mA (Vcc=5V while both channels are used)
1.8 ~ 5.5V
8
Block Diagram
3) TC4W53FU (XA0348)
Pin Assignment
COMMON
1NH
VEE
VSS
[T H [I
\L
0
3 3 I] H
VDD
ch 0
ch 1
A
Block Diagram
(8 ) VDD
1..JL
......
© 4 M
A :
INH - - - I -
sir
VSS VEE
OUT IN
OUT IN
COMMON
!ch 1
9
1-
4) S-80730SL-AT (XA0356)
5) M5222FP-600C (XA0385)
Electronic Volume
10
6) XC62SPR332MR (XA0519)
Pin Assignment Block Diagram
7) NJM2904V (XA0573)
Dual Single Supply Operational Amplifer
11
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