Alinco DJ-S40 User Guide

DJ-S40T / E

Service Manual

CONTENTS

SPECIFICATIONS

1) GENERAL ................................................................ 2

2) TRANSMITTER ........................................................ 2

3) RECEIVER ............................................................... 2

CIRCUIT DESCRIPTION

1) Receiver system ....................................................... 3

2) Terminalmitter system ............................................... 4

3) PLL, VCO Circuit.......................................................4

4) M38224M6M ............................................................ 5

SEMICONDUCTOR DATA

1) M64082A (XA0543) .................................................. 7

2) NMJ2070MT1 (XA210) ............................................. 8

3) NJM2904V (XA0573)................................................ 8

4) NJM2902V-TE1 (XA0596) ........................................ 9

5) TA31136FN (XA0404)...............................................9

6) UPC2771T (XA0545).............................................. 10

7) CAT24WC16JITE13 (XA0855)................................ 10

8) S-816A30AMC (XA0848)........................................ 10

9) S-80827ALNP (XA0857)......................................... 11

10) MRF9745T1 (XE0034)............................................ 11

11) Transistor, Diode and LED Outline Drawings........... 12

12) LCD Connection ..................................................... 13

EXPLODED VIEW

1) Front V iew............................................................... 14

2) Bottom View............................................................15

PARTS LIST

MAIN Unit ......................................................... 16~20

SW Unit .................................................................. 20

Mechanical Parts .................................................... 20

Packing................................................................... 20

ADJUSTMENT ...................................................... 21~22

PC BOARD VIEW

1) UP0433(1/2) side A ................................................ 23

2) UP0433(1/2) side B ................................................ 24

3) PTT Unit WIRING ................................................... 25

SCHEMATIC DIAGRAM............................................. 26

BLOCK DIAGRAM...................................................... 27

ALINCO,INC.

SPECIFICATIONS

1) GENERAL

Frequency coverage T : TX 430 ~ 449.995MHz RX 410 ~ 470MHz

E : TX 430 ~ 439.995MHz RX 430 ~ 439.995MHz

TA : TX 410 ~ 470MHz RX 410 ~ 470MHz Mode F3E (FM) Channel steps 5, 10, 12.5, 15, 20, 25, 30 & 50kHz Memory channels 99 channels+1 CALL channel Antenna connector SMA (50Ω unbalanced) Frequency stability ±5 ppm Microphone impedance 2kΩ nominal Power supply 4.5 ~ 16.0V DC (EXT.ter monai)

3.6 ~ 16.0V DC (BATT ter minal)

Current 600mA (typical) Transmit high at 1W

150mA (typical) Receive at 280mW

40mA (typical) standby

15mA (typical) Battery save on Usable temperature range -10 ~ +60° C (14 ~ 140°F) Dimensions 56 (W) × 102 (H) × 30 (D) mm (with EDH-31)

2.2"(W) × 4.0"(H) × 1.18"(D) inches (with EDH-31)

(Projections not included) Weight Approx. 160g (5.6oz) (with EBP-53N)

Approx. 95g (3.3oz) (without Battery) Sub audible Tone(CTCSS) encoder/decoder installed (38tones)

2) TRANSMITTER

Output power Approx. 1.0W EBP-53N installed

Approx. 1.0W 13.8V DC

Approx. 0.6W EDH-31 installed

Approx. 0.2W (LOW) Modulation system Variable reactance frequency modulation Spurious emissions -60dB or less Max. frequency deviation ±5kHz

3) RECEIVER

Receive system Double conversion superheterodyne Intermediate frequencies 1st 21.7MHz / 2nd 450kHz Sensitivity(12dB SINAD) -14.0µdB (0.2uV) or less [430 ~ 450MHz] Selectivity -6dB : 12kHz or more

-60dB : 28kHz or less

Audio output power 280mW or higher( 8Ω load)

200mW (8Ω10% THD)

CIRCUIT DESCRIPTION

1) Receiver System

The receiver system is a double superheterodyne system with a 21.7MHz first IF and a 450kHz second IF.

1. Front End

The signal from the anntena is pssed through low-pass filter and input to RF coil L24 and L17(band pass filter). The signal from L24 and L17 is amplified by Q9,Q10 and led to the band pass filter, and let to the first mixer base of Q11.

2. First Mixer

The amplified signal (f0) by Q9,Q10 is mixed eith the first local oscillator signal(f0-21.7MHz) from the PLL circuit by the first stage mixer Q11 and so is converted into the first IF signal. The unwanted frequency band of the first IF signal is eliminated by the monolithic crystal filter FL3,and led to IF amplifier Q8.

3. IF Circuit

The first IF signal is amplified by Q8, and input to pin 16 of IC3, where it is mixed withthe second local oscillator signal(21.25MHz)and so is converted into the second IF signal(450kHz). The second IF signal is output from pin3 of IC3, and unwanted frequency band of second IF signal is eliminated by a ceramic filter FL2. The resulting signal is then amplified by the second IF limiting amplifier, and detected by quadrature circuit. the audio signal is output from pin9 of IC3

4.Audio Circuit

The demodulated signal in IF IC3 contains the audio signal and CTCSS signal . CTCSS signal is passed through the low-pass filter of IC5 and led to TIN por t of CPU to be decoded. The audio signal is input to the main volume VR3 passing through de-emphasis circuit and high-pass filter circuit of Q19.The signal of which level is adjusted at the main volume VR3 is input to IC6 of AF amp, then it is amplified to the level that can drive the speaker.

5.Squelch Circuit

The noise in the audio signal from IC3 is passed through the noise-filter and input to pin8 of IC3. IC3 includes filter amplifier,high-pass filter and rectifier. The rectified voltage level from pin14 of IC3 is deliverd to the comparator of the CPU. The voltage is led to pin1 of CPU and compared with the setting voltage.The squelch will open if the input voltage is lower than the setting voltage. During open squelch ,pin11(AFS)of CPU becomes”H”level and pin9(AFP)of CPU becomes”L”level, AF control signal is being controlled and sounds is outputted from the speaker.

2)Transmitter System

1.Microphone Amplifier

The input signal from built-in or external microphone is led to the microphone mute circuit Q15,pre-emphasis circuit ,IDC circuit IC4,the signal is input to the maximum deviation adjustment volume VR2.Then mixed at the add VR2 with the CTCSS tone signal which is generated by CPU,Then it is input to VCO as the modulation signal.

2.P o wer Amplifier

The signal from VCO is amplified by IC1 and then passed through the low-pass filter, the antenna switch circuit and the output low-pass filter. The unwanted harmonics frequency signal is eliminated by the low-pass filter and input to the antenna.

3)PLL,VCO Circuit

Output frequency of PLL circuit is set by the serial data from microprocessor. PLL circuit consists of VCO Q2,buffer amplifier Q6. The pulse wave output of chage pump is converted to DC voltage by PLL loop filter circuit,snd supplied to D2,D15 of varicap diode in VCO unit. The frequency modulation is executed when audio signal voltage is supplied to the varicap D3. When PLL is unlocked,pin10 of IC2 goes to “High”.

4) M38224M6M

CPU Terminal Connection

(TOP VIEW)

Terminal function of CPU

No. Pin Name Function I/O Logic

1 P67 SQL I A/D 2 P66 KEY I A/D 3 P65 VOX O Activ high 4 P64 EXTDC I A/D 5 P63 BP1 I A/D 6 P62 TIN I A/D 7 P61 SMT I A/D 8 P60 BATT I A/D

9 P57 AFP O Activ low 10 P56 BEEP I/O Pulse 11 P55 AFS O Activ high 12 CNTR0 TBST I/O Pulse 13 P53 BP3 I 14 P52 MONI I Activ low 15 P51 PSW I Activ low 16 P50 STB O Pulse 17 P47 DATA I/O Pulse 18 P46 CLK O Pulse 19 TxD CTX O Pulse 20 RxD CRX I Pulse 21 P43 SCR I Activ high 22 INTO BU I Activ low 23 P41 PTTK I Activ high 24 P40 BP4 I Activ high 25 RESET RESET I Activ low 26 P71 SCL O Pulse 27 P70 SDA I/O Pulse 28 Xin XIN I 29 Xout XOUT O 30 Vss GND 31 P27 MMUTE O Activ high 32 P26 H/L O Activ high 33 P25 EXP O Activ low 34 P24 FUNC I Activ low 35 P23 PTTC O Activ high 36 P22 P3C O Activ low 37 P21 C3C O Activ high 38 P20 R3C O Activ low 39 P17 T3C O Activ low 40 P16 TON4 O Activ high

Noise level input for squelch

Description

Key input ( , ,V/M) Power cont. Ext voltage input Band plan 1 CTCSS tone input S-meter input Batt voltage input Audio Amp ON/OFF Beep sound out Audio signal ON/OFF Art tone output Band plan 3 Monitor key input Power switch input Strobe for PLL Data for PLL Clock for PLL UART data transmission output UART data reception input Alarm signal input Back up signal detection input PTT signal input Band plan 4 Reset input Serial clock for EEPRPM Serial data for EEPRPM

CPU GND Microphone mute output Power control high=H EXP terminal control Func key input Beep sound level control Power supply control for VCO output Power supply control Power supply control for RX Power supply control for TX Tone output 4

No. Pin Name Function I/O Logic 41 P115 TON3 O Activ high 42 P14 TON2 O Activ high 43 P13 TON1 O Activ high 44 SEG26 SEG22 O 45 P115 SHIFT O Activ high 46 P10 LAMPC O Activ high 47 SEG23 SEG21 O 48 SEG22 SEG20 O 49 SEG21 SEG19 O 50 SEG20 SEG18 O 51 SEG19 SEG17 O 52 SEG18 SEG16 O 53 P01 CHG O Activ high 54 P00 MICC O Activ low 55 SEG15 SEG15 O 56 SEG14 SEG14 O 57 SEG13 SEG13 O 58 SEG12 SEG12 O 59 SEG11 SEG11 O 60 SEG10 SEG10 O 61 SEG9 SEG9 O 62 SEG8 SEG8 O 63 SEG7 SEG7 O 64 SEG6 SEG6 O 65 SEG5 SEG5 O 66 SEG4 SEG4 O 67 SEG3 SEG3 O 68 SEG2 SEG2 O 69 SEG1 SEG1 O 70 SEG0 SEG0 O 71 Vcc VDD 72 Vref VDD 73 Avss GND 74 COM3 COM3 O 75 COM2 COM2 O 76 COM1 COM1 O 77 COM0 COM0 O 78 VL3 VL3 I 79 VL2 VL2 I 80 VL1 VL1 I

Tone output 3

Description

Tone output 2 Tone output 1 LCD SEG 22 VCO shift output TX=H Lamp ON/OFF output LCD SEG 21 SEG 20 SEG 19 SEG 18 SEG 17 SEG 16 Battery charge control TX mic amp power supply outout SEG 15 SEG 14 SEG 13 SEG 12 SEG 11 SEG 10 SEG 9 SEG 8 SEG 7 SEG 6 SEG 5 SEG 4 SEG 3 SEG 2 SEG 1 SEG 0

LCD COM 3 LCD COM 2 LCD COM 1 LCD COM 0 LCD power supply LCD power supply LCD power supply

SEMICONDUCTOR DATA

1) M64082AGP (XA0543)

DUAL PLL FREQUENCY SYNTHESIZER

XBo

CPS

RST

Vcc

Fin1

Vss

PD1

Xout

Xin

Fin2

2 3 4 5 6 7 8

15 16

M64082AGP

Xin

Xout

GND

CONT

Vc1

Fin2

Lock PD2

XBo

1 12 14 13

Buffer

OSC

1/2 divider

2-modulus

prescaler

(1/128, 1/129)

1/4 divider

through

for reference frequency

Data latch (11 or 17 bits)

GNDVc1

Programmable divider

for local oscillator 2

CONT

Phase comparator

Charge pump

PD2

Fin1

CPS

Data latch (17 bits)

2-modulus

prescaler

(1/128, 1/129)

Shift register (21 bits)

21 pulse counter

4 5

RST

Programmable divider

for local oscillator 1

Data latch (17 bits)

latch

Vcc

Phase comparator

Charge pump

Lock detection

Lock

PD1

Vss

2) NJM2070MT1 (XA210)

Low V oltage P ower Amplifier Equivalent Circuit

3) NJM2904V-TE1 (XA0573)

4) NJM2902V-TE1 (XA0596)

Quad Single Supply Operational Amplifier

5) TA31136FN (XA0404)

Low Power FM IF

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