The OCP2030 is a buck topology of switching regulator for wide operating voltage applications field. The OCP2030
includes a high current P-MOSFET, high precision reference (0.5V) for comparing output voltage with feedback
amplifier, an internal dead-time controller and oscillator for controlling the maximum duty cycle and PWM frequency,
and has power-on programmable soft start time and short circuit PMOS turn-off and auto re-start protection functions.
Features
z Precision feedback reference voltage: 0.5V (2%)
z Wide supply voltage operating range: 3.6 to 20V
z
Low current consumption: 3mA
z Internal fixed oscillator frequency: Typ. 360KHz
z Programmable Soft-Start function (SS)
z Short Circuit Shutdown and Auto Re-start function(ARSCP)
z Built-in P-MOSFET for 3A loading capability
z Package: SOP8
Pin Configuration
Top View
1
2
3
4
Block Diagram
8
7
OCP2030
6
5
1
Name No.StatusDescription
VCC 1 P IC Power Supply (PMOS Source)
SS/SCP 2 I
IN- 3 I Error Amplifier Inverting Input
FB 4 O
GND
LX
5
6
7
8
P
O PMOS High Current Output
Connecting with a Soft-start &
ARSCP timing capacitor
Error Amplifier Compensation
Output
IC Ground
Reference
Regulator
1.25V
Oscillator
Therm al
Shuntdown
3
0.5V
36KΩ
500Ω
Output drive
control circuits
0.8V
4
Soft start&Auto Re-start
S.C.P Circuits
5
6
2
Page 1 - 9
7
Rev. 1.1 May.22, 2007
8
Philips SemiconductorsProduct data
CBT3257Quad 1-of-2 multiplexer/demultiplexer
FEATURES
• 5 Ω switch connection between two ports
TTL-compatible input levels
•
•
Minimal propagation delay through the switch
•
Latch-up protection exceeds 500 mA per JESD78
•
ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
DESCRIPTION
The CBT3257 is a quad 1-of-2 high-speed TTL-compatible
multiplexer/demultiplexer. The low on resistance of the switch allows
inputs to be connected to outputs without adding propagation delay
or generating additional ground bounce noise.
Output Enable (OE
appropriate B1 and B2 outputs for the A-input data.
The CBT3257 is characterized for operation from -40 to +85 °C.
) and select-control (S) inputs select the
PIN CONFIGURATION
1
S
2
1B1
3
1B2
4
1A
5
2B1
6
2B2
7
2A
89
GND
16
15
14
13
12
11
10
SA00533
V
OE
4B1
4B2
4A
3B1
3B2
3A
CC
PIN DESCRIPTION
PIN NUMBERSYMBOLNAME AND FUNCTION
1SSelect-control input
2, 3,
5, 6,
10, 11,
13, 14
4, 7, 9, 121A, 2A, 3A, 4A A inputs
8GNDGround (0 V)
15OEOutput enable
16V
1B1, 1B2,
2B1, 2B2
3B1, 3B2
4B1, 4B2
CC
B outputs
Positive supply voltage
ORDERING INFORMATION
PACKAGESTEMPERATURE RANGEORDER CODETOPSIDE MARKDWG NUMBER
16-pin plastic SO-40 to 85 °CCBT3257DCBT3257DSOT109-1
16-pin plastic SSOP-40 to 85 °CCBT3257DBCT3257SOT338-1
16-pin plastic SSOP (QSOP)-40 to 85 °CCBT3257DSCBT3257SOT519-1
16-pin plastic TSSOP-40 to 85 °CCBT3257PWCBT3257SOT403-1
Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.
PRODUCT SUMMARY
V
b
b
VDS (V)r
-20
0.100 @ V
0.150 @ V
P-Channel 2.5-V (G-S) MOSFET
(W)ID (A)
DS(on)
= -4.5 V-2.4
GS
= -2.5 V-2.0
GS
G
1
S
2
b
TO-236
(SOT-23)
D
3
Ordering Information: Si2301BDS-T1
Si2301BDS
Vishay Siliconix
Top View
Si2301 BDS (L1)*
*Marking Code
ABSOLUTE MAXIMUM RATINGS (TA = 25_C UNLESS OTHERWISE NOTED)
ParameterSymbol5 secSteady StateUnit
Drain-Source VoltageV
Gate-Source VoltageV
Continuous Drain Current (TJ = 150_C)
Pulsed Drain Current
Continuous Source Current (Diode Conduction)
Power Dissipation
Operating Junction and Storage Temperature RangeTJ, T
a
_
b
TA= 25_C
TA= 70_C
TA= 25_C
TA= 70_C
DS
GS
I
D
I
DM
I
S
P
D
stg
-2.4-2.2
-1.9-1.8
-0.72-0.6
0.90.7
0.570.45
-55 to 150_C
THERMAL RESISTANCE RATINGS
-20
"8
-10
A
W
ParameterSymbolTypicalMaximumUnit
Maximum Junction-to-Ambient
Maximum Junction-to-Ambient
Notes
a. Pulse width limited by maximum junction temperature.
b. Surface Mounted on FR4 Board, t v 5 sec.
c. Surface Mounted on FR4 Board.
b
R
c
thJA
120145
140175
_C/W
5A Low Dropout Positive Adjustable or Fixed-Mode Regulator
Features
1.4V maximum dropout at full load current
•
•
Built-in thermal shutdown
•
Output current limiting
•
Adjustable output voltage or fixed 1.5V, 1.8V, 2.5V,
3.3V, 5.0V
•
Fast transient response
Good noise rejection
•
Package : TO252, TO263, TO220
•
General Description
AP1084 is a low dropout positive adjustable or fixedmode regulator with minimum of 5.0A output current
capability. The product is specifically designed to
provide well-regulated supply for low voltage IC
applications such as high-speed bus termination and
low current 3.3V logic supply. AP1084 is also well
suited for other applications such as VGA cards.
AP1084 is guaranteed to have lower than 1.4V
dropout at full load current making it ideal to provide
well-regulated outputs of 1.25 to 3.3V with 4.7 to
12V input supply.
1A Low Dropout Positive Adjustable or Fixed-Mode Regulator
Features
- 1.4V maximum dropout at full load current
- Fast transient response
- Output current limiting
- Built-in thermal shutdown
- Packages: SOT223, TO263, TO252, TO220,
SOT89
- Good noise rejection
- 3-Terminal Adjustable or Fixed 1.5V, 1.8V, 1.9V,
2.5V, 3.3V, 5.0V
Applications
- PC peripheral
- Communication
General Description
AP1117 is a low dropout positive adjustable or
fixed-mode regulator with minimum of 1A output
current capability. The product is specifically
designed to provide well-regulated supply for low
voltage IC applications such as high-speed bus
termination and low current 3.3V logic supply.
AP1117 is also well suited for other applications
such as VGA cards. AP1117 is guaranteed to have
lower than 1.4V dropout at full load current making
it ideal to provide well-regulated outputs of 1.25 to
5.0 with 6.4V to 12V input supply.
Ordering Information
AP 1117 X XX X X
AP1117
Low Dropout Regulator
Typical Circuit
5V
Tab is Vout
( 5V/3.3V fixed output )
Vin
Vout
GND
C1
100uF
PackageVout
E : SOT223-3L
K : TO263-3L
D : TO252-3L
T : TO220-3L
Y : SOT89-3L
The Advanced Power MOSFETs from APEC provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
The SO-8 package is universally preferred for all commercial-industrial
surface mount applications and suited for low voltage applications
such as DC/DC converters.
BV
R
DS(ON)
I
D
G
DSS
-30V
50mΩ
-5.3A
D
S
Absolute Maximum Ratings
SymbolUnits
V
DS
V
GS
=25℃A
I
D@TA
I
=70℃A
D@TA
I
DM
PD@TA=25℃W
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Continuous Drain Current
Pulsed Drain Current
Total Power Dissipation2.5
Linear Derating Factor0.02
T
STG
T
J
Storage Temperature Range
Operating Junction Temperature Range-55 to 150
These N-Channel enhancement mode field effect transistors
are produced using Fairchild's proprietary, high cell density,
DMOS technology. These products have been designed to
minimize on-state resistance while provide rugged, reliable,
and fast switching performance. They can be used in most
applications requiring up to 400mA DC and can deliver
High density cell design for low R
Voltage controlled small signal switch.
Rugged and reliable.
High saturation current capability.
DS(ON)
.
pulsed currents up to 2A. These products are particularly
suited for low voltage, low current applications such as small
servo motor control, power MOSFET gate drivers, and other
switching applications.
The TDA1517 is an integrated class-B dual output
amplifier in a plastic single in-line medium power package
with fin (SIL9MPF) and a plastic heat-dissipating dual
in-line package (HDIP18). The device is primarily
developed for multi-media applications.
• Mute/standby switch
• AC and DC short-circuit safe to ground and V
P
• Thermally protected
• Reverse polarity safe
• Capability to handle high energy on outputs (VP=0V)
SVRRsupply voltage ripple rejectionfi= 100 Hz to 10 kHz48−−dB
α
cs
G
v
V
no(rms)
T
c
channel separation40−−dB
closed loop voltage gain192021dB
noise output voltage (RMS value)−50−µV
crystal temperature−−150°C
ORDERING INFORMATION
TYPE
NUMBER
NAMEDESCRIPTIONVERSION
PACKAGE
TDA1517SIL9MPF plastic single in-line medium power package with fin; 9 leadsSOT110-1
TDA1517PHDIP18plastic heat-dissipating dual in-line package; 18 leadsSOT398-1
Philips SemiconductorsProduct specification
2 × 6 W stereo power amplifierTDA1517; TDA1517P
PINNING
SYMBOLPINDESCRIPTION
−INV11non-inverting input 1
SGND2signal ground
SVRR3supply voltage ripple rejection output
OUT14output 1
PGND5power ground
OUT26output 2
V
P
M/SS8mute/standby switch input
−INV29non-inverting input 2
7supply voltage
dbook, halfpage
INV1
SGND
SVRR
OUT1
PGND
OUT2
V
M/SS
INV2
1
2
3
4
TDA1517
5
6
7
P
8
9
MLC352
Fig.2 Pin configuration for SOT110-1.
FUNCTIONAL DESCRIPTION
The TDA1517 contains two identical amplifiers with
differential input stages. The gain of each amplifier isfixed
at 20 dB. A special feature of the device is the
mute/standby switch which has the following features:
• Low standby current (<100 µA)
• Low mute/standby switching current
• Mute condition.
(low cost supply switch)
dbook, halfpage
Pins 10 to 18 should be connected to GND or floating.
INV1
SGND
SVRR
OUT1
PGND
OUT2
V
M/SS
INV2
1
2
3
4
TDA1517P
5
6
7
P
8
9
18
17
16
15
14
13
12
11
10
MLC353
Fig.3 Pin configuration for SOT398-1.
Fremont Micro Devices, Inc.
FEATURES
Low voltage and low power operati ons:
• FT24C02/04/08/16: V
• FT24C02A/04A/08A/16A: VCC = 1.8V to 5.5V
Maximum Standby current < 1µA (typically 0.02µA and 0.06µA @ 1.8V and 5.5V respectively).
16 bytes page write mode.
Schmitt trigger, filtered inputs for noise protection.
Self-timed programming cycle (5ms maximum).
Automatic erase before write operation.
Write protect pin for hardware data protection.
High reliability: typically 800,000 cycles endurance.
100 years data retention.
Industrial temperature range (-40o C to 85o C).
Standard 8-pin PDIP/SOIC/TSSOP Pb-free packages.
CC
FT24C02 / 04 / 08 / 16
FT24C02A / 04A / 08A / 16A
= 2.5V to 5.5V
and
DESCRIPTION
The FT24C02/04/08/16 series are 2048/4096/8192/16384 bits of serial Electrical Erasable and
Programmable Read Only Memory, commonly known as EEPROM. They are organized as
256/512/1024/2048 words of 8 bits (1 byte) each. The devices are fabricated with proprietary
advanced CMOS process for low power and low voltage applications. These devices are available in
standard 8-lead PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP packages. A standard 2-wire serial
interface is used to address all read and write functions. Our extended V
devices enables wide spectrum of applications.
range (1.8V to 5.5V)
CC
PIN CONFIGURATION
Pin Name Pin Function
A2, A1, A0 Device Address Inputs
SDA Serial Data Input / Open Drain Output
SCL Serial Clock Input
WP Write Protect
NC No-Connect
All three packaging types come in conventional or Pb-free certified.
HY5DU281622FT(P) Series
DESCRIPTION
The HY5DU281622FT(P) is a 134,217,728-bit CMOS Double Data R ate (D DR) Synchronous DRAM, ideally suited for the
main memory applications which requires large memory density and high bandwidth.
This Hynix 128Mb DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the
clock. While all addresses and control inputs are latched on the rising edges of the CK (fal ling edges of the /CK), Data,
Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 2-bit prefetched to achieve very high ban dwid th. All inp ut a nd output voltage levels are compatible
with SSTL_2.
FEATURES
•VDD, V
DDQ
= 2.3V
min
~ 2.7V
max
(Typical 2.5V Operation +/- 0.2V for DDR266, 333)
•VDD, V
DDQ
= 2.4V
min
~ 2.7V
max
(Typical 2.6V Operation +0.1/- 0.2V for DDR400
and 400Mbps/pin product)
•All inputs and outputs are compatible with SSTL_2
interface
1. +5V supply voltage only; no external tuning voltage required.
2. Tuners for horizontal and vertical mounting available.
3. Option with DC-power output through input connector (e. g. indoor antenna supply)
4. Tuners comply with relevant CENELEC standards with regard to requirements concerning signal
handling capability and immunity
5. Superior low noise and high sensitivity performance
6. RF-in to RF-out loopthrough amplifiers
7. low noise and excellent linearity
8. VHF high to UHF frequency range coverage
9. Standard connectors for in-and output e. g. IEC, F-connector. RCA
10. full UHF /VHF-H frequency coverage
11. Pattem generator included
2
12. I
C programmable
13. 400KHz Bus compliant
14. Stand-by mode addressable
15. High performance and cost effective single conversion tuner
2
16. I
C programmable
17. 400KHz Bus compliant
18. Fast PLL tuning speed (programmable step size e.g.62.5KHz and 166.67KHz)
19. Flat overall frequency response
20. High PLL loop bandwidth which ensures very low oscillator phase noise
21. SAW-filter and IF-amplifier included
a) Switchable 7/8 MHz SAW filter (full band tuners)
b) Fixed 8 MHz SAW filter (UHF only tuners)
c) IF-amplification controllable over a wide range
22. Differential, filtered (SAW)‘digital’ IF-output to directly drive the channel decoder
Philips SemiconductorsProduct specification
Dual 4-channel analog multiplexer,
demultiplexer
FEATURES
• Wide analog input voltage range from −5 V to +5 V
• Low ON-resistance:
–80Ω (typical) at VCC− VEE= 4.5 V
–70Ω (typical) at VCC− VEE= 6.0 V
–60Ω (typical) at VCC− VEE= 9.0 V
• Logic level translation: to enable 5 V logic to
communicate with ±5 V analog signals
• Typical “break before make” built in
• Complies with JEDEC standard no. 7A
• ESD protection:
– HBM EIA/JESD22-A114-B exceeds 2000 V
– MM EIA/JESD22-A115-A exceeds 200 V.
• Specified from −40 °C to +85 °C and −40 °C to+125 °C.
APPLICATIONS
• Analog multiplexing and demultiplexing
• Digital multiplexing and demultiplexing
• Signal gating.
74HC4052; 74HCT4052
DESCRIPTION
The 74HC4052 and 74HCT4052 are high-speed Si-gate
CMOS devices and are pin compatible with the
HEF4052B. They are specified in compliance with JEDEC
standard no. 7A.
The 74HC4052 and 74HCT4052 are dual 4-channel
analog multiplexers or demultiplexerswith common select
logic. Each multiplexer has four independent
inputs/outputs (pins nY0 to nY3) and a common
input/output (pin nZ). The common channel select logics
include two digital select inputs (pins S0 and S1) and an
active LOW enable input (pin E). When pin E = LOW, one
of the four switches is selected (low-impedance ON-state)
with pins S0 and S1. When pin E = HIGH, all switches are
in the high-impedance OFF-state, independent of pins S0
and S1.
VCC and GND are the supply voltage pins for the digital
control inputs (pins S0, S1, and E). The VCC to GND
ranges are 2.0 V to 10.0 V for 74HC4052 and
4.5 V to 5.5 V for 74HCT4052. The analog inputs/outputs
(pins nY0 to nY3 and nZ) can swing between VCC as a
positive limit and VEE as a negative limit. VCC− VEE may
not exceed 10.0 V.
FUNCTION TABLE
ES1S0
LLLnY0 and nZ
LLHnY1 and nZ
LHLnY2 and nZ
LHHnY3 and nZ
HXXnone
Note
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care.
INPUT
For operation as a digital multiplexer/demultiplexer, VEEis
connected to GND (typically ground).
(1)
CHANNEL BETWEEN
HIGHLY INTEGRATED LCD TV PROCESSOR
1. GENERAL DESCRIPTION
PPrreelliimmiinnaarry
SPV7100A
y
The SPV7100A is a highly integrated solution for the mainstream
LCD TV applications. The SPV7100A provides on-chip functions
including a high-speed triple-ADC and PLL, HDMI PanelLink
Cinema receiver, TV decoder with 3-D comb filter, 4-pair Audio
Line-In, 2-pair Audio Line-Out, one SIF demodulator and audio
decoder, 3D motion adaptive de-interlacing, 2:2/3:2 film mode
detection, video on graphic PIP/POP, SDRAM/DDR controller,
color management control, sRGB color management,
bitmap-based and font-based OSD engine, embedded CPU and a
dual channels LVDS transmitter. The chip could support LCD TV
up to 1080P input resolution and 1080p output resolution.
Note: PanelLink is the Trade Mark of Silicon Image Inc.
2. FEATURES
2.1. Graphics and Video Input Port
Integrate 150MHz 10-bit ADC/PLL
Dual CCIR656 digital video ports to support 2 input or 1 input/1
output
Support SDTV at 480i/576i and 480p/576p
Support HDTV at 720p and 1080i and1080p
Support PC graphics VGA, SVGA, XGA, WXGA, SXGA@75Hz
(135MHz)
Build-in sync. processor for separate, composite or sync on
Y/G
Support Video/Graphics PIP/DW
Channel swap for any source input
Image Format Detection/Auto Image Positioning/Auto Phase
Detection
Full SCART support including RGB fast blank
2.2. HDMI
HDMI 1.2 compliant and DVI 1.0 compliant receiver
HDCP 1.1 compliant receiver
Support DTV resolutions
(480i/576i/480p/576p/720p/1080i/1080p)
S/PDIF output supports PCM, Dolby Digital, DTS digital audio
with bypass mode
Four I2S audio outputs to SSD(Stereo Sound Decoder) with
bypass mode
Auto audio error detection with programmable soft mute
Build-in OTP for HDCP key
2.3. 3D Video Decoder
NTSC/PAL/SECAM video decoder
TM
3D comb filter for NTSC, PAL I (B,G,H,D,N), PAL-M, PAL-N
Enhanced NTSC/PAL/SECAM auto detection
4 analog inputs and one analog video output
Cross-color reduction for NTSC by 3-line comb filtering
Cross-color reduction for PAL by 5-line comb filtering
Motion adaptive 3D Y/C separation comb filter for NTSC/PAL
system
Multi-standard VBI data decoder, Teletext 2.5, WSS, VPS,
Closed-caption and V-chip
Macrovision detection
VBI data (C.C, TTX2.5, V-chip) overlay display
2.4. High Quality Video Processing
Enhanced Pixel-based 3D motion adaptive de-interlacing
(SDTV/HDTV)
Enhanced 2:2/3:2 film mode detection
Support Graphics mode frame rate conversion
Support Video mode frame rate conversion
2D Edge enhancement
Dynamic Peaking Filter
Enhanced Digital Luminance Transient Improvement (DLTI)
Digital Color Transient Improvement (DCTI)
Black/White Level Expansion and Dynamic Contrast
RGBYMC color adjustment
Dark and Gray area UV Suppression
Enhanced 3D motion adaptive noise reduction
De-blocking and de-mosquito filters
Color management/Color temperature adjustment
Brightness/Contrast/hue/Saturation adjustment
Support sRGB color correction
Build-in three 256-point gamma tables with 10 bits resolution
Color space conversion, both YCbCr to RGB and RGB to
YCbCr
Build-in temporal/spatial color dithering
10-bit video/image processing
2.5. High Quality Video Scaling Engine
Advanced third-generation scaling engine
Support 4:3 / 16:9 with non-linear scaling
Support Moiré Canceling
2.6. Multi-standard TV Sound Decoder
Field proven TV sound decoder
Support BTSC, A2/Zweiton, NICAM, EIAJ, SECAM, FM stereo
Automatic TV-standard detection (ASD)
Non-standard carrier compatible
SAP decoding where applicable
Auto fallback from NICAM where applicable
2.7. Embedded OSD and VBI Controller
Build-in programmable OSD engine for two OSD windows (bit
map OSD)
1,2,4 and 8-bit per pixel (bit-map OSD)
Support hardware cursor
Support programmable 512 font-based OSD and
graphics-based OSD
Support VBI decoder (CC,V-Chip and Teletext)
Support VBI CC/TTX/Menu with more than 1000 char-fonts
2.8. Embedded DDR/SDRAM Controller
Integrated DDR/SDRAM controller with DLL (DDR)
Support 32-bit DRAM bus with memory size from 16Mb (limited
functions) to 256Mb
2.9. Programmable Digital Output for LCD
Support output sequence mapping for TI and Thine
Build-in dual channels 8-bit LVDS Tx or single channel 10-bit
LVD S Tx
Support display output up to 1920x1200 @60Hz (165Mhz
WUXGA reduced blanking)
Support Power Down Sequence
4-ch PWM backlight intensity control
2.10. CPU
Powerful 32-bit RISC CPU
Simple memory management stub (SMMU)
MIPS-I instruction with DSP instruction set extension
2K bytes 2-way instruction cache
4K bytes direct-mapped data cache
8K bytes data memory for DMA operation
EJTAG interface
One UART up to 115200 baud rate
Four 24-bit up/down timers
3K Bytes IMem for power saving mode
2.11. Audio Processor
Support SPDIF input
Support SPDIF output (signal could come from SPDIF input or
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
MT1389L
5Function
5-1 General Description
MediaTek MT1389L is a cost-effective DVD system-on-chip (SOC) which incorporates advanced features like
MPEG-4 video decoder, high quality TV encoder and state-of-art de-interlace processing. The MT1389L enables
consumer electronics manufacturers to build high quality, USB2.0, MS/SD/MMC reader, feature-rich DVD players,
portable DVD players or any other home entertainment audio/video devices.
World-Leading Technology: Based on MediaTek’s world-leading DVD player SOC architecture, the
MT1389L is the New generation of the DVD player SOC. It integrates the MediaTek 3
RF amplifier and the Servo/MPEG AV decoder.
Rich Feature for High Valued Product: To enrich the feature of DVD player, the MT1389 equips a
simplified MPEG-4 advanced simple profile (ASP) video decoder to fully support the DivX
makes the MT1389-based DVD player be capable of playback MPEG-4 content which become more and more
popular.
Incredible Audio/Video Quality: The progressive scan of the MT1389L utilized advanced motion-adaptive
de-interlace algorithm to achieve the best movie/video playback. It also supports a 3:2 pull down algorithm to give
the best film effect. The 108MHz/12-bit video DAC provides users a whole new viewing experience. Built-in 6ch
audio DACs and 2ch audio ADCs could give the variable function solutions.
High Performance Memory Storage Device: As the core of Portable DVD players need more capability to
support current multimedia contents. The MT1389L provides the interface for the 3-in-1 card reader, which
supports Memory-Stick, Secure Digital Memory Card, and MultiMediaCard, to connect with the mainstream digital
camera FLASH cards. For the USB application, we adopt USB2.0 High speed specification to reach rich-contents
transference. USB 2.0 High speed will support for high-speed devices. USB 2.0 High Speed is suitable for
high-performance devices such as high-density storage devices. In addition, USB 2.0 High Speed supports old
USB 1.0/1.1 software and peripherals, offering impressive and even better compatibility to customers
rd
generation front-end digital
1
Home Theater profile. It
Key Features
DVD
PUH
Module
FLASH
MT1389L
Desktop
CVBS, Y/C,
Component
SDPIF
Analog
Audio
Output
USB 2.0
High Speed
Front-panel
Remote
DRAM
DVD Player System Diagram Using MT1389L
1
DivX is a trademark of DivXNetworks
2
USB High Speed : 480Mbit/sec. USB Full Speed : 12Mbit/sec.
All information contained herein is the exclusive property of MediaTek Inc. and shall not be distributed, reproduced
or disclosed in whole or in part without prior written permission of MediaTek Inc
4
RF/Servo/MPEG Integration
DivX Home Theater Level MPEG4 ASP Video decoder
Support Nero-Digital
Support DivX Ultra
High Performance Audio Processor
Progressive Scan
108MHz/12-bit, 4 CH TV Encoder
Internal 6CH Audio DAC
Internal 2CH Audio ADC
USB2.0 High Speed (Host/Device)
3-in-1 MS/SD/MMC reader
Applications
Standard DVD Players
V1.5
GPIO13
AudioAudioVid
DAC
ADC
DAC
_
DVDD18
INT RF
GPIO9
XTAL I
GPIO8
XTALO
GPIO7 / CKE
V20
V14
REXT
USB
DVSS18
_
_
MT1389L
Desktop DVD Player SOC
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
All information contained herein is the exclusive property of MediaTek Inc. and shall not be distributed, reproduced
20
or disclosed in whole or in part without prior written permission of MediaTek Inc
EN25B16
EN25B16
16 Mbit Serial Flash Memory with Boot and Parameter Sectors
FEATURES
x Single power supply operation
- Full voltage range: 2.7-3.6 volt
x 16 M-bit Serial Flash
- 16 M-bit/2048 K-byte/8192 pages
- 256 bytes per programmable page
x High performance
- 75MHz clock rate
x Low power consumption
- 5 mA typical active current
- 1 PA typical power down current
x Flexible Sector Architecture:
- Two 4-Kbyte, one 8-Kbyte, one 16-Kbyte,one
32-Kbyte, and thirty one 64-Kbyte sectors
x Software and Hardware Write Protection:
- Write Protect all or portion of memory via
software
- Enable/Disable protection with WP# pin
x High performance program/erase speed
- Byte program time: 7μs typical
- Page program time: 1.5ms typical
- Sector erase time: 300 to 800ms typical
- Chip erase time: 18 Seconds typical
x Minimum 100K endurance cycle
x Package Options
- 8 pins SOP 200mil body width
- 8 contact VDFN
- 16 pin SOP 300mil body width
- All Pb-free packages are RoHS compliant
x Commercial and industrial temperature
Range
GENERAL DESCRIPTION
The EN25B16 is a 16M-bit (2048K-byte) Serial Flash memory, with advanced write protection
mechanisms, accessed by a high speed SPI-compatible bus. The memory can be programmed 1 to
256 bytes at a time, using the Page Program instruction.
The EN25B16 has thirty six sectors including thirty one sectors of 64KB, one sector of 32KB, one sector
of 16KB, one sector of 8KB and two sectors of 4KB. This device is designed to allow either single Sector
at a time or full chip erase operation. The EN25B16 can protect boot code stored in the small sectors for
either bottom or top boot configurations. The device can sustain a minimum of 100K program/erase cycles
on each sector.
4M x 4Bit x 4 / 2M x 8Bit x 4 / 1M x 16Bit x 4 Banks SDRAM
FEATURES
• JEDEC standard 3.3V power supply
• LVTTL compatible with multiplexed address
• Four banks operation
• MRS cycle with address key programs
-. CAS latency (2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system clock
• Burst read single-bit write operation
• DQM (x4,x8) & L(U)DQM (x16) for masking
• Auto & self refresh
• 64ms refresh period (4K cycle)
GENERAL DESCRIPTION
The K4S640432H / K4S640832H / K4S641632H is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x
4,194,304 words by 4 bits, / 4 x 2,097,152 words by 8 bits, / 4 x 1,048,576 words by 16 bits, fabricated with SAMSUNGcs high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible
on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to
be useful for a variety of high bandwidth, high performance memory system applications.
Ordering Information
Part No.OrgainizationMax Freq.InterfacePackage
K4S640432H-TC(L)7516Mb x 4 133MHz(CL=3)
K4S640832H-TC(L)758Mb x 8 133MHz(CL=3)
K4S641632H-TC(L)60
K4S641632H-TC(L)70143MHz(CL=3)
K4S641632H-TC(L)75133MHz(CL=3)
OrganizationRow AddressColumn Address
4Mb x 16
16Mx4A0~A11A0-A9
8Mx8A0~A11A0-A8
4Mx16A0~A11A0-A7
Row & Column address configuration
166MHz(CL=3)
LVTTL54pin TSOP(II)
Rev. 1.5 February 2004
SDRAM 64Mb H-die (x4, x8, x16)
Package Physical Dimension
CMOS SDRAM
0.10
0.004
MAX
#54
#1
0.71
( )
0.028
#28
11. 76r0.20
0.463r0.008
#27
22.62
MAX
0.891
22.22
0.30
0.012
0.875
+0.10
-0.05
0.004
-0.002
r0.10
r0.004
0.80
0.0315
0.21
0.008
r0.05
r0.002
0.039
54Pin TSOP(II) Package Dimension
1.00
r0.10
r0.004
0.25
0.010
10.16
0.125
0.005
0.047
0.400
1.20
TYP
+0.075
-0.035
+0.003
-0.001
MAX
0.05
0.002
0~8qC
0.45~0.75
0.50
MIN
0.018~0.030
)
0.020
(
Rev. 1.5 February 2004
SDRAM 64Mb H-die (x4, x8, x16)
FUNCTIONAL BLOCK DIAGRAM
Bank Select
CMOS SDRAM
LWE
Data Input Register
LDQM
CLK
ADD
Refresh Counter
Row Buffer
Address Register
LRAS
LCBR
LCKE
LRASLCBRLWELDQM
CLKCKECS
Samsung Electronics reserves the right to change products or specification without notice.
when MS card insert, =>>pull downwhen SD card insert, =>>pull up
4
CARD+3V
9
8
4
CARD+3V
Q13
2N3906
R146 200KR151 30K
G2
3_5mm_8via
7
6
5
R147
2K
CARD_RST
Pull-down
GND
Q15
2N3904
SD_D3
R132 33
SD_D2
R133 33
SD_D1
DD
CC
R_SD_D2/MMC_RST
R_SD_D3/MMC_CS
R_SD_CMD/MMC_SO
R_MS_D3
MS_INS
BB
AA
SD_D0
SD_CMD
SD_CLK
USB_GND
CARD+3V
CARD+3V
Pull-high+3V
Pull-down
Pull-high+3V
Pull-down
Pull-high+3V
Pull-down
Pull-high+3V
Pull-down
GND
GND
R134 33
R135 33
R136 33
R137 33
5
26
25
24
23
22
21
20
19
18
17
16
15
14
R157 10K
R156 10K
R155 30K
R154 10K
R153 30K
R152 10K
R150 10K
R149 30K
R148 10K
JP5
CD GND_SD
CD GND_SD
CD GND_SD
CD GND_SD
DAT2_SD
VSS_MS
CARD DETECK_SD
VCC_MS
SCLK_MS
CMD_SD
RESERVED_MS
INS_MS
RESERVED_MS
VSS_SD
3IN1CARD
MSD019X01X90
USB_GNDGNDUSB_GND
R_SD_CMD/MMC_SO
R_MS_BS
R_SD_CLK/MMC_SCK
R_MS_CLK
R_SD_D0/MMC_SI
R_MS_D0
R_SD_D1/MMC_WP
R_MS_D1
R_SD_D2/MMC_RST
R_MS_D2
R_SD_D3/MMC_CS
R_MS_D3
PDF 文件使用 "pdfFactory Pro" 试用版本创建www.fineprint.cn
5
<RevCode>
4
3
2
1
DVD_AUDIO
DD
IPOD_AUDIO
AUDIO SWITCH
AUDIO_OUT
IPOD/DVD_SW(CTR)
DVD_VIDEO
1
CC
BB
AOUT_FL
AOUT_FR
1
R1700R
R1710R
LEFTOUT
RIGHTOUT
IPOD_VIDEO
IPOD/DVD_SW(CTR)
VIDEO SWITCH
VIDEO_OUT
AA
Title
<Title>
SizeDocument NumberRev
<Doc>
A
5
4
3
Date:Sheetof
2
66Monday, April 13, 2009
1
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HK-HDMI-CI-SUNTV-V2.52-EURO(RoHS)
HDMI_J
Blue Red,dowm line Yellow White Red )
V2.55
HEADER 2
HEADER 3
CON4/2.0mm
CON6/2.0mm
CON11/2.0mm
CON14/2.0mm
CON4/2.54mm
CON10/2.54mm
DB15
BNC
PHONE JACK
15x2PIN
USB-JACK
S-VIDEO JACK
component
SCART
PCMCIA SOKET
YX438901
YX938908
crystal
32.768K
27.000MT
diode
SSM5822/SK34
1N4148
1N4002/1N4004(DIP)
BA277
9.1V
5.6V
SK34
audion
BAV99
NameTypePart ReferenceDosageTotal Dosage
socket
2P pin(linker2.54mm distance) no clasp,
stand
3P pin(linker2.54mm distance) no clasp,
stand
4P pin(linker2.0mm distance)no clasp,
stand
6P pin(linker2.0mm distance)no clasp,
stand
11P pin(linker2.0mm distance)no clasp,
stand
14P pin(linker2.0mm distance)no clasp,
stand
4P pin(linker2.54mm distance)no clasp,
stand
10P pin(linker2.54mm distance)no clasp,
stand
DZ11A31-B8 (15P-Dsub,30X8mm )
Dcpower socket2.0mm
Audio input socket
15X2Pin(linker2.0 diatance)
HDMI JACK
USB JACK
S-VIDEO JACK
6 hole double row AV jack(top line Green