ZTE ME3630 Users Manual

ME36

30

H

ARDWARE DEVELOPMENT GUIDE

Version: V1.0

Date: 2016-02-26

LTE Module Series

Website: www.ztewelink.com

E-mail: ztewelink@zte.com.cn

ME3630

Hardware Development Guide

L

EGAL INFORMATION

By receiving the document from Shenzhen ZTEWelink Technology Co., Ltd (shortly referred to as ZTEWelink), you are deemed

to have agreed to the following terms. If you don’t agree to the following terms, please stop using the document.

proprietary information. Without the prior written permission of ZTEWelink, no entity or individual is allowed to reproduce, transfer,

distribute, use and disclose this document or any image, table, data or other information contained in this document.

is the registered trademark of ZTEWelink. The name and logo of ZTEWelink are ZTEWelink’s trademark or

registered trademark. Meanwhile, ZTEWelink is granted to use ZTE Corporation’s registered trademark. The other products or

company names mentioned in this document are the trademark or registered trademark of their respective owner. Without the prior

written permission of ZTEWelink or the third-party oblige, no one is allowed to read this document.

The product meets the design requirements of environmental protection and personal security. The storage, use or disposal of

products should abide by the product manual, relevant contract or the laws and regulations of relevant country.

ZTEWelink reserves the right to make modifications on the product described in this document without prior notice, and keeps

the right to revise or retrieve the document any time.

If you have any question about the manual, please consult the company or its distributors promptly.

R

EVISION HISTORY

Version Date Description

1.0 2016-02-26 1st released version

ME3630

Hardware Development Guide

A

BOUT THIS DOCUMENT

A. Application Range

This document is the Product Technical Specification for the ME3630 GSM/CDMA/WCDMA/ TD-SCDMA/LTE TDD/LTE FDD

module. It defines the high level product features and illustrates the interface for these features. This document is intended to cover

the hardware aspects of the product, including electrical and mechanical.

B. Reading Note

The symbols below are the reading notes you should pay attention on:

: Warning or Attention

: Note or Remark

C. Purpose

This document provides the hardware solutions and development fundamentals for a product with the module. By reading this

document, the user can have an overall knowledge of the module and a clear understanding of the technical parameters. With this

document, the user can successfully fulfill the application and development of wireless Internet product or equipment.

Besides the product features and technical parameters, this document also provides the product reliability tests and related

testing standards, RF performance indexes and a guide on the design of user circuits, to provide the user with a complete design

reference.

NOTE: To ensure the module manufacturing and welding quality, do as the chapter 7 of Manufacturing Guide in this document. The force on

the squeegee should be adjusted so as to produce a clean stencil surface on a single pass and ensure the module soldering quality.

D. Abbreviations

Table below is a list of abbreviations involved in this document, as well as the English full names.

Abbreviations Full Name

3GPP Third Generation Partnership Project

AP Another name of DTE

CHAP Challenge Handshake Authentication Protocol

CE European Conformity

CMOS Complementary Metal Oxide Semiconductor

DCE Data Communication Equipment

DL Downlink

DTE Data Terminal Equipment

EIA Electronic Industries Association

EMC Electromagnetic Compatibility

ESD Electro-Static discharge

ESR Equivalent Series Resistance

FDD Frequency Division Duplex

GPIO General-purpose I/O

LCC Leadless Chip Carrier

ME3630

Hardware Development Guide

LDO Low-Dropout

LED Light Emitting Diode

LTE Long Term Evolution

ME Mobile Equipment

MO Mobile Origination Call

MT Mobile Termination Call

MSB Most Significant Bit

PC Personal Computer

PCB Printed Circuit Board

PDA Personal Digital Assistant

PDU Protocol Data Unit

PAP Password Authentication Protocol

PPP Point to Point Protocol

RTC Real Time Clock

SMS Short Messaging Service

SMT Surface Mount Technology

SPI Serial Peripheral Interface

TBD To Be Determined

TCP Transmission Control Protocol

TIS Total Isotropic Sensitivity

TRP Total Radiated Power

TVS Transient Voltage Suppressor

UART Universal Asynchronous Receiver-Transmitter

UDP User Datagram Protocol

UL Up Link

USB Universal Serial Bus

USIM Universal Subscriber Identity Module

URC Unsolicited result code

VIH Logic High level of input voltage

VIL Logic Low level of input voltage

VOH Logic High level of output voltage

VOL Logic Low level of output voltage

ME3630

Hardware Development Guide

S

AFETY INFORMATION

The following safety precautions must be observed during all phases of the operation, such as usage, service or repair of any

cellular terminal or mobile incorporating ME3610 module. Manufacturers of the cellular terminal should send the following safety

information to users and operating personnel and to incorporate these guidelines into all manuals supplied with the product. If not

so, ZTEWelink does not take on any liability for customer failure to comply with these precautions.

Full attention must be given to driving at all times in order to reduce the risk of an accident. Using a

mobile while driving (even with a hands free kit) cause distraction and can lead to an accident. You must

comply with laws and regulations restricting the use of wireless devices while driving.

Switch off the cellular terminal or mobile before boarding an aircraft. Make sure it switched off. The

operation of wireless appliances in an aircraft is forbidden to prevent interference with communication

systems. Consult the airline staff about the use of wireless devices on boarding the aircraft, if your device

offers a Airplane Mode which must be enabled prior to boarding an aircraft.

Switch off your wireless device when in hospitals or clinics or other health care facilities. These

requests are designed to prevent possible interference with sensitive medical equipment.

GSM cellular terminals or mobiles operate over radio frequency signal and cellular network and

cannot be guaranteed to connect in all conditions, for example no mobile fee or an invalid SIM card. While

you are in this condition and need emergent help, please remember using emergency call. In order to make

or receive call, the cellular terminal or mobile must be switched on and in a service area with adequate

cellular signal strength.

Your cellular terminal or mobile contains a transmitter and receiver. When it is on, it receives and

transmits radio frequency energy. RF interference can occur if it is used close to TV set, radio, computer or

other electric equipment.

In locations with potentially explosive atmospheres, obey all posted signs to turn off wireless devices

such as your phone or other cellular terminals. Areas with potentially explosive atmospheres including

fuelling areas, below decks on boats, fuel or chemical transfer or storage facilities, areas where the air

contains chemicals or particles such as grain, dust or metal powders.

Hardware Development Guide

C

ONTACT INFORMATION

Post 9/F, Tower A, Hans Innovation Mansion,

Web www.ztewelink.com

Phone +86-755-26902600

E-Mail ztewelink@zte.com.cn

Note: Consult our website for up-to-date product descriptions, documentation, application notes, firmware upgrades, troubleshooting tips,

and press releases

Besides, ZTEWelink provides various technical support ways to the customers, such as support by phone, website, instant

messaging, E-mail and on-site.

North Ring Rd., No.9018, Hi-Tech Industrial Park,

Nanshan District, Shenzhen.

ME3630

Hardware Development Guide

C

ONTENTS

1. Product Overview ......................................................................................................................................................................... 1

1.1. General Description....................................................................................................................................................................................................... 1

1.2. Key Features ........................................................................................................................................................................................................ 2

1.3. Function Diagram ........................................................................................................................................................................................................ 4

1.4. Evaluation Board ........................................................................................................................................................................................................ 5

2. Application Interface ..................................................................................................................................................................... 6

2.1. General Description ............................................................................................................................................................................. 6

2.2. Pin Assignment ................................................................................................................................................................................... 6

2.3. Pin Description ................................................................................................................................................................................... 7

2.4. Power Supply ................................................................................................................................................................................. 13

2.4.1. Power Supply Pins ................................................................................................................................................................... 13

2.4.2. Decrease Voltage Drop ............................................................................................................................................................ 13

2.4.3. Reference Circuit of Power Supply .......................................................................................................................................... 13

2.5. Turn on Scenarios .............................................................................................................................................................................. 14

2.6. USIM Card Interface........................................................................................................................................................................... 15

2.6.1. Description of PINs .................................................................................................................................................................. 15

2.6.2. Design Considerations for USIM Card Holder .......................................................................................................................... 17

2.7. USB Interface ................................................................................................................................................................................. 18

2.8. UART Interface ................................................................................................................................................................................. 20

2.9. Network Status Indication ................................................................................................................................................................. 22

2.10. ADC Interface ................................................................................................................................................................................. 22

2.11. WAKEUP_OUT Signal ....................................................................................................................................................................... 23

2.12. GPIO Interface ............................................................................................................................................................................... 23

3. Antenna Interface ....................................................................................................................................................................... 24

3.1. Pin Definition ................................................................................................................................................................................. 24

3.2. Reference Design ............................................................................................................................................................................... 24

3.3. Reference PCB Layout of Antenna ..................................................................................................................................................... 24

3.4. Suggestions for EMC & ESD Design .................................................................................................................................................... 25

3.4.1. EMC Design Requirements ...................................................................................................................................................... 25

3.4.2. ESD Design Requirements ....................................................................................................................................................... 25

3.5. Test Methods for Whole-Set Antenna OTA ....................................................................................................................................... 26

4. Electrical, Reliability and Radio Characteristics ............................................................................................................................ 27

4.1. Absolute Maximum Ratings ............................................................................................................................................................... 27

4.2. Operating Temperature ..................................................................................................................................................................... 27

4.3. Current Consumption ........................................................................................................................................................................ 27

4.4. RF Output Power ............................................................................................................................................................................... 28

4.5. RF Receiving Sensitivity ...................................................................................................................................................................... 28

4.6. GNSS Technical Parameters ............................................................................................................................................................... 29

ME3630

Hardware Development Guide

4.7. Electrostatic Discharge ...................................................................................................................................................................... 29

5. Mechanical Dimensions .............................................................................................................................................................. 30

5.1. Mechanical Dimensions of the Module ............................................................................................................................................. 30

5.2. Footprint of Recommendation .......................................................................................................................................................... 31

5.3. Top View of the Module .................................................................................................................................................................... 32

5.4. Bottom View of the Module .............................................................................................................................................................. 32

6. Related Test & Test Standard ...................................................................................................................................................... 33

6.1. Testing Reference .............................................................................................................................................................................. 33

6.2. Description of Testing Environment .................................................................................................................................................. 34

6.3. Reliability Testing Environment ......................................................................................................................................................... 35

7. SMT Process and Baking Guide .................................................................................................................................................... 36

7.1. Storage Requirements ....................................................................................................................................................................... 36

7.2. Module Plainness Standard ............................................................................................................................................................... 36

7.3. Process Routing Selection .................................................................................................................................................................. 36

7.3.1. Solder Paste Selection ............................................................................................................................................................. 36

7.3.2. Design of module PAD’s steel mesh opening on main board .................................................................................................. 36

7.3.3. Module Board’s SMT process .................................................................................................................................................. 37

7.3.4. Module Soldering Reflow Curve .............................................................................................................................................. 38

7.3.5. Reflow method ........................................................................................................................................................................ 39

7.3.6. Maintenance of defects .......................................................................................................................................................... 39

7.4. Module’s Baking Requirements ......................................................................................................................................................... 40

7.4.1. Module’s Baking Environment ................................................................................................................................................ 40

7.4.2. Baking device and operation procedure ................................................................................................................................. 40

7.4.3. Module Baking Conditions ...................................................................................................................................................... 40

ME3630

Hardware Development Guide

T

ABLES

Table 1-1 ME3630 Reference Using Area .................................................................................................................................................. 1

Table 1-2 ME3630 Supported Band ........................................................................................................................................................... 1

Table 1-3 ME3630 Key Features ............................................................................................................................................................. 3

Table 2-1 IO Parameters Definition ........................................................................................................................................................ 7

Table 2-2 Logic levels Description ........................................................................................................................................................... 8

Table 2-3 Pin Description ........................................................................................................................................................................ 8

Table 2-4 Power Supply ........................................................................................................................................................................ 13

Table 2-5 POWER_ON/OFF Pin Description .......................................................................................................................................... 14

Table 2-6 Power-on Time...................................................................................................................................................................... 15

Table 2-7 Pin Definition of the USIM Interface ..................................................................................................................................... 15

Table 2-8 Pin Description of Molex USIM Card Holder ......................................................................................................................... 17

Table 2-9 Pin Description of Amphenol USIM Card Holder .................................................................................................................. 18

Table 2-10 USB Pin Description ............................................................................................................................................................ 19

Table 2-11 Pin Definition of the Main UART Interface .......................................................................................................................... 20

Table 2-12 Pin Definition of the Debug UART Interface ....................................................................................................................... 20

Table 2-13 Pin Definition of Network Indicator .................................................................................................................................... 22

Table 2-14 Working State of the Network Indicator ............................................................................................................................. 22

Table 2-15 Pin Definition of the ADC .................................................................................................................................................... 22

Table 2-16 Characteristic of the ADC .................................................................................................................................................... 23

Table 2-17 Pin Definition of WAKEUP_OUT .......................................................................................................................................... 23

Table 2-18 Pin Definition of GPIO ......................................................................................................................................................... 23

Table 3-1 Pin Definition of GPIO ........................................................................................................................................................... 24

Table 4-1 Absolute Maximum Ratings .................................................................................................................................................. 27

Table 4-2 Operating Temperature ........................................................................................................................................................ 27

Table 4-3 Averaged standby DC power consumption [1] ..................................................................................................................... 27

Table 4-4 Averaged standby DC power consumption [2] ..................................................................................................................... 27

Table 4-5 Averaged standby DC power consumption [3] ..................................................................................................................... 28

Table 4-6 Conducted RF Output Power ................................................................................................................................................ 28

Table 4-7 Conducted RF Receiving Sensitivity [1] ................................................................................................................................. 28

Table 4-8 Conducted RF Receiving Sensitivity [2] ................................................................................................................................. 28

Table 4-9 GNSS Technical Parameters .................................................................................................................................................. 29

Table 4-10 ESD ...................................................................................................................................................................................... 29

Table 6-1 Testing Standard ................................................................................................................................................................... 33

Table 6-2 Testing Environment ............................................................................................................................................................. 34

Table 6-3 Testing Instrument & Device ................................................................................................................................................ 34

Table 6-4 Reliability Features ............................................................................................................................................................... 35

Table 7-1 Baking parameters ................................................................................................................................................................ 36

Table 7-2 LCC module PAD’s steel mesh opening ................................................................................................................................. 36

ME3630

Hardware Development Guide

F

IGURES

Figure 1-1 System Connection Structure ................................................................................................................................................ 5

Figure 2-1 Pin Assignment ...................................................................................................................................................................... 7

Figure 2-2 Structure of the Power Supply ............................................................................................................................................. 13

Figure 2-3 Reference circuit of AAT2138 .............................................................................................................................................. 14

Figure 2-4 Reference circuit of LDO ...................................................................................................................................................... 14

Figure 2-5 Timing of Turning on Mode ................................................................................................................................................. 15

Figure 2-6 Reference Circuit of the 8 Pin USIM Card ............................................................................................................................ 15

Figure 2-7 Reference Circuit of the 6 Pin USIM Card ............................................................................................................................ 16

Figure 2-8 Molex 91228 USIM Card Holder .......................................................................................................................................... 17

Figure 2-9 Amphenol C707 10M006 512 2 USIM Card Holder ............................................................................................................. 18

Figure 2-10 Reference Circuit of USB Application ................................................................................................................................. 19

Figure 2-11 Reference Circuit of USB Communication between module and AP ................................................................................. 19

Figure 2-12 Reference Circuit of Logic Level Translator........................................................................................................................ 21

Figure 2-13 RS232 Level Match Circuit ................................................................................................................................................. 21

Figure 2-14 Reference Circuit of Main UART with 4 Line Level Translator ........................................................................................... 21

Figure 2-15 Reference Circuit of UART with 2 Line Level Translator .................................................................................................... 21

Figure 2-16 Reference Circuit of the Network Indicator ....................................................................................................................... 22

Figure 2-17 The output signal of WAKEUP_OUT .................................................................................................................................. 23

Figure 3-1 Reference Circuit of Antenna Interface ............................................................................................................................... 24

Figure 3-2 The OTA test system of CTIA................................................................................................................................................ 26

Figure 5-1 ME3630 Top and Side Dimensions ...................................................................................................................................... 30

Figure 5-2 ME3630 Bottom Dimensions (Bottom view) ....................................................................................................................... 30

Figure 5-3 Recommended Footprint (Top view) ................................................................................................................................... 31

Figure 5-4 Location and dimension of test points ................................................................................................................................ 31

Figure 5-5 Top View of the Module ...................................................................................................................................................... 32

Figure 5-6 Bottom View of the Module ................................................................................................................................................ 32

Figure 7-1 Module Board’s Steel Mesh Diagram .................................................................................................................................. 37

Figure 7-2 Material Module Pallet ........................................................................................................................................................ 37

Figure 7-3 Tape Reel Dimension ........................................................................................................................................................... 38

Figure 7-4 Module Furnace Temperature Curve Reference Diagram ................................................................................................... 39

Hardware Development Guide

1. P

RODUCT OVERVIEW

1.1. G

ENERA L DES CRIPTION

ME3630 is a GSM/CDMA/ WCDMA/ TD-SCDMA/LTE TDD/LTE FDD wireless communication module with LCC interface. It is

widely applied to but not limited to the various products and equipment such as laptops, vehicle-mounted terminals, and electric

devices, by providing data services.

ME3630 a GSM/CDMA/ WCDMA/ TD-SCDMA/LTE TDD/LTE FDD wireless communication module. ME3630 contains three

variants ME3630-C1A, ME3630-C1B, ME3630-U1A, ME3630-E1A. Customer can choose the dedicated type based on the wireless

network configuration. The following tables show entire radio band configuration of ME3630 series.

Table 1-1 ME3630 Reference Using Area

Variants Description

ME3630-C1A GSM B3/8,CDMA1X CDMA EVDO,WCDMA B1,TD-SCDMA B34/39,LTE FDD B1/3,LTE TDD B38/39/40/41 for China

ME3630-C1B

GSM B3/8，CDMA1X CDMA EVDO，WCDMA B1，TD-SCDMA B34/39，LTE FDD B1/3，LTE TDD

B38/39/40/41 （GNSS and Rx-diversity are not supported yet）for China

ME3630-U1A WCDMA B2/5,LTE FDD B2/4/5/12/17 for America

ME3630-E1A GSM B3/8,WCDMA B1/8,LTE FDD B1/3/7/8/20 for Europe

Table 1-2 ME3630 Supported Band

PID RF support RF Band Transmit Frequency (TX) Receive Frequency (RX) Maximum Output Power

GSM B3 1710 to 1785 MHz 1805 to 1880 MHz 30dBm±2dBm

B8 880 to 915 MHz 925 to 960 MHz 33dBm±2dBm

ME3630-C1A

ME3630-U1A

CDMA

(EVDO/CDMA1X)

WCDMA B1 1920 to 1980 MHz 2110 to 2170 MHz 24dBm+1/-3dBm

TD-SCDMA B34 2010 to 2025 MHz 2010 to 2025 MHz 24dBm+1/-3dBm

LTE FDD B1

LTE TDD B38

LTE FDD

WCDMA

BC0 824 to 849MHz 869 to 894 MHz 23dBm~30dBm

B39 1880 to 1920 MHz 1880 to 1920 MHz 24dBm+1/-3dBm

B3

B39

B40

B41

B2

B4

B5

B12

B17

B2

B5

1920 to 1980 MHz

1710 to 1785 MHz

2570 to 2620MHZ

1880 to 1920MHZ

2300 to 2400MHZ

2496 to 2690MHZ

1850 to 1910 MHz

1710 to 1755 MHz

824 to 849 MHz

698 to 716 MHz

704 to 716 MHz

1850 to 1910 MHz

824 to 849 MHz

2110 to 2170 MHz

1805 to 1880MHZ

2570 to 2620MHZ

1880 to 1920MHZ

2300 to 2400MHZ

2496 to 2690MHZ

1930 to 1990 MHz

2110 to 2155 MHz

869 to 894 MHz

728 to 746 MHz

734 to 746 MHz

1930 to 1990 MHz

869 to 894 MHz

23dBm±2.7dBm

24dBm+1/-3dBm

Hardware Development Guide

LTE FDD

ME3630-E1A

NOTE:



For convenience of description, in the next content, the “ME3630” means the “ME3630 product serials”.



With a tiny profile of 30.0mm×30.0mm×2.3mm (without label, the label is 0.1mm), ME3630 can meet almost all requirements for M2M

application such as automotive, metering, tracking system, security solutions, routers, wireless POS, mobile computing devices, PDA phone

and tablet PC, etc.



ME3630 is an SMD type module, which can be embedded in customer application through its 96-pin pads including 80 LCC signal pads and

16 ground pads.

WCDMA

GSM

B1

B3

B7

B8

B20

B1

B8

B3

B8

1920 to 1980 MHz

1710 to 1785 MHz

2500 to 2570 MHz

880 to 915 MHz

832 to 862 MHz

1920 to 1980 MHz

880 to 915MHZ

1710 to 1785 MHz

880 to 915 MHz

2110 to 2170 MHz

1805 to 1880 MHz

2620 to 2690 MHz

925 to 960 MHz

791 to 821 MHz

2110 to 2170 MHz

925 to 960MHZ

1805 to 1880 MHz

925 to 960 MHz

23dBm±2.7dBm

24dBm+1/-3dBm

30dBm±2dBm

33dBm±2dBm



ME3630 is integrated with internet service protocols like TCP/UDP and PPP. Extended AT commands have been developed for customer to

use these internet service protocols easily.

1.2. K

EY FEATUR ES

The table below describes the detailed features of the ME3630 module.

Hardware Development Guide

Table 1-3 ME3630 Key Features

Feature Description

Physical

Power Supply

Frequency Bands

Transmission Date

Transmitting Power

Small form factor-30 mm × 30 mm × 2.3mm

RF connection pads (RF main interface)

LCC with 80 pins

The range of voltage supply is 3.4V-4.2V, typical value is 3.8V

C1A/C1B

U1A LTE FDD B2/B4 /B5/B12/B17

E1A LTE FDD B1/B3 /B7/B8/B20

LTE : Max 150Mbps(DL)/Max 50Mbps(UL)

Class 3 (23dBm±2.7dBm) for LTE

LTE FDD B1/B3

LTE TDD B38/B39/B40/B41

WCDMA B1

CDMA BC0

TD-SCDMA B34/B39

GSM B3/B8

WCDMA B2/B5

WCDMA B1/B8

GSM B3/B8

Internet Protocol Features

USIM Interface

UART Interface

USB Interface

Support TCP/PPP/UDP protocols

Support the protocols PAP and CHAP usually used for PPP connections

1.8v/3v support

SIM extraction/hot plug detection

Support SIM and USIM

Supports SIM application tool kit with proactive SIM commands

Support two UART interface: main UART interface and debug UART interface

Main UART interface:

Eight lines on main UART interface

Support RTS and CTS hardware flow control

Baud rate can reach up to 921600 bps,115200 bps by default

Used for AT command, data transmission or firmware upgrade

Multiplexing function

Debug UART interface:

Two lines on debug UART interface, can be used for software debug, firmware upgrade

Compliant with USB 2.0 specification (slave only)

Used for AT command communication, data transmission, software debug and firmware upgrade.

USB Driver: Support W indows XP, W indows Vista, Windows 7, Windows 8, Windows

Hardware Development Guide

10,Windows CE5.0/6.0 and later, Linux 2.6.20 and later, Android 2.3/4.X/5.X

SDIO interface

Antenna Interface

Rx-diversity

AT commands

Network Indication

SMS

Temperature Range

Firmware Upgrade

NOTE:

1.1)means when the module works within this temperature range, RF performance might degrade. For example, the frequency error and the phase

error would increase.

1.8v support (full speed) 4bits,SDIO compatible to WLAN (802.11)

Include main antenna ,diversity antenna and GPS antenna(C1B is not included)

Support WCDMA/LTE Rx-diversity(C1B is not included)

Compliant with 3GPP TS 27.007,27.005 and ZTEWelink enhanced AT commands

Use LED_MODE to indicate network connectivity status

Text and PDU mode

Point to point MO and MT

SMS saving/reading to SIM card or ME storage

SMS cell broadcast

Normal operation: -30°C to +75°C

Restricted operation1): -40°C~ -30°C and +75°C~ +85°C1)

Storage temperature: -40°C to +85°C

USB interface or main UART interface, debug UART interface

1.3. F

UNCTION DIAGRA M

The figure below shows a block diagram of the ME3630 and illustrates the major functional parts.

 Power management  Baseband  Memory (512MB flash + 256MB LPDDR2)  Radio frequency  Peripheral interface

--UART interface

--USIM card interface

--USB interface

--SDIO interface

--SPI interface

--I2C interface

--ADC interface

--Status interface (LED)

Hardware Development Guide

1.4. E

VALUATION BOARD

Figure 1-1 System Connection Structure

In order to help you to develop applications with ME3630, ZTEWelink supplies an evaluation board (G2000), RS-232 to USB

cable, USB data cable, power adapter, antenna and other peripherals to control or test the module. For details, please refer to the

related document [ZTEWelink G2000 Dev Board User Guide_V1.2].

Hardware Development Guide

2. A

PPLICATION INTERFACE

2.1. G

customer’s cellular application platform. Sub-interface included in these pads is described in detail in the following chapters:

2.2. P

ENERA L DES CRIPTION

ME3630 is equipped with an 80-pin 0.72mm pitch SMT pads plus 16-pin ground pads and reserved pads that connect to

 Pin assignment  Pin description  Power supply  Turn on/off scenarios  USIM interface  USB interface  HSIC interface  UART interface  SDIO interface  SPI interface  Network status interface (LED)  ADC interface  WAKEUP_OUT signal  GPIO interface

IN ASSIGNME NT

The following figure shows the pin assignment of the ME3630 module.

Hardware Development Guide

NOTE: Keep all reserved pins and unused pins unconnected.

2.3. P

IN DES CRIPT ION

The following table shows the IO Parameters Definition.

Type Description

IO Bidirectional input/output

DI Digital input

DO Digital output

PI Power input

PO Power output

AI Analog input

AO Analog output

OD Open drain

The logic levels are described in the following table.

Figure 2-1 Pin Assignment

Table 2-1 IO Parameters Definition

Hardware Development Guide

Table 2-2 Logic levels Description

Parameter Min Max Unit

VIH 0.65*VDD_IO VDD_IO+0.3 V

VIL -0.3 0.35* VDD_IO V

VOH VDD_IO-0.45 VDD_IO V

VOL 0 0.45 V

NOTE: VDD_IO is the voltage level of pins.

The following tables show the ME3630’s pin definition.

Table 2-3 Pin Description

Power Supply

Pin Name Pin NO. I/O Description DC Characteristics Comment

V_BAT 50.51 PI Power supply for

module

VREF_1V8 5 PO Provide 1.8V for

external circuit

GND 3,9,11,20,21,31,36,

46,49,52, 61,63,78,

80,

Turn On/Off

Pin Name Pin NO. I/O Description DC Characteristics Comment

POWER_ON 1 DI Turn on/off module VIH max = 2.1V

RESET_N 2 DI Reset module VIH max = 2.1V

Status Indication

Pin Name Pin NO. I/O Description DC Characteristics Comment

Ground

Vmax = 4.2V

Vmin = 3.4V

Vnorm = 3.8V

Vnorm = 1.8V

Imax = 300mA

VIH min = 1.17V

VIL max = 0.63V

VIH min = 1.17V

VIL max = 0.63V

It must be able to provide

sufficient current in a

transmitting burst which

typically rises to 2.0A

Power supply for external

GPIO’S pull up circuits

Pull-up to 1.8V through 100K

resistance, active low

Pull-up to 1.8V through 100K

resistance, active low

LED_MODE 70 DO Indicate the module

USB Interface

Pin Name Pin NO. I/O Description DC Characteristics Comment

USB_DP 24 IO USB differential data

USB_DM 23 IO

USB_VBUS 22 PI USB power

network registration

mode

bus

VOH min = 1.35V

VOL max = 0.45V

Compliant with USB

2.0 standard specification

1.8V power domain

Require differential impedance

of 90Ω

Hardware Development Guide

HSIC Interface

Pin Name Pin NO. I/O Description DC Characteristics Comment

USB_STROBE 25 IO HSIC strobe InterChip USB(HSIC) Require differential impedance

of 90Ω

USB_DATA 26 IO HSIC data

USIM Interface

Pin Name Pin NO. I/O Description DC Characteristics Comment

USIM_VCC 40 PO Power supply for

USIM card

USIM_DATA 38 IO Data signal of USIM

card

USIM_CLK 37 DO Clock signal of USIM

card

USIM_RST 39 DO Reset signal of USIM

card

USIM_DETECT 41 DI USIM card input

detection

ADC Interface

For 1.8V USIM:

Vmax = 1.9V

Vmin = 1.7V

For 3.0V USIM:

Vmax = 3.05V

Vmin = 2.7V

IO max = 50mA

For 1.8V USIM:

VIL max = 0.63V

VIH min = 1.17V

VOL max = 0.45V

VOH min = 1.35V

For 3V USIM:

VIL max = 1.05V

VIH min = 1.95V

VOL max = 0.45V

VOH min = 2.6V

For 1.8V USIM:

VOL max = 0.45V

VOH min = 1.35V

For 3V USIM:

VOL max = 0.45V

VOH min = 2.6V

For 1.8V USIM:

VOL max = 0.45V

VOH min = 1.35V

For 3V USIM:

VOL max = 0.45V

VOH min = 2.6V

VIL min = -0.3V

VIL max = 0.63V

VIH min = 1.17V

VIH max = 2.1V

Either 1.8V or 3V is supported

by the module automatically

Pull-up to USIM_VCC with 10k

resistor internally

1.8V power domain.

Pulled up by default.

Active low

Hardware Development Guide

Pin Name Pin NO. I/O Description DC Characteristics Comment

ADC1 48 AI Analog to digital 0.05V to 1.75V

ADC2 47 AI Analog to digital 0.05V to 1.75V

Main UART Interface

Pin Name Pin NO. I/O Description DC Characteristics Comment

UART_RI 60 DO Ring indicator VOL max = 0.45V

VOH min = 1.35V

UART_DCD 59 DO Data carrier

detection

UART_CTS 56 DO Clear to send VOL max = 0.45V

UART_RTS 55 DI Request to send VIL min = -0.3V

UART_DTR 58 DI Data terminal ready VIL min = -0.3V

UART_DSR 57 DI Data set ready VIL min = -0.3V

UART_TXD 53 DO Transmit data VOL max = 0.45V

UART_RXD 54 DI Receive data VIL min = -0.3V

Debug UART Interface

VOL max = 0.45V

VOH min = 1.35V

VIL max = 0.63V

VIH min = 1.17V

VIH max = 2.1V

VIL max = 0.63V

VIH min = 1.17V

VIH max = 2.1V

VIL max = 0.63V

VIH min = 1.17V

VIH max = 2.1V

VOH min = 1.35V

VIL max = 0.63V

VIH min = 1.17V

VIH max = 2.1V

1.8V power domain

1.8V power domain.

1.8V power domain

Pin Name Pin NO. I/O Description DC Characteristics Comment

UART_DEBUG_TXD 68 DO Transmit data VOL max = 0.45V

UART_DEBUG_RXD 67 DI Receive data VIL min = -0.3V

RF Interface

Pin Name Pin NO. I/O Description DC Characteristics Comment

MAIN_ANT 62 IO Main antenna 50Ω impedance

1.8V power domain

VOH min = 1.35V

1.8V power domain

VIL max = 0.63V

VIH min = 1.17V

VIH max = 2.1V

Hardware Development Guide

DIV_ANT 79 AI Diversity antenna 50Ω impedance

GPS_ANT 10 IO GPS antenna 50Ω impedance

I2C Interface

Pin Name Pin NO. I/O Description DC Characteristics Comment

I2C_SCL 73 DO I2C serial clock VOL max = 0.45V

VOH min = 1.35V

I2C_SDA 74 IO I2C serial data VOL max = 0.45V

VOH min = 1.35V

VIL min = -0.3V

VIL max = 0.63V

VIH min = 1.17V

VIH max = 2.1V

SDIO Interface

Pin Name Pin NO. I/O Description DC Characteristics Comment

SDIO_CMD 14 IO Secure digital CMD VOL max = 0.45V

VOH min = 1.35V

VIL min = -0.3V

VIL max = 0.63V

VIH min = 1.17V

VIH max = 2.1V

SDIO_CLK 19 DO Secure digital CLK VOL max = 0.45V

VOH min = 1.35V

SDIO_D0 15 IO Secure digital IO data

bit 0

VOL max = 0.45V

VOH min = 1.35V

VIL min = -0.3V

VIL max = 0.63V

VIH min = 1.17V

VIH max = 2.1V

External pull-up

resistor is required

External pull-up

resistor is required

1.8V power domain

External pull-up 10k resistor is

required

1.8V power domain

SDIO_D1 16 IO Secure digital IO data

SDIO_D2 17 IO Secure digital IO data

bit 1

bit 2

VOL max = 0.45V

VOH min = 1.35V

VIL min = -0.3V

VIL max = 0.63V

VIH min = 1.17V

VIH max = 2.1V

VOL max = 0.45V

VOH min = 1.35V

VIL min = -0.3V

VIL max = 0.63V

VIH min = 1.17V

VIH max = 2.1V

1.8V power domain

Hardware Development Guide

SDIO_D3 18 IO Secure digital IO data

bit 3

SDIO Interface

Pin Name Pin NO. I/O Description DC Characteristics Comment

SPI_MISO 32 IO SPI main input slave

output

SPI_MOSI 33 IO SPI main output slave

input

SPI_CLK 34 DO SPI clock VOL max = 0.45V

SPI_CS_N 35 DO SPI segment VOL max = 0.45V

Other Pins

VOL max = 0.45V

VOH min = 1.35V

VIL min = -0.3V

VIL max = 0.63V

VIH min = 1.17V

VIH max = 2.1V

VOL max = 0.45V

VOH min = 1.35V

VIL min = -0.3V

VIL max = 0.63V

VIH min = 1.17V

VIH max = 2.1V

VOL max = 0.45V

VOH min = 1.35V

VIL min = -0.3V

VIL max = 0.63V

VIH min = 1.17V

VIH max = 2.1V

VOH min = 1.35V

1.8V power domain

Pin Name Pin NO. I/O Description DC Characteristics Comment

WAKEUP_IN 72 DI Sleep mode control VIL min = -0.3V

VIL max = 0.45V

VIH min = 1.53V

VIH max = 2.1V

WAKEUP_OUT 71 DO Output wakeup signal VOL max = 0.8V

VOH min = 1.35V

GPIO 7, 8, 12, 13, 27, 28,

29, 30, 64, 65, 75,

76,7 7

NC 4,6,66,42,43,44,45 No connection NC

IO General input/output VOL max = 0.45V

VOH min = 1.35V

VIL min = -0.3V

VIL max = 0.63V

VIH min = 1.17V

VIH max = 2.1V

1.8V power domain. Pull-up by

default. Low level wakes up

the module

Wakeup external circuits

If unused, keep them floating.

Hardware Development Guide

2.4. P

OW ER SUPPLY

2.4.1. P

to be connected to the ground on the system board. If the GND signal is not connected completely, the performance of module will

be affected.

2.4.2. D

capacitor of about 100 µF with low ESR should be used. Multi -layer ceramic chip (MLCC) capacitor can provide the best combination

of low ESR. Three ceramic capacitors (100nF, 33pF, 10pF) are recommended to be applied to the V_BAT pins. The capacitors should

be placed close to the ME3630’s V_BAT pins. The following figure shows structure of the power supply.

OWER SUPPLY PINS

The ME3630 is supplied through the V_BAT signal with the following characteristics.

Pin Name Pin NO. Description Minimum Typical Maximum Unit

V_BAT 50,51 Power supply for module 3.4 3.8 4.2 V

GND 3, 9, 11, 20, 21, 31, 36,

46, 49, 52, 61, 63, 78, 80,

GND signal (Pin No: 3/9/11/20/21/31/36/46/49/52/61/63/78/80) is the power and signal ground of the module, which needs

ECREASE VOLTAGE DROP

The power supply range of the module is 3.4V~ 4.2V. Because of the voltage drop during the transmitting time, a bypass

Table 2-4 Power Supply

Ground - -

Figure 2-2 Structure of the Power Supply

NOTES: The rated current of FB1 should be more than 2.5A.

The PCB traces from the V_BAT pins to the power source must be wide enough to ensure that there isn’t too much voltage

drop occurs in the transmitting procedure. The width of V_BAT trace should be no less than 2mm, and the principle of the V_BAT

trace is the longer, the wider.

In poor situation of the network is, the antenna will transmit at the maximum power, and the transient maximum peak current

can reach as high as 2A. So the power supply capacity of system board needs to be above 2.5A to satisfy the requirement of module

peak current; and the average current on the system side needs to be above 0.9A.

2.4.3. R



AAT2138 shows as figure below. Place a tantalum capacitor of 330uF at the input of the chip. Place a 220uF and 33uF capacitor

tantalum capacitors at the output of the chip. This circuit fully meets the module power requirements. The current capacity of

inductance L5 is greater than 3A,Please visit http://www.analogictech.com for more information of AAT2138.

EFERENCE CIRCUIT OF POWER SUPPLY

Option One: DC\DC switching

The over-current capability requirement of DC/DC switching power supply needs to be above 2.5A. The reference circuit of

Hardware Development Guide

Figure 2-3 Reference circuit of AAT2138



Option Two: LDO

The over-current capability of LDO is above 2.5A.

As the poor transient response of linear regulator, large capacitors should be placed at the input and output of LDO, place a

capacitor above 100uF at output of LDO,R2、R3 recommend 1% accuracy. The reference power supply circuit design with LDO is

shown as figure below:

Figure 2-4 Reference circuit of LDO

2.5. T

URN O N SCENARIO S

The following table shows the pin definition of POWER_ON/OFF.

Pin Name Pin NO. I/O Description Comment

POWER_ON 1 DI Turn on/off the module

The power on scenarios is illustrated as the following figure, the module power on and running when the POWER_ON pin keep

in low level.

Table 2-5 POWER_ON/OFF Pin Description

1.8V power domain，low active

Hardware Development Guide

Figure 2-5 Timing of Turning on Mode

Table 2-6 Power-on Time

Parameter Description Min Typical Max Unit

T1 The period that the Power-on signal for power on operation is kept on the low

PWL

2.6. USIM

2.6.1. D

CARD INT ERFAC E

ESCRIPTION OF

PINS

0.1 0.5 -- second

The USIM card interface circuitry meets ETSI and IMT-2000 SIM interface requirements. Both 1.8V and 3.0V USIM cards are

supported.

Table 2-7 Pin Definition of the USIM Interface

Pin Name Pin NO. I/O Description Comment

USIM_VCC 40 PO Power supply for USIM card Either 1.8V or 3V is supported by the module automatically

USIM_DATA 38 IO Data signal of USIM card Pull-up to USIM_VDD with 10k resistor internally

USIM_CLK 37 DO Clock signal of USIM card

USIM_RST 39 DO Reset signal of USIM card

USIM_DETECT 41 DI USIM card input detection 1.8V power domain

GND 36 Ground

The following figure shows the reference design of the 8-pin USIM card.

Figure 2-6 Reference Circuit of the 8 Pin USIM Card

Hardware Development Guide

NOTES:

1. R10~R12 and D5 are applied to suppress the EMI spurious transmission and enhance the ESD protection.Should be closed to J3.

2.USIM_DETECT is used to detect USIM card, which will be low when the USIM card is inserted.

3.The value of C29 shoule be less than 1uF

4.USIM_DETECT is 1.8V power domain,VDD_MCU should be 1.8V.

ME3630 supports USIM card hot-plugging via the USIM_ DETECT pin. For details, refer to document

[ME3630_AT_Commands_Manual_V1.0]. If you do not need the USIM card detect function, keep USIM_ DETECT unconnected.

The reference circuit for using a 6-pin USIM card socket is illustrated as the following figure.

Figure 2-7 Reference Circuit of the 6 Pin USIM Card

NOTES:

1. R14~R16 and D6 are applied to suppress the EMI spurious transmission and enhance the ESD protection.D6 should be closed to J4

2.The value of C33 shoule be less than 1uF.

In order to enhance the reliability and availability of the USIM card in customer’s application, please follow the following

criterion in the USIM circuit design:

 Keep layout of USIM card as close as possible to the module. Assure the possibility of the length of the trace is less than

50mm.

 Keep USIM card signal away from RF and V_BAT alignment.  Assure the ground between module and USIM cassette short and wide. Keep the width of ground and USIM_VCC no less

than 0.5mm to maintain the same electric potential. The decouple capacitor of USIM_VCC should be less than 1uF and

must be near to USIM cassette.

 To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away with each other and shield them with

surrounded ground.

 In order to offer good ESD protection, it is recommended to add TVS such as WILL (http://www.willsemi.com)

ESDA6V8AV6. The 33Ω resistors should be added in series between the module and the USIM card so as to suppress the

EMI spurious transmission and enhance the ESD protection. Please note that the USIM peripheral circuit should be close

to the USIM card socket.

 The pull-up resistor on USIM_DATA line can improve anti-jamming capability when long layout trace and sensitive

occasion is applied.

Hardware Development Guide

2.6.2. D

ESIGN CONSIDERATIONS FOR

USIM C

ARD HOLDER

For 8-pin USIM card holder, it is recommended to use Molex 91228.

Please visit http://www.molex.com for more information.

Figure 2-8 Molex 91228 USIM Card Holder

Table 2-8 Pin Description of Molex USIM Card Holder

Pin Name Pin NO. Function

GND 1 Ground

VPP 2 Not connected

DATA I/O 3 USIM card data

CLK 4 USIM card clock

RST 5 USIM card reset

VDD 6 USIM card power supply

/ 7 Pull-down GND with external circuit. When the tray is present, 4 is connected to 5

/ 8 Not defined

For 6-pin USIM card holder, it is recommended to use Amphenol C707 10M006 512 2.

Please visit http://www.amphenol.com for more information.

Hardware Development Guide

2.7. USB

Mbps), full speed (12 Mbps) and low speed (1.5 Mbps) mode. The USB interface is primarily used for AT command, data transmission,

software debug and firmware upgrade. The following table shows the pin definition of USB interface.

Figure 2-9 Amphenol C707 10M006 512 2 USIM Card Holder

Table 2-9 Pin Description of Amphenol USIM Card Holder

Pin Name Pin NO. Function

GND 1 Ground

VPP 2 Not connected

DATA I/O 3 USIM card data

CLK 4 USIM card clock

RST 5 USIM card reset

VDD 6 USIM card power supply

INT ERFACE

ME3630 contains one integrated USB transceiver which complies with the USB 2.0 specification and supports high speed (480

Hardware Development Guide

Table 2-10 USB Pin Description

Pin Name Pin NO. I/O Description Comment

USB_DP 24 IO USB differential data bus (positive) Require differential impedance of 90Ω

USB_DM 23 IO USB differential data bus (negative) Require differential impedance of 90Ω

USB_VBUS 22 PI USB power USB plug detect

GND 21 Ground

More details about the USB 2.0 specifications, please visit http://www.usb.org/home.

For different use purposes, different designs can be referred to:



When USB is not the desired function, connect differential signal, power and GND via test points.

 Connect USB interface to USB connector directly. The following figure shows the reference circuit of USB interface.

Figure 2-10 Reference Circuit of USB Application

 Reference Circuit of USB Communication between module and AP is the one below. The 0Ω in the figure should be

placed near pin.

Figure 2-11 Reference Circuit of USB Communication between module and AP

In order to ensure the USB interface design corresponding with the USB 2.0 specification, please comply with the following

principles.

It is important to route the USB signal traces as differential pairs with total grounding. The impedance of USB differential trace

is 90ohm.

Pay attention to the influence of junction capacitance of ESD component on USB data lines. Typically, the capacitance value

should be less than 2pF.

Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is important to route the USB

differential traces in inner-layer with ground shielding not only upper and lower layer but also right and left side.

Hardware Development Guide

Keep the ESD components as closer to the USB connector as possible.

2.8. UART

INT ERFAC E

The module provides two UART interfaces: Main UART Port and Debug UART Port. The Main UART Port can work in full

function mode while the Debug UART Port is used for software debugging or Firmware upgrade. The following show the different

features.

Main UART interface support 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600bps baud rate, the default is

115200bps, This interface can be used for data transmission; AT communication or firmware upgrade (upgrade is not supported

currently).

Debug UART interface supports 115200bps baud rate. It can be used for software debug and firmware upgrade. The module is

designed as the DCE (Data Communication Equipment), following the traditional DCE-DTE (Data Terminal Equipment) connection.

The following tables show the pin definition of these two UART interfaces.

Table 2-11 Pin Definition of the Main UART Interface

Pin Name Pin NO. I/O Description Comment

UART_RI 60 DO Ring indicator 1.8V power domain

UART_DCD 59 DO Data carrier detection 1.8V power domain

UART_CTS 56 DO Clear to send 1.8V power domain

UART_RTS 55 DI Request to send 1.8V power domain

UART_DTR 58 DI Data terminal ready 1.8V power domain.

UART_DSR 57 DI Data set ready 1.8V power domain.

UART_TXD 53 DO Transmit data 1.8V power domain

UART_RXD 54 DI Receive data 1.8V power domain

Table 2-12 Pin Definition of the Debug UART Interface

Pin Name Pin NO. I/O Description Comment

UART_DEBUG_TXD 68 DO Transmit data 1.8V power domain

UART_DEBUG_RXD 67 DI Receive data 1.8V power domain

Reference Circuit of Logic Level Translator

ME3630 provides you with a 1.8V UART interface. A level shifter should be used if your application is equipped with a 3.3V

UART interface. A level shifter TXB0108PWR provided by Texas Instruments is recommended. The following figure shows the

reference design of the TXB0108PWR.

Module TXB0108PWR MCU

Hardware Development Guide

Figure 2-12 Reference Circuit of Logic Level Translator

Please visit http://www.ti.com for more information.

A. Reference Circuit between ME3630 and PC

The following figure is an example of connection between ME3630 and PC. A voltage level translator and a RS-232 level

translator chip must be inserted between module and PC, since these two UART interfaces do not support the RS-232 level, while

support the 1.8V CMOS level only.

Module TXB0108PWR MAX3238 DB9 to PC

Figure 2-13 RS232 Level Match Circuit

B. Reference Circuit of Main URAT Port to 4 Line UART Port

The following figure shows the reference circuit of main UART interface with 4 line logic level translator. TXB0104PWR

provided by Texas Instruments is recommended.

Module TXB0104PWR MCU

Figure 2-14 Reference Circuit of Main UART with 4 Line Level Translator

Reference Circuit of URAT Port to 2 line UART Port

The following figure shows the reference circuit of UART interfaces with 2 line logic level translator. TXB0102DCU provided by

Texas Instruments is recommended.

Module TXB0102DCU MCU

Figure 2-15 Reference Circuit of UART with 2 Line Level Translator

Please visit http://www.ti.com for more information.

C. Debugging UART port

Hardware Development Guide

Debugging UART port is a 2-wire interface. It should be connected with its test point or jumper pin during design.

2.9. N

ETWORK STA TUS INDICATI ON

The network indication pin LED_MODE can be used to drive a network status indicator LED. The different modes of status

indicator flashing indicate different network statuses. The following tables describe pin definition and logic level changes in different

network status.

Table 2-13 Pin Definition of Network Indicator

Pin Name Pin NO. I/O Description Comment

LED_MODE 70 DO Indicate the module network registration mode 1.8V power domain

Table 2-14 Working State of the Network Indicator

LED Status Module status

High level, LED on Module is in the standby mode

Low level 1.8s(LED off), High level 0.2s(LED on) PDP activated, and get the IP address

Low level 0.2s(LED off), High level 1.8s(LED on) Socket established(when using External protocol stack, $MYSOCKETLED

should be sent by CMUX to control the LED)

Figure below is the reference circuit design diagram.

Figure 2-16 Reference Circuit of the Network Indicator

2.10. ADC

The module provides two ADCs to digitize the analog signal to 10-bit digital data such as battery voltage, temperature and so

on. Using AT command “AT+ZADC1?” can read the voltage value on ADC1 pin. Using AT command “AT+ZADC2?” can read the voltage

value on ADC2 pin. The read value is expressed in mV. For more details of these AT commands, please refer to document

[ME3630_AT_Commands_Manual_V1.0].

In order to improve the accuracy of ADC, the trace of ADC should be surrounded by ground.

The following table describes the characteristic of the ADC function.

INTERFAC E

Pin Name Pin NO. Description

ADC1 48 General purpose analog to digital converter.

ADC2 47 General purpose analog to digital converter.

Table 2-15 Pin Definition of the ADC

Hardware Development Guide

Table 2-16 Characteristic of the ADC

Item Min Typ. Max Unit

ADC1 voltage range 0.05 1.75 V

ADC2 voltage range 0.05 1.75 V

ADC resolution 15 Bits

2.11. WAKEUP_OUT

SIG NAL

The module provides an AP control interface for communicating with external Application Processor including WAKEUP_OUT.

The following table shows the pin definition of AP control interface.

Table 2-17 Pin Definition of WAKEUP_OUT

Pin Name Pin NO. I/O Description Comment

WAKEUP_OUT 71 DO Output wakeup signal 1.8V power domain

When there is a SMS received by the module, it will output the level shown as the figure below through pin 71.

Figure 2-17 The output signal of WAKEUP_OUT

NOTE: WAKEUP_OUT is only supported SMS by the firmware version of ME3630 currently.

2.12. GPIO

Module provides 8 GPIO pins. The direction and output voltage level of the GPIO can be set by AT command “AT+ZGPIO”. The

input voltage level of the GPIO can also be read by AT command “AT+ZGPIO”. For more details of these AT commands, please refer to

document [ME3630_AT_Commands_Manual_V1.0].

INTERFAC E

Table 2-18 Pin Definition of GPIO

Pin Name Pin NO. I/O Description Comment

GPIO1 7 IO General input/output 1.8V power domain

GPIO2 8 IO General input/output 1.8V power domain

GPIO3 12 IO General input/output 1.8V power domain

GPIO4 13 IO General input/output 1.8V power domain

GPIO5 27 IO General input/output 1.8V power domain

GPIO6 28 IO General input/output 1.8V power domain

GPIO7 29 IO General input/output 1.8V power domain

GPIO8 30 IO General input/output 1.8V power domain

GPIO9 64 IO General input/output 1.8V power domain

GPIO10 65 IO General input/output 1.8V power domain

GPIO11 75 IO General input/output 1.8V power domain

GPIO12 76 IO General input/output 1.8V power domain

GPIO13 77 IO General input/output 1.8V power domain

Hardware Development Guide

3. A

NTENNA INTERFACE

ME3630 antenna interface includes a main antenna, an optional Rx-diversity antenna, which is used for improve receiving

performance. The antenna interface has an impedance of 50Ω.

3.1. P

IN DEFINI TI ON

The main antenna and Rx-diversity antenna pins definition are shown below.

Pin Name Pin NO. I/O Description Comment

MAIN_ANT 62 IO Main antenna 50Ω impedance

DIV_ANT 79 AI Diversity antenna 50Ω impedance

GPS_ANT 10 IO GPS antenna 50Ω impedance

3.2. R

EF ERENC E DESIGN

The antenna is a sensitive device and its performance is greatly affected by external environments. The radiation performance

of the antenna is affected by the module dimensions, antenna position, occupied space size of the antenna, and the grounding of

surrounding components of the antenna. Besides, the fixed assembly of the antenna, the wiring of RF cables on the antenna, and the

fixed position of the antenna all affect the radiation performance of the antenna too.

The reference design of main antenna and Rx-diversity antenna is shown as below. It should reserve a π-type matching circuit

for better RF performance, and place these components as close as possible to the module. The capacitors are not mounted by

default.

Table 3-1 Pin Definition of GPIO

DIV_ANT

0

NC

NOTE: Keep a proper distance between main and diversity antenna to improve the receiving sensitivity. GNSS and Rx-diversity are not

supported by C1B, therefore GNNS antenna design is not concerned in C1B type.

3.3. R

EF ERENC E

Please follow the following criterion in the process of antenna line PCB layout design:

Make sure that the transmission line’s characteristic impedance is 50ohm;

Keep line on the PCB as short as possible, since the antenna line loss shall be less than 0.3 dB;

Line geometry should have uniform characteristics, constant cross section, avoid meanders and abrupt curves;

It is wise to surround the PCB transmission line with ground, avoid having other signal tracks facing directly the antenna line

PCB L

AY OUT O F ANT ENNA

NC

Figure 3-1 Reference Circuit of Antenna Interface

MAIN_ANT

GPS_ANT

NC

0

NC

0

NCNC

Hardware Development Guide

track.

Keep at least one layer of the PCB used only for the ground plane; and use this layer as reference ground plane for the

transmission line;

 The ground surrounding the antenna line on PCB has to be strictly connected to the main Ground Plane by means of via

holes (once per 2mm at least), placed close to the ground edges facing line track;

 Place EMI noisy devices as far as possible from modules antenna line;  Keep the antenna line far away from the module power supply lines;  If EM noisy devices are present on the PCB hosting the Module, such as fast switching ICs, take care of the shielding of

the antenna line by burying it inside the layers of PCB and surround it with ground planes, or shield it with a metal frame

cover.

3.4. S

UG GESTI ONS F OR

EMC & ESD D

ESIGN

3.4.1. EMC

power integrity.

ground of the mainboard. If they cannot be separated, the module should be far from modules and components that might generate

EMI, such as chip and memory, power interface, and data cable interface.

most circuits to avoid overflow of electromagnetic interference, you can spray conductive paint on the surface on non-antenna areas

within the structural components above and below the mainboard, and the conductive paint should be connected to the ground on

the mainboard by several points to shield electromagnetic interference.

the antenna. Thus, it is necessary to wrap conductive cloth around the two data cables and connected them to the ground.

power interface, and data cable interface. The wiring of RF cables should be close to the ground of the mainboard.

line width, so as to effectively reduce the coupling between signals and keep a clean reflux path for the signal.

high-frequency high-speed circuit and the sensitive circuit should be placed far away from the border of PCB. They should better be

separated during layout, so as to reduce the interference between them and protect the sensitive signal.

3.4.2. ESD

input/output signal interface, such as the (U)SIM card signal interface, the ESD device should be placed closely for protection.

Besides, on the side of main board, the user should reasonably design the structure and PCB layout, guarantee that the metallic

shielding shell is fully grounded, so as to leave a smooth discharge channel for ESD.

DESIGN REQUIREMENTS

During the design of the whole device, the user needs to fully consider the EMC problem caused by the signal integrity and

During the product design, it is better to separate the module from the mainboard PCB, instead of installing the module on the

Because the mainboard of PAD, CPE, and Internet laptops does not have a shielding cover, as that of mobile terminals, to shield

Besides, data cables of the LCD and the camera might introduce interference signals, which affect the receiving performance of

RF cables of the antenna should be far from modules and components that might generate EMI, such as chip and memory,

During the layout and wiring of peripheral circuits, for the wiring of power and signal cables, keep a distance of 2 times of the

During the design of peripheral power circuits, the de-coupled capacitor should be placed closed to the module power PIN, the

For the circuit or device on the side of system board that might interfere with the module, it should be shielded during design.

DESIGN REQUIREMENTS

Module is embedded on the side of system board, so the user needs to make the ESD protection during design. For the key

Hardware Development Guide

3.5. T

EST METHOD S FOR WHO LE-SET ANT ENNA

Figure below is the diagram of OTA test system of CTIA. The system is mainly composed of test chamber, high-precision

positioning system and its controller, Windows based PC running test software and RF test instruments with automatic test program.

The main RF instruments are integrated RF test equipment, Spectrum Analyzer, Network Analyzer.

The radio equipments, Relay Switch Unit and PC with automatic test software are communicated via GPIB interface.

OTA

Figure 3-2 The OTA test system of CTIA

Hardware Development Guide

4. E

LECTRICAL, RELIABILITY AND RADIO CHARACTERISTICS

4.1. A

4.2. O

1)

the phase error would increase.

BSOLUTE MAXIMUM RAT INGS

Absolute maximum ratings for power supply and voltage on digital and analog pins of module are listed in the following table:

Parameter Min Max Unit

V_BAT -0.5 6.0 V

Peak current of V_BAT 0 2 A

Voltage at digital pin -0.3 2.1 V

Voltage at ADC1 0.05 1.75 V

Voltage at ADC2 0.05 1.75 V

PERAT ING TEMPERATURE

The operating temperature is listed in the following table.

Parameter Min Typ. Max Unit

Normal Temperature -30 25 75

Storage Temperature -40 85

NOTE:

When the module works within the temperature range, the deviations from the RF specification may occur. For example, the frequency error or

Table 4-1 Absolute Maximum Ratings

Table 4-2 Operating Temperature

℃

4.3. C

URRENT CONSUMPTION

The values of current consumption in different operating mode are shown below.

Parameter Condition Typical Value Unit

OFF state Power down 45

Sleep All system is halted 1.5

Parameter Condition Typical Value Unit

Bandwidth 5MHz 10MHz 15MHz 20MHz

LTE LTE FDD Band 1, Pout=23dBm 550 560 590 600 mA

LTE FDD Band 3, Pout=23dBm 500 520 580 590 mA

LTE TDD Band 38 ,Pout=23dBm 380 390 430 450 mA

LTE TDD Band 39 ,Pout=23dBm 300 310 360 390 mA

LTE TDD Band 40, Pout=23dBm 350 360 400 430 mA

LTE TDD Band 41, Pout=23dBm 380 390 430 450 mA

Table 4-3 Averaged standby DC power consumption [1]

Table 4-4 Averaged standby DC power consumption [2]

Hardware Development Guide

5 MHz(dBm)

10 MHz(dBm)

20 MHz(dBm)

Table 4-5 Averaged standby DC power consumption [3]

Parameter Condition Typical Value Unit

WCDMA Band1 ,Pout=24dBm 550 mA

TD-SCDMA Band34, Pout=24dBm 180 mA

Band39, Pout=24dBm 180 mA

CDMA BC0, Pout=23dBm 600 mA

GSM Band3, Pout=30dBm 200 mA

Band8, Pout=33dBm 300 mA

4.4. RF

OUT PUT POW ER

The following table shows the RF output power of ME3630 module.

Table 4-6 Conducted RF Output Power

Frequency Max Min

LTE FDD Band 1 23dBm ±2.7dB <-39dBm

LTE FDD Band 3 23dBm ±2.7dB <-39dBm

LTE TDD Band38 23dBm ±2.7dB <-39dBm

LTETDD Band 39 23dBm ±2.7dB <-39dBm

LTE TDD Band40 23dBm ±2.7dB <-39dBm

LTE TDD Band 41 23dBm ±2.7dB <-39dBm

WCDMA Band1 24+1/-3 dBm <-50dBm

TD-SCDMA Band34 24+1/-3 dBm <-50dBm

TD-SCDMA Band39 24+1/-3 dBm <-50dBm

CDMA BC0 23~30 dBm <-50dBm

GSM Band3 30dBm ±2dB <-50dBm

GSM Band8 33dBm ±2dB <-50dBm

4.5. RF

REC EIVIN G SENSITIV ITY

The following table shows the conducted RF receiving sensitivity of ME3630 module.

Table 4-7 Conducted RF Receiving Sensitivity [1]

Band

LTE FDD Band 1 -100 dBm -97 dBm -94 dBm

LTE FDD Band 3 -97 dBm -94dBm -91dBm

LTE TDD Band 38 -100 dBm -97 dBm -94 dBm

LTE TDD Band 39 -100 dBm -97 dBm -94 dBm

LTE TDD Band 40 -100 dBm -97 dBm -94 dBm

LTE TDD Band 41 -100 dBm -97 dBm -94 dBm

Table 4-8 Conducted RF Receiving Sensitivity [2]

Band Sensitivity

WCDMA Band1 -107 dBm

TD-SCDMA BAND34 -108 dBm

TD-SCDMA BAND39

-108 dBm

Hardware Development Guide

CDMA BC0 -104 dBm

GSM Band3

GSM Band8

-102 dBm

4.6. GNSS

TEC HNICA L PARAMETERS

The following table shows the GNSS techinical parameters of ME3630 module.

Table 4-9 GNSS Technical Parameters

GNSS (GPS/GLONASS) Technical specification

GPS Frequency 1575.42±1.023 MHz

Tracking sensitivity -155dbm

Cold-start sensitivity -143dbm

Accuracy (Open Sky) 2meter

TTFF (Open Sky) Hot start: 4s

Cold start: 55s

Receiver Type Qualcomm GPS Gen8C

GPS L1 Frequency 1575.42MHz

Update rate 2-4 HZ

GNSS (GPS/GLONASS) data format ZTE Loc API/ZTE auto-negotiation

GNSS (GPS/GLONASS) Current consumption 65mA

GNSS (GPS/GLONASS) antenna Passive/Active antenna

4.7. E

LECTROSTATIC DISCHARG E

The module is not protected against electrostatics discharge (ESD) in general. Consequently, it is subject to ESD handling

precautions that typically apply to ESD sensitive components. Proper ESD handling and packaging procedures must be applied

throughout the processing, handling and operation of any application that incorporates the module.

The following table shows the module electrostatics discharge characteristics.

Table 4-10 ESD

Tested Points Contact discharge Air Discharge Unit

V_BAT ± 5 ± 10 kV

All antenna interfaces ± 4 ± 8 kV

Other interfaces ± 0.5 ± 1 kV

Hardware Development Guide

5. M

5.1. M

ECHANICAL DIMENSIONS

This chapter describes the mechanical dimensions of the module. All dimensions are measured in mm.

EC HANICAL DIM ENSIO NS OF THE MOD ULE

Figure 5-1 ME3630 Top and Side Dimensions

Figure 5-2 ME3630 Bottom Dimensions (Bottom view)

Hardware Development Guide

5.2. F

OOTPRIN T OF REC OMMENDATION

Figure 5-3 Recommended Footprint (Top view)

1. Keep out the area below the test point (circular area on the above figure) in the host PCB.

2. In order to maintain the module, keep about 3mm between the module and other components in the host PCB.

Figure 5-4 Location and dimension of test points

NOTE:

Hardware Development Guide

5.3. T

OP VIEW OF THE MODULE

5.4. B

OTTOM VIEW OF THE MODULE

Figure 5-5 Top View of the Module

Figure 5-6 Bottom View of the Module

Hardware Development Guide

6. R

EL ATED TEST & TEST STANDARD

6.1. T

ESTIN G REFERENC E

The related tests of MODULE comply with the IEC standard, including the equipment running under high/low temperature,

storage under high/low temperature, temperature shock and EMC. Table 6-1 is the list of testing standard, which includes the

related testing standards for MODULE.

NOTE:



IEC: International Electro technical Commission;



GB/T: Recommended national standard

Test Standard Document Reference

IEC6006826 Environmental testing-Part2.6: Test FC: Sinusoidal Vibration

IEC60068234 Basic environment testing procedures part2.

IEC60068264 Environmental testing-part2-64: Test FH: vibration, broadband random and guidance.

IEC60068214 Environmental testing-part 2-14: Test N: change of temperature

IEC60068229 Basic environmental testing procedures-part2: Test EB and guidance.

IEC6006822 Environmental testing-part2-2: Test B:dry heat

IEC6006821 Environment testing-part2-1: Test A: cold.

GB/T 15844.2 MS telecommunication RF wireless phone-set environment requirement & experimental method – part 4: Strict level of

GB/T 2423.17 Basic environment experiment of electronic products-Experiment Ka: Salt mist experiment method

GB/T 2423.5 Basic environment experiment of electronic products-Part2: Experiment method Try Ea & Introduction: Shock

GB/T 2423.11 Basic environment experiment of electronic products-Part2: Experiment method Try Fd: Broad frequency band random

TIA/EIA 603 3.3.5 TIA Standard-part3-5:Shock Stability

experimental condition

vibration (General requirement)

Table 6-1 Testing Standard

Hardware Development Guide

6.2. D

ES CRIPTION O F TESTING ENVIRONMENT

The working temperature range of MODULE is divided into the normal working temperature range and the extreme working

temperature range. Under the normal working temperature range, the testing result of RF complies with the requirements of 3GPP

specifications, and its function is normal. Under the extreme temperature range, the RF index basically complies with the 3GPP

specifications, and the quality of data communication is affected to a certain extent, but its normal function is not affected. MODULE

has passed the EMC test. Table 6-2 is the requirement for the testing environment, and Table 6-3 lists out the instruments and

devices that might be used during the test.

WARNING: Table 6-2 lists the extreme working conditions for the Module. Using the Module beyond these conditions may result in

permanent damage to the module.

Table 6-2 Testing Environment

Working Condition Min Temperature Max Temperature Remark

Normal working condition -30°C 75°C All the indexes are good.

Extreme working condition -40~ -30°C 75~85°C Some indexes become poorer.

Storage -40°C 85°C Storage environment of module

Table 6-3 Testing Instrument & Device

Testing Item Instrument & Device

RF test Comprehensive testing device

RF cable

Tower antenna

Microwave darkroom

High/Low-temperature running & storage test High/Low-temperature experimental box

Temperature shock test Temperature shock experimental box

Vibration test Vibration console

Hardware Development Guide

6.3. R

ELIABILITY TESTING ENVIRONM ENT

The reliability test includes the vibration test, high/low-temperature running, high/low-temperature storage and temperature

shock experiment test. Refer to Table 6-4 for the specific parameters.

Test Item Test Condition Test Standard

Random vibration Frequency range: 5-20Hz, PSD: 1.0m2/s3

Frequency range: 20-200Hz, -3dB/oct

3 axis, 1 hour for each axis

Temperature shock Low temperature: -40°C ± 2°C

High temperature: +80°C ± 2°C

Temperature changing period: less than 30s

Test duration: 2 hours

Cycle: 10

High-temperature running Normal high temperature: 75 °C

Extreme high temperature: 85°C

Duration: 24 hours

Low-temperature running Normal low temperature: -30°C

Extreme low temperature: -40°C

Duration: 24 hours

High temperature & high humidity Temperature: +60°C

Humidity: 95%

Duration: 48 hours

High temperature storage Temperature: 85°C

Duration: 24 hours

Low temperature storage Temperature: -40°C

Duration: 24 hours

Table 6-4 Reliability Features

IEC 68-2-6

IEC 68-2-14 Na

ZTE standard

IEC 68-2-1 Ab

IEC 68-2-2 Bb

NOTE: When the Module works at the normal temperature, all its RF indexes comply with the 3GPP specifications. When the Module works

at extreme temperature, certain RF indexes do not comply with the 3GPP specifications.

Hardware Development Guide

7. SMT

for the process guide to second-level assembly of LCC encapsulation module.

7.1. S

circumstances of excellent sealing package.

within 168 hours under the environment conditions of temperature<30℃, relative humidity<60% (RH). If it doesn’t meet the above

requirements, perform the baking process. See the baking parameters in Table below:

Temperature Baking conditions Baking time Remarks

125± 5℃

45± 5℃

7.2. M

maximum warp, and do not exert force on the module during the measurement.

PROCESS AND BAKING GUIDE

This chapter describes module’s storage, PAD design, SMT process parameters, baking requirements, etc., and it is applicable

TORAGE REQUIREMENTS

Storage conditions: temperature<40℃, relative humidity<90% (RH), 12 months weld ability guaranteed under this

The Moisture sensitivity level for all modules is level 3 (Conforming to IPC/JEDEC J-STD-020). After opening the package, mount

Moisture: ≤60%RH 8 hours The accumulated baking time must be less than 96 hours

Moisture: ≤5%RH 192 hours

The product’s transportation, storage and processing must conform to IPC/JEDEC J-STD-033

When in the process of PAD designing of module, refer to IPC-SM-782A and the chapter 6.2 below.

OD ULE PLAINN ESS STANDARD

Plainness of the module is required to be less than 0.15mm.

Measurement method: put the module on the marble plane, use the feeler gage to measure the gap width at the position of

Table 7-1 Baking parameters

7.3. P

RO CESS ROUTING SELECTION

The modules are manufactured with the lead-free process and meet the ROHS requirements, therefore it’s recommended to

follow the lead-free manufacturing process upon the selection of process routing for module board and main board.

7.3.1. S

use the no-clean solder paste. If the solder paste which needs cleaning is used, we cannot guarantee the components on the module

board could withstand the washing of the cleaning solvents. This might cause the functional problems of such components and affect

the appearance of the module. During the printing process, make sure the solder paste’s thickness at the position of module’s PAD is

within 0.18mm~0.20mm.

7.3.2. D

board. Pay attention to the following requirements:

0.18~0.20mm or the thickness of steel mesh is directly 0.18mm~0.20mm on main board.

OLDER PASTE SELECTION

The solder pastes with metal particle TYPE3 and TYPE4 can fulfill the welding requirements. It is accordingly recommended to

ESIGN OF MODULE

The thickness of the steel mesh on main board is selected according to the encapsulation type of components on the main

Make sure to design the module PAD on main board according to chapter 5.

The thickness of steel mesh is 0.15mm or 0.18mm, but the thickness at the position of module pad can be increased to

Requirements on the thickness of solder paste: control the thickness between 0.18mm and 0.20mm.

See the LCC module PAD’s steel mesh opening in the following table:

Module PAD GAP (G)=Center Distance (e)－PAD width (X)

PAD’

S STEEL MESH OPENING ON MAIN BOARD

Table 7-2 LCC module PAD’s steel mesh opening

Steel mesh opening

Hardware Development Guide

G≥0.5mm Drill holes at 100% scale in

the direction of width;

extend 0.3mm outward in

the direction of length

7.3.3. M

ODULE BOARD’S

SMT

0.1mm

PROCESS

G＜0.5mm

Contract 0.05~0.1mm in the

direction of width;

Contract 0.05~0.1mm inward

in the direction of length,

extend 0.5mm outward in

the direction of length.

0.1mm

Steel

mesh

Module PAD on PCB

Figure 7-1 Module Board’s Steel Mesh Diagram

0.5mm

0.1mm

1） SMT Tape Reel:

The tape reels, which are suitable for SMT, have been made for most ZTE modules. If the module has provided the tape reel

itself and meets the SMT requirements, customers can directly use it for module SMT.

Figure 7-2 Material Module Pallet

NOTE: Figure7-3 is just for reference, it doesn’t represent the actual Material Module Tape Reel.

Otherwise, customers need make a loading tool similar to the tape reel. Customers can take out the module from the

packaging box, put them into the tape according to the sequence and direction, and then start SMT.

2） Tape Reel Dimension (unit: mm):

The following picuture is the tape reel specific dimension for your reference:

Hardware Development Guide

A: Whole dimension:

B: Detailed dimension:

3） Mounting Pressure:

board on main board should be 2-5N according to our experiences. Different modules have different numbers of pads, therefore the

pressure selected are different. Customers can select proper pressure based on their own situations to suppress the module paste as

little as possible, in order to avoid the surface tension of the solder paste melts too much to drag the module during reflow.

7.3.4. M

Figure 7-3 Tape Reel Dimension

In order to ensure a good contact between the module and the solder paste on main board, the pressure of placing the module

ODULE SOLDERING REFLOW CURVE

Module soldering furnace temperature curve is:



Peak value: 245+0/-5℃



≥217℃: 30〜〜60S



150〜200℃: 60〜〜120S



Temperature rise slope: <3℃/S



Temperature drop rate: －2〜－4℃/S

Hardware Development Guide

NOTE: The test board of furnace temperature must be the main board with the module board mounted on, and there must be testing points

at the position of module board.

Figure 7-4

7.3.5. R

time. In addition, it is preferable for the main board to reflow on the mesh belt when mounting at the first time and the second time.

If such failure is caused by any special reason, the fixture should be also used to make such main board reflow on the track so as to

avoid the deformation of PCB during the reflow process.

7.3.6. M

welder can directly use the soldering iron to repair welding according to the factory’s normal welding parameters.

EFLOW METHOD

If the main board used by customers is a double-sided board, it is recommended to mount the module board at the second

AINTENANCE OF DEFECTS

If poor welding occurs to the module board and main board, e.g., pseudo soldering of the module board and main board, the

Module Furnace Temperature Curve Reference Diagram

Hardware Development Guide

7.4. M

7.4.1. M

environment. Refer to the following environment requirements:

7.4.2. B

flatly and slightly to avoid the collisions and frictions between the modules. During the baking process, do not overlay the modules

directly because it might cause damage to the module’s chipset.

7.4.3. M

OD ULE’S BAKING REQUIREMENT S

The module must be baked prior to the second reflow.

ODULE’S BAKING ENVIRONMENT

The operators must wear dust-free finger cots and anti-static wrist strap under the lead-free and good static-resistant

WARNING:

The product’s transportation, storage and processing must conform to IPC/JEDEC J-STD-033.

AKING DEVICE AND OPERATION PROCEDURE

Baking device: Any oven where the temperature can rise up to 125°C or above.

Precautions regarding baking: during the baking process, the modules should be put in the high-temperature resistant pallet

ODULE BAKING CONDITIONS

See the baking parameters in Table 7-1.

8. F

EDERAL COMMUNICATION COMMISSION INTERFERENCE STATEMENT

This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This

device may not cause harmful interference, and (2) this device must accept any interference received, including

interference that may cause undesired operation.

This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part

15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a

residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed

and used in accordance with the instructions, may cause harmful interference to radio communications. However,

there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful

interference to radio or television reception, which can be determined by turning the equipment off and on, the user

is encouraged to try to correct the interference by one of the following measures:

● Reorient or relocate the receiving antenna.

● Increase the separation between the equipment and receiver.

● Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.

● Consult the dealer or an experienced radio/TV technician for help.

FCC Caution:

Any changes or modifications not expressly approved by the party responsible for compliance could void the

user's authority to operate this equipment.

This transmitter must not be co-located or operating in conjunction with any other antenna or transmitter.

Radiation Exposure Statement:

This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This

Hardware Development Guide

equipment should be installed and operated with minimum distance 20cm between the radiator & your body.

This device is intended only for OEM integrators under the following conditions:

1) The antenna must be installed such that 20 cm is maintained between the antenna and users, and the maximum antenna gain allowed for use with this device is 4.8 dBi.

2) The transmitter module may not be co-located with any other transmitter or antenna.

As long as 2 conditions above are met, further transmitter test will not be required. However, the OEM integrator is still responsible for testing their end-product for any additional compliance requirements required with this module installed

IMPORTANT NOTE: In the event that these conditions can not be met (for example certain laptop configurations or co-location with another transmitter), then the FCC authorization is no longer considered valid and the FCC ID can not be used on the final product. In these circumstances, the OEM integrator will be responsible for re-evaluating the end product (including the transmitter) and obtaining a separate FCC authorization.

End Product Labeling

This transmitter module is authorized only for use in device where the antenna may be installed such that 20 cm may be maintained between the antenna and users. The final end product must be labeled in a visible area with the following: “Contains FCC ID:SRQ-ME3630”. The grantee's FCC ID can be used only when all FCC compliance requirements are met.

Manual Information To the End User

The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module in the user’s manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual.

ZTE ME3630 Users Manual

Specifications and Main Features

Frequently Asked Questions

User Manual