ZILOG Z89300, Z89301 Datasheet

GENERAL DESCRIPTION

PRELIMINARY

PRELIMINARY
C

USTOMER PROCUREMENT SPECIFICATION

Z89300/01

DIGITAL TELEVISION CONTROLLER

Z89300/01

CPS DC-4166-00

The Z89300/01 Digital Television Controller is an
application- specific controller designed to provide
complete audio and video control of television receivers,
video recorders, and advanced on-screen display facilities.
The Z89301 is the one-time-programmable (OTP) version
of the Z89300.The powerful 12 MHz Z89C00 RISC
processor core allows the user to control the on-board
peripheral functions and registers using the standard
processor instruction set.

The extensive character attributes can be controlled in two
modes: by the on-screen display controller character
control mode for maximum display control flexibility, and
closed caption mode for optimum display of closed caption
text.

Closed caption text can be decoded directly from the
composite video signal with the assistance of the
processor's digital signal processing capabilities and
displayed on the screen. The character representation in
this mode allows for a simple attribute control through the
insertion of control characters, and each word of RAM
specifies two displayed characters.

The character control mode provides access to the full set
of attribute controls. Each word of RAM specifies a single
displayed character and basic character attributes, allowing
the modification of attributes on a character-by-character
basis. The insertion of control characters permits direction
of other character attributes.

The fully customized 512 character set, formatted in two
256 character banks, can be displayed with a host of
display attributes that incude underlining, italics, blinking,
eight foreground/background colors, character position
offset delay, and background transparency. The 16-bit
display character representation allows the modification of
some key attributes on a character-by-character basis. A
character's pixel array is stored as a 16- or 18-word
representation in Character Graphics ROM (CGROM).
The ROM contents are referenced by a 16-bit word stored
in video RAM (VRAM) defining the character type and its
key attributes.

Serial interfacing with the television tuner is provided
through the tuner serial port. Other serial devices, such as
digital channel tunning adjustments, may be accessed
through the industry standard I2C port.

Additional hardware provides the capability to display two
to three times normal size characters. The smoothing logic
contained in the on-screen display circuit improves the
appearance of larger fonts. Fringing circuitry can be
activated to improve the visibiity of text by surrounding the
character lines with a one-pixel border.

RGB outputs provide the direct video signals, and a
blanking output is provided to control the video multiplexor.
Dot clock and verticle line synchronization are normally
obtained from H_FLYBACK and V_FLYBACK, but can be
generated by the Z89300/01 and driven to the external
deflection unit through the bidirectional SYNC ports when
external video synchronization signals are not present.

User control can be monitored through the keypad scanning
port, or the 16-bit remote control capture register. Receiver
functions such as color and volume can be directly
controlled by eight 8-bit pulse width modulated ports.

All nine PWM ports are only available in the 52-pin package.
Only six 8-bit and one 14-bit PWM output pins are available
in the 40-pin package.

The Z89300/01 has two internal 12 MHz VCOs that are
referenced to a 32 KHz internal oscillator to provide the
system clock. In Sleep mode, the controller uses the 32
KHz clock for the system clock to reduce power
consumption. The processor can be suspended by placing
it into STOP mode when main power is not available for
minimal power consumption.

DC-4166-00 (8-3-93)

1

PRELIMINARY

GENERAL DESCRIPTION (Continued)

Z89300/01

CPS DC-4166-00

Functional Block Diagram

2

PRELIMINARY

Z89300/01

CPS DC-4166-00

Port

PWM9
IRIN
Port18
Port19
Port0E

Port/ADC2

Port01
Port02
Port03
GND
Port04
Port05
Port06
Port07
Port08
Port09
VCC
Port10
Port11
Port12
Port13
Port14
Port15
Port16
Port0A
Port0B

PWM8
PWM7
PWM6
PWM5
PWM4
PWM3
PWM2
PWM1
ADC3
CVI/ADC0
LPF
XTAL2
GND
XTAL1
VCC
/RESET
Port0F/HalfBlnk
Port17/ADC1
Blank
V1
V2
V3
VSync
HSync
Port0D
Port0C

40-Pin DIP Configuration 52-Pin Shrink DIP Configuration

3