Yamaha DCU-5-D Service Manual

DIGITAL CABLING UNIT
SERVICE MANUAL
SERVICE MANUAL
PA
200706-
011861
オープンプライス

CONTENTS(目次)

SPECIFICATIONS(総合仕様) ..................................................3
PANEL LAYOUT(パネルレイアウト) .......................................4
CIRCUIT BOARD LAYOUT(ユニットレイアウト) .....................5
DISASSEMBLY PROCEDURE (分解手順) ...............................6
LSI PIN DESCRIPTION(LSI 端子機能表) ..............................10
IC BLOCK DIAGRAMIC ブロック図) ...................................15
CIRCUIT BOARDS(シート基板図) ........................................18
PARTS LIST BLOCK DIAGRAM(ブロックダイアグラム) CIRCUIT DIAGRAM(回路図)
HAMAMATSU, JAPAN
Copyright (c) Yamaha Corporation. All rights reserved. PDF ’07.09
DCU5D
IMPORTANT NOTICE
This manual has been provided for the use of authorized Yamaha Retailers and their service personnel. It has been assumed that basic service procedures inherent to the industry, and more specifically Yamaha Products, are already known and understood by the users, and have therefore not been restated.
WARNING : Failure to follow appropriate service and safety procedures when servicing this product may result in personal injury,
IMPORTANT : This presentation or sale of this manual to any individual or firm does not constitute authorization certification,
The data provided is belived to be accurate and applicable to the unit(s) indicated on the cover. The research engineering, and service departments of Yamaha are continually striving to improve Yamaha products. Modifications are, therefore, inevitable and changes in specification are subject to change without notice or obligation to retrofit. Should any discrepancy appear to exist, please contact the distributor’s Service Division.
WARNING : Static discharges can destroy expensive components. Discharge any static electricity your body may have accumulated
destruction of expensive components and failure of the product to perform as specified. For these reasons, we advise all Yamaha product owners that all service required should be performed by an authorized Yamaha Retailer or the appointed service representative.
recognition of any applicable technical capabilities, or establish a principal-agent relationship of any form.
by grounding yourself to the ground bus in the unit (heavy gauge black wires connect to this bus.)
IMPORTANT : Turn the unit OFF during disassembly and parts replacement. Recheck all work before you apply power to the unit.
WARNING: CHEMICAL CONTENT NOTICE!
The solder used in the production of this product contains LEAD. In addition, other electrical/electronic and/or plastic (Where applicable) components may also contain traces of chemicals found by the California Health and Welfare Agency (and possibly other entities) to cause cancer and/or birth defects or other reproductive harm.
DO NOT PLACE SOLDER, ELECTRICAL/ELECTRONIC OR PLASTIC COMPONENTS IN YOUR MOUTH FOR ANY REASON WHAT SO EVER!
Avoid prolonged, unprotected contact between solder and your skin! When soldering, do not inhale solder fumes or expose eyes to solder/ flux vapor!
If you come in contact with solder or components located inside the enclosure of this product, wash your hands before handling food.
IMPORTANT NOTICE FOR THE UNITED KINGDOM
Connecting the Plug and Cord
WARNING: THIS APPARATUS MUST BE EARTHED IMPORTANT. The wires in this mains lead are coloured in accordance with the following code: GREEN-AND-YELLOW : EARTH BLUE : NEUTRAL BROWN : LIVE As the colours of the wires in the mains lead of this apparatus may not correspond with the coloured markings identifying the terminals in your plug proceed as follows: The wire which is coloured GREEN-and-YELLOW must be connected to the terminal in the plug which is marked by the letter E or by the safety earth symbol The wire which is coloured BLUE must be connected to the terminal which is marked with the letter N or coloured BLACK. The wire which is coloured BROWN must be connected to the terminal which is marked with the letter L or coloured RED.
• This applies only to products distributed by Yamaha-Kemble Music (U.K.) Ltd. (3 wires)
or colored GREEN or GREEN-and-YELLOW.
WARNING
Components having special characteristics are marked and must be replaced with parts having specifi cation equal to those originally installed.
2
印の部品は、安全を維持するために重要な部品です。交換する場合は、安全のために必ず指定の部品をご使用ください。
DCU5D

SPECIFICATIONS(総合仕様)

• General Specifi cations
Sampling Frequency
Power Requirements 12 W
Dimensions 480 x 150 x 44 mm (W x D x H)
Net Weight 2.3 kg
Temperature Range
AC Power Cord Length 250 cm
Accessories AC power cord
• I/O Characteristics
Terminal Level Connector
CASCADE
CASCADE
EXT DC INPUT
*1. • Use a RJ-45 connector compliant with Neutrik EtherCon®.
• Use a CAT5 STP (Shielded Twisted Pair) cable compliant with EtherSound.
• Use electrically conductive tape to securely connect the metal part of the connector with the shielded part of the cable in order to prevent electromagnetic interference.
*2. max.: +15 V, min.: +11.4 V, 1.5 A *3. 4 pin=12 V, 1 pin = GND
IN
OUT
IN
OUT
*2
Normal Rate: 42.9975–49.200 kHz Double Rate: 85.995–98.400 kHz
Operation free-air: +10˚C to +35˚C Storage: -20˚C to +60˚C
RS422 D-Sub Half Pitch Connector 68 P(Female)
100Base-TX RJ-45
DC XLR-4-32 type
*1
*3
• Connector Pin Assignment
EXT DC INPUT
Pin No. Signal Name
1 GND
2 N.C
3 N.C
4 +12 V

DIMENSIONS(寸法図)

(10)
162
150
2
440
480
44
Unit: mm
(単位)
3
DCU5D

PANEL LAYOUT(パネルレイアウト)

• Front Panel(フロントパネル)
: @
POWER
• Rear Panel(リアパネル)
:
CASCADE IN
AC IN
1P:GND 4P:12V
POWER
.; = B 2>
q [POWER] Indicator w Mode switch e Ground screw r [AC IN] connector t [EXT DC INPUT] connector y [CASCADE IN][CASCADE OUT] connectors u [CASCADE IN][CASCADE OUT] connectors i IN/OUT[TX][RX] indicators
q [POWER]インジケーター w モードスイッチ e アース用ネジ r [ACIN]端子 t [EXTDCINPUT]端子 y [CASCADEIN][CASCADEOUT]端子 u [CASCADEIN][CASCADEOUT]端子 i IN/OUT[TX][RX]インジケーター
NITUO
OUT IN
TX RX TX RX
4

CIRCUIT BOARD LAYOUT(ユニットレイアウト)

Power supply unit
(電源ユニット)
DM
AC inlet
ACインレット)
DCU5D
LED
ES
ES-CS
5
DCU5D

DISASSEMBLY PROCEDURE(分解手順)

Precautions

* Install the fi lament tape and the harness clamp in the
same way as they were before removal.
* Notes on Flat Cable
Contacts are visible from the back. Pay attention
not to insert and install the cable to the connector
inversely. (Photo 1)
(注意事項)
Front Side
(表面)
Photo A

1. Rack Angles, Top Cover

(Time required: About 4 minutes)
1-1 Remove the four (4) screws marked [480]. The left
and right rack angles can then be removed. (Fig. 1)
1-2 Remove the fourteen (14) screws marked [460].
The top cover can then be removed. (Fig. 1)

2. DM Circuit Board

(Time required: About 6 minutes each)
2-1 Remove the left and right rack angles and top
cover. (See procedure 1.)
2-2 Remove the two (2) screws marked [60], four (4)
hex locking screws marked [A] and four (4) screws marked [80], tilt the DM circuit board and remove it by lifting it. (Fig. 2)
※ フィラメントテープ、束線止めは、取り外す前と同じよ
うに取り付けてください。 ※ フラットケーブルの注意  接点が裏面から透けて見えます。コネクタにケーブルの
表・裏を逆に差込まないように注意して取り付けてくださ
い。(写真A)
Back Side
(写真A)

1. ラック金具、トップカバー

(裏面)
(所要時間 :約 4 分)
1-1 [480] のネジ 4 本ずつを外して、左右のラック金
具を外します。(図 1)
1-2 [460] のネジ 14 本を外して、トップカバーを外し
ます。(図 1)

2. DM シート

(所要時間 :各約 6 分)
2-1 左右のラック金具とトップカバーを外します。  (1 項参照) 2-2 [60] のネジ 2 本と [A] の六角ロックネジ 4 本、[80]
のネジ 4 本を外して、DM シートを斜めに傾けて 持ち上げ外します。(図 2)
Rack angle
(ラック金具)
[480]
[460]
Top cover
(トップカバー)
[460]
[460]
Rack angle
(ラック金具)
[460]
[480]
[460]: BondingHeadTappingScrew-S(Sタイト+BOND)3.0X6MFZN2B3 (WE978000) [480]: BindHeadScrew (小ネジ+BIND) 4.0X8MFZN2B3IT (WE997100)
Fig. 1
(図 1)
6
DCU5D

3. ES Circuit Board, ES-CS Circuit Board

(Time required: About 6 minutes)
3-1 Remove the left and right rack angles and top
cover. (See procedure 1.)
3-2 Remove the four (4) screws marked [180] and two
(2) screws marked [190]. The ES circuit board or ES-CS circuit board can then be removed. (Fig. 2)
3-3 To remove the AVDM-ES module on the ES circuit
board, open the hooks on the portion B outward as in Photo 1, lift the AVDM-ES module and pull out obliquely upward.
* To install the AVDM-ES module, insert securely
until the terminal cannot be seen while fi tting the contact point of the terminal to the connector to be connected, push in backward and fasten with the hooks. (Photo 2)
(The photographs show DSP5D.)

3. ES シート、ES-CS シート

3-1 左右のラック金具とトップカバーを外します。  (1 項参照) 3-2 [180] のネジ 4 本と [190] のネジ 2 本を外して、ES
シートまたは ES-CS シートを外します。(図 2)
3-3 ES シートに付いている AVDM-ES モジュールを
外すには、写真 1 のように B 部のフックを外に開 いて AVDM-ES モジュールを浮かせて、斜め上方 向に引き抜きます。
※ AVDM-ES モジュールを取り付けるには、差し込
み先のコネクタに端子の接点を合わせながら端子 が見えなくなるまでしっかりと差し込み、奥に押 し込んでフックに引っ掛けます。(写真 2)
(写真は DSP5D の例です。)
(所要時間 :約 6 分)
B
B
Photo 1
(写真 1)
Photo 2
(写真 2)
7
DCU5D
[380]
<Front view>
<Top view>
<Rear view>
PS angle
(PS金具)
[80]
[60]
[380]
LED
[80] [80]
LED
DM
[A]
[310]
ES
or
ES-CS
[190]
[180]
DM
[60]: BindHeadTappingScrew-B(Bタイト+BIND)3.0X8MFZN2B3 (WE774400) [80]: BindHeadTappingScrew-B(Bタイト+BIND)3.0X6MFZN2W3(WE936300) [180]:BindHeadTappingScrew-B(Bタイト+BIND)3.0X8MFZN2B3 (WE774400) [190]:BindHeadTappingScrew-B(Bタイト+BIND)3.0X6MFZN2W3 (WE936300) [310]:BindHeadTappingScrew-S(Sタイト+BIND)3.0X6MFZN2B3 (WE877800) [380]:BindHeadTappingScrew-B(Bタイト+BIND)3.0X6MFZN2W3 (WE936300)
Fig. 2
(図 2)
Power supply unit
<Top view>
AC inlet
(ACインレット)
<Rear view>
(電源ユニット)
or
ES ES-CS
[410]
[410]:BindHeadTappingScrew-S(Sタイト+BIND)3.0X6MFZN2B3 (WE877800)
Fig. 3
(図 3)
8
DCU5D

4. LED Circuit Board

(Time required: About 5 minutes)
4-1 Remove the left and right rack angles and top
cover. (See procedure 1.)
4-2 Remove the two (2) screws marked [310] from
the rear side. The LED circuit board can then be removed. (Fig. 2)

5. Power Supply Assembly

(Time required: About 7 minutes)
5-1 Remove the left and right rack angles and top
cover. (See procedure 1.)
5-2 Remove the two (2) screws marked [380]. The PS
angle can then be removed. (Fig. 2)
5-3 Remove the two (2) screws marked [410] and the
screw marked [390]. The power supply assembly can then be removed. (Fig. 3, Photo 3)
AC inlet
(ACインレット)
4. LED シート
4-1 左右のラック金具とトップカバーを外します。  (1 項参照) 4-2 リア側から [310] のネジ 2 本を外して、LED シー
トを外します。(図 2)
5. 電源 Assy
5-1 左右のラック金具とトップカバーを外します。  (1 項参照) 5-2 [380] のネジ 2 本を外して、PS 金具を外します。 (2) 5-3 [410] のネジ 2 本と [390] のネジ 1 本を外して、電
源 Assy を外します。(図 3、写真 3)
Power Supply Assembly
(所要時間 :約 5 分)
(所要時間 :約 7 分)
(電源 Assy)
[390]
PS angle
(PS金具)
[390]:BindHeadTappingScrew-S(Sタイト+BIND)4.0X8MFZN2B3(WE994800)
Photo 3
(写真 3)
9
DCU5D

LSI PIN DESCRIPTION

(LSI 端子機能表)
XC9572XL-10TQG100C LC4064V-75TN100C RD-0759
(X7792A00)
S1L51252F32S200 MBCG61594-130-E1 YM3436D-VZ
(XG948F00)
(X8955A00)
DC-DC MODULE ............................................................................................11
(X3775A00)
(X3299A00)
(X4765C00)
DIR2 ........................................................................................................14
CPLD
CPLD
PLLP2
(Complex Programmable Logic Device)
(Gate Array)
ATSC2A .......................................................................................13
XC9572XL-10TQG100C (X4765C00) CPLD
PIN NO.
1
I/O1 2 3
I/O/GTS1
4
I/O/GTS2 VCCINT3.3V
5
I/O6
6 7
I/O8
8
I/O9
9
I/O10
10
I/O11
11
I/O12
12
I/O13
13
I/O14
14
I/O15
15
I/O16
16
I/O17
17
I/O18
18 19
I/O20
20
GND
21
I/O/GCK1
22
I/O/GCK2
23 24
I/O25
25
VCCIO2.5V/3.3V
26
I/O/GCK3
27
I/O28
28
I/O29
29
I/O30
30
GND
31
I/O32
32
I/O33
33 34
I/O35
35
I/O36
36
I/O37
37
VCCIO2.5V/3.3V
38
I/O39
39
I/O40
40
I/O41
41
I/O42
42 43
GND
44 45 46
TMS
47
TCK
48
I/O49
49
I/O50
50
NC
NC
NC
NC
NC
NC
TDI NC
I/O FUNCTIONNAME
I/O
I/O I/O
I/O
I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O
I/O
I/O I/O
I/O
I/O I/O I/O I/O
I/O I/O
I/O I/O I/O
I/O I/O I/O I/O
I/O I/O
Input / Output 1 Not used
Input / Output / GTS buffer delay
-
-
-
-
-
­I
I I
Power Supply (3.3V) Input / Output 6 Not used Input / Output 8 Input / Output 9 Input / Output 10 Input / Output 11 Input / Output 12 Input / Output 13 Input / Output 14 Input / Output 15 Input / Output 16 Input / Output 17 Input / Output 18 Not used Input / Output 20 GND
Input / Output / GCK buffer delay
Not used Input / Output 25 Power Supply (2.5V/3.3V) Input / Output / GCK buffer delay Input / Output 28 Input / Output 29 Input / Output 30 GND Input / Output 32 Input / Output 33 Not used Input / Output 35 Input / Output 36 Input / Output 37 Power Supply (2.5V/3.3V) Input / Output 39 Input / Output 40 Input / Output 41 Input / Output 42 Not used GND Input test data Not used Test mode switch Test clock Input / Output 49 Input / Output 50
(Complex Programmable Logic Device)
............................11
.........................................................................12
PIN NO.
51
VCCIO2.5V/3.3V
52
I/O52
53
I/O53
54
I/O54
55
I/O55
56
I/O56
57
VCCINT3.3V
58
I/O58
59
I/O59
60
I/O60
61
I/O61
62
GND
63
I/O63
64
I/O64
65
I/O65
66
I/O66
67
I/O67
68
I/O68
69
GND
70
I/O70
71
I/O71
72
I/O72 73 74
I/O74 75
GND
76
I/O76 77
I/O77 78
I/O78 79
I/O79 80 81
I/O81 82
I/O82 83
TDO
84
GND
85
I/O85 86
I/O86 87
I/O87 88
VCCIO2.5V/3.3V
I/O89
89
I/O90
90
I/O91
91
I/O92
92
I/O93
93
I/O94
94
I/O95
95
I/O96
96
I/O97
97 98
VCCINT3.3V
99
I/O/GSR
100
GND
NC
NC
I/O FUNCTIONNAME
I/O I/O I/O I/O I/O
I/O I/O I/O I/O
I/O I/O I/O I/O I/O I/O
I/O I/O I/O
I/O
I/O I/O I/O I/O
I/O I/O
O
I/O I/O I/O
I/O I/O I/O I/O I/O I/O I/O I/O I/O
I/O
-
-
-
-
-
-
-
-
-
Power Supply (2.5V/3.3V) Input / Output 52 Input / Output 53 Input / Output 54 Input / Output 55 Input / Output 56 Power Supply (3.3V) Input / Output 58 Input / Output 59 Input / Output 60 Input / Output 61 GND Input / Output 63 Input / Output 64 Input / Output 65 Input / Output 66 Input / Output 67 Input / Output 68 GND Input / Output 70 Input / Output 71 Input / Output 72 Not used Input / Output 74 GND Input / Output 76 Input / Output 77 Input / Output 78 Input / Output 79 Not used Input / Output 81 Input / Output 82 Output test data GND Input / Output 85 Input / Output 86 Input / Output 87 Power Supply (2.5V/3.3V) Input / Output 89 Input / Output 90 Input / Output 91 Input / Output 92 Input / Output 93 Input / Output 94 Input / Output 95 Input / Output 96 Input / Output 97 Power Supply (3.3V) Input / Output / GSR buffer delay GND
......................10
DM: IC16
10
DCU5D
LC4064V-75TN100C (X8955A00) CPLD (Complex Programmable Logic Device)
PIN NO.
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
1 2 3 4 5 6 7 8 9
GND
TDI
A8
A9 A10 A11
GND
A12 A13 A14 A15
I
VCCO
B15 B14 B13 B12
GND
B11 B10
B9
B8
I
TCK VCC GND
I B7 B6 B5 B4
GND
VCCO
B3 B2 B1 B0
CLK1/I CLK2/I
VCC
C0 C1 C2 C3
VCCO
GND
C4 C5 C6 C7
I/O FUNCTIONNAME
I/O I/O I/O I/O
– I/O I/O I/O I/O
– I/O I/O I/O I/O
– I/O I/O I/O I/O
I/O I/O I/O I/O
– I/O I/O I/O I/O
– I/O I/O I/O I/O
– I/O I/O I/O I/O
I
Test data in
General purpose I/O
Ground
General purpose I/O
Ground
I
Input Power supply +3.3 V
General purpose I/O
Ground
General purpose I/O
I I
Input Test clock input Power supply +3.3 V Ground
I
Input
General purpose I/O
Ground Power supply +3.3 V
General purpose I/O
I I
Configured to be either CLK input / As an input.
Power supply +3.3 V
General purpose I/O
Power supply +3.3 V Ground
General purpose I/O
PIN NO.
51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99
100
GND TMS
C8
C9 C10 C11
GND
C12 C13 C14 C15
I
VCCO
D15 D14 D13 D12
GND
D11 D10
D9
D8
I TDO VCC GND
I
D7 D6 D5 D4
GND
VCCO
D3 D2 D1
D0/GOE1
CLK3/I CLK0/I
VCC
A0/GOE0
A1 A2 A3
VCCO
GND
A4 A5 A6 A7
I/O FUNCTIONNAME
I/O I/O I/O I/O
I/O I/O I/O I/O
I/O I/O I/O I/O
I/O I/O I/O I/O
O
I/O I/O I/O I/O
I/O I/O I/O I/O
I/O I/O I/O I/O
I/O I/O I/O I/O
I
Ground Test mode select input
General purpose I/O
Ground
General purpose I/O
I
Input Power supply +3.3 V
General purpose I/O
Ground
General purpose I/O
I
Input
Test data out – –
I
Power supply +3.3 V
Ground
Input
General purpose I/O
– –
Ground
Power supply +1.6 V
General purpose I/O
Configured to be either global output enable input / As general I/O
I I
Configured to be either CLK input / As an input.
Power supply +3.3 V
Configured to be either global output enable input / As general I/O
General purpose I/O
– –
Power supply +3.3 V
Ground
General purpose I/O
ES: IC002
RD-0759 (X7792A00) DC-DC MODULE
PIN NO.
10 11 12
1 2 3 4 5 6 7 8 9
NAME
PGOOD
ON/OFF1
+VIN +VIN +VIN
-V
-VIN
-VIN
ON/OFF2
MODE
FIN
NC
I/O
I O O
Signal input for external synchronization Open drain output VOUT1 output ON/OFF control and soft start control
FUNCTION
I
I
Voltage input
I
-
-
IN
-
Non-connection
Ground on input side
­O O
VOUT2 output ON/OFF control and soft start control DC-DC converter operation mode setting
PIN NO.
13 14 15 16 17 18 19 20 21 22 23 24 25
NAME
NC
V
ADJ2
+VOUT2 +VOUT2
-VOUT2
-VOUT2 —
-VOUT1
OUT1
-V
+VOUT1 +VOUT1
V
ADJ1
NC
I/O
DM: IC1
FUNCTION
­O O O
-
-
-
-
­O O O
-
Non-connection VOUT2 voltage setting
Voltage output +3.3V
Ground on output side
Pulling out pin
Ground on output side
Voltage output +5V
OUT1 voltage setting
V Non-connection
11
DCU5D
S1L51252F32S200 (X3775A00) PLLP2 (Gate Array)
PIN NO.
100 101 102 103 104
1 2 3 4 5 6 7 8 9
10
11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99
NAME
(NC) (NC)
PB8
PB9 VDD VSS
PA0
NCSIN6 NCSIN5
NRD
NWRH
NWRL
PA1
ADH1 ADH2 ADH3 ADH4 ADH5
PA2 VSS VDD VDD VSS
ADL1 ADL2 ADL3 ADL4 ADL5 ADL6 ADL7 ADL8
VSS VDD VDD VSS
DT0
DT1
DT2
DT3
DT4
DT5 VDD VSS
DT6
DT7
DT8
DT9 VDD VSS (NC) (NC) (NC)
DT10 DT11 DT12 DT13 DT14 DT15
VSS
PA3
NTCWAIT NCSIO3V NCSIO5V
NCSJK1
NCSCONT
VDD
NCSSLOT1 NCSSLOT2
NCSSIO4
NCSREC2
NCSMTLED
VDD
NCSUSB
NCSSMPTE
NCSUART
VSS VDD
NRES
CPUCLK
(NC) VSS VSS
NCSATSC1
VDD
NCSATSC2
PA4
PA5
PA6
NCTSYNCO
NCTSYNCI
VDD
NCSDSP71 NCSDSP72 NCSDSP73 NCSDSP74 NCSDSP75 NCSDSP76
VDD
PA7
PA8
NCSDSP61 NCSDSP62 NCSDSP63 NCSDSP64
I/O
I/O I/O I/O I/O I/O I/O
I/O I/O I/O I/O
I/O I/O I/O I/O I/O I/O
FUNCTION
-
­O O
-
­O
I I I I I
O
I I I I I
O
-
-
-
-
I I I I I I I I
-
-
-
-
-
-
-
-
-
-
-
­O O O O O O
­O O O O O
­O O O
-
-
I I
-
-
­O
­O O O O O
I
­O O O O O O
­O O O O O O
(Connected to VSS on P.C.B.) (Pulled up on P.C.B.) Output port B8 Output port B9 IO power supply (3.3V) Ground Output port A0 CPU chip select 6 CPU chip select 5 CPU read enable CPU write enable H CPU write enable L Output port A1 CPU address bus 11 CPU address bus 12 CPU address bus 13 CPU address bus 14 CPU address bus 15 Output port A2 Ground Internal power supply (2.5V) IO power supply (3.3V) Ground CPU address bus 1 CPU address bus 2 CPU address bus 3 CPU address bus 4 CPU address bus 5 CPU address bus 6 CPU address bus 7 CPU address bus 8 Ground Internal power supply (2.5V) IO power supply (3.3V) Ground CPU data bus 0 CPU data bus 1 CPU data bus 2 CPU data bus 3 CPU data bus 4 CPU data bus 5 IO power supply (3.3V) Ground CPU data bus 6 CPU data bus 7 CPU data bus 8 CPU data bus 9 Internal power supply (2.5V) Ground (Connected to VDD on P.C.B.) (Connected to VDD on P.C.B.) (Pulled up on P.C.B.) CPU data bus 10 CPU data bus 11 CPU data bus 12 CPU data bus 13 CPU data bus 14 CPU data bus 15 Ground Output port A3 CPU wait signal Chip select (103V) Chip select (105V) Chip select (JK1) Chip select (CONT) Power supply Chip select (SLOT1) Chip select (SLOT2) Chip select (S104) Chip select (REC2) Chip select (MTLED) Power supply Chip select (USB) Chip select (SMPTE) Chip select (UART) Ground Power supply System reset CPU clock (Connected to VSS on P.C.B.) Ground Ground Chip select (ATSC1) Power supply Chip select (ATSC2) Output port A4 Output port A5 Output port A6 Internal counter synchronous signal output Internal counter synchronous signal input Power supply Chip select (DSP7_1) Chip select (DSP7_2) Chip select (DSP7_3) Chip select (DSP7_4) Chip select (DSP7_5) Chip select (DSP7_6) Power supply Output port A7 Output port A8 Chip select (DSP6_1) Chip select (DSP6_2) Chip select (DSP6_3) Chip select (DSP6_4)
PIN NO.
105 106 107 108 109 110
111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208
EXTWC2561 EXTWC2562
EXTWCSEL
DIRWCSEL
FS256_SLOT1 FS256_SLOT2
SYNC_SLOT1 SYNC_SLOT2
NDIRLOCK
NMLOCKSEL NLOCKRTN
MUTEOUT1 MUTEOUT2 MUTEOUT3 MUTEOUT4 MUTEOUT5 NMUTEOUT6
SLOT1_16CH SLOT2_16CH
NAME
(NC) VDD (NC) (NC) VSS
VDD NCSDSP7 NCSDSP6
PA9
MCK256O
MCK256MI MCK256SI
VSS
VDD
ICK45 ICK49
DIR2XI
PA1 0
VSS
VDD
EXTWC1 EXTWC2 EXTWC3 EXTWC4
VSS
VDD
PA11 DIRMCA DIRMCB
DIRWC
VSS VDD
DIRMCC
DIRSYNC
PA1 2 PLLOUT
VSS VDD
PCPOUT
PA1 3 M256FS M128FS
VSS VDD (NC) (NC) (NC) (NC)
M64FS
MWC
MSYNC
PA1 4
WCO_BNC
PA1 5
VDD
PB0
SLOT_12M
SLOT_6M
VSS
SLOT_3M
PB1 SLOT_48K SLOT_48S
PB2 ANA256FS
VDD
NLOCK
VSS
SCANEN ATPGEN
TSTEN
VDD
TRRERR1 TRRERR2
VSS
PB3
PB4
MUTEIN
VDD
VDD
PB5
DOUBLE
K48K96
PB6
PB7
DM: IC6
I/O
-
-
-
-
-
­O O O O
I I
-
-
I
I O O
-
-
I
I
I
I
-
-
I
I O
I
I
I
-
-
I
I O O O
I
-
­O O O O
-
-
-
-
-
­O O O O O O O O
­O O O O O
­O O O O O O
-
I I
-
I I I
-
I I
­O O
I
O
I
­O O O O O O
­O O O O O O O
(Pulled up on P.C.B.) Power supply (Connected to VSS on P.C.B.) (Connected to VSS on P.C.B.) Ground Power supply Chip select (DSP7_ALL) Chip select (DSP6_ALL) Output port A9 256FS synchronous clock output 256FS synchronous clock input (Master) 256FS synchronous clock input (Slave) Ground Power supply For internal clock 88.2k, 44.1k For internal clock 96k, 48k Clock for X1 of DIR2 Output port A10 Ground Power supply External word clock input 1 External word clock input 2 External word clock input 3 External word clock input 4 Ground Power supply External WC (256FS) input 1 External WC (256FS) input 2 Output port A11 MCA input of DIR2 MCB input of DIR2 WC input of DIR2 Ground Power supply MCC input of DIR2 SYNC input of DIR2 EXTWC clock select output DIRWC clock select output Output port A12 PLL VCO OUT input Ground Power supply EXT WC SEL to MWC comparison circuit output Output port A13 Master clock (256FS) System clock (128FS) Ground Power supply (Connected to VDD on P.C.B.) (Connected to VSS on P.C.B.) (Pulled up on P.C.B.) (Pulled up on P.C.B.) System clock (64FS) Word clock Synchronous signal Output port A14 WC output for BNC connector Output port A15 Clock (256FS) for MY SLOT1 Clock (256FS) for MY SLOT2 Power supply Synchronous signal for MY SLOT1 Synchronous signal for MY SLOT2 Output port 80 Clock (12MHz) for MY SLOT Clock (6MHz) for MY SLOT Ground Clock (3MHz) for MY SLOT Output port B1 Word clock (48/44) for MY SLOT Synchronous signal (48/44) for MY SLOT Output port B2 Clock for analog circuit Power supply PLL lock detect signal DIR2 PLL lock signal Ground Scan test input ATPG test input Test mode selection Power supply 2TR DIN UNLOCK input 2TR DIN UNLOCK input Ground Output port B3 Lock select output Lock delay input Output port B4 Mute input Power supply Mute output 1 Mute output 2 Mute output 3 Mute output 4 Mute output 5 Mute output 6 Power supply Output port B5 Register setting value output Register setting value output Output port B6 SLOT1 16/8 ch selection SLOT2 16/8 ch selection Output port B7
FUNCTION
12
DCU5D
MBCG61594-130-E1 (X3299A00) ATSC2A
PIN NO.
1
XTST
2 3
WT_X
4
RD_X
5
CS_X
6
HS_SEL
7
RES_X
8 9
ADD[0]
10
ADD[1]
11
ADD[2]
12
ADD[3]
13
ADD[4]
14
ADD[5]
15
ADD[6]
16
ADD[7]
17 18 19
DAT[0]
20
DAT[1]
21
DAT[2]
22
DAT[3]
23 24 25
DAT[4]
26
DAT[5]
27
DAT[6]
28
DAT[7]
29 30 31
PA_I_H_MODE[0]
32
PA_I_H_MODE[1]
33
PA_I_H_MODE[2]
34
PA_O_H_MODE[0]
35
PA_O_H_MODE[1]
36
PA_O_H_MODE[2]
37
PA_SI0_ATI
38
PA_ SI1
39
PA_ SI2
40
PA_ SI3
41
PA_I_SW_SEL
42
PA_SYNC_WC_SI
43
PA_FS256_SI
44 45
PA_FS256_SO
46
PA_SYNC_WC_SO
47
PA_O_SW_SEL
48 49
PA_ SO0
50
PA_ SO1
51
PA_ SO2
52
PA_ SO3
53 54 55
PA_CLK_ATI
56
PA_H_M4_SEL
57
PA_O_MUTE
58
PB_SI0
59
PB_SI1
60
PB_SI2
61
PB_SI3
62
PB_I_SW_SEL
63
PB_SYNC_WC_SI
64
PB_FS256_SI
65 66
PB_FS256_SO
67
PB_SYNC_WC_SO
68
PB_O_SW_SEL
69
PB_I_H_MODE[0]
70
PB_I_H_MODE[1]
71
PB_I_H_MODE[2]
72
DD
V
SS
V
SS
V
VDD VSS
VDD VSS
VSS VDD
VSS
VSS
DD
V VSS
VSS
I/O FUNCTIONNAME
I/O I/O I/O I/O
I/O I/O I/O I/O
O O O O
I
LSI test pin Ground
Power supply +3.3V
I I I I I
CPU interface write input CPU interface read input CPU interface chip select input Chip active select System reset input
Ground I I I I I
CPU interface address bus
I I I
Power supply +3.3V
Ground
CPU interface data bus
Power supply +3.3V
Ground
CPU interface data bus
Ground
Power supply +3.3V I I
Port A audio data input mode select I I I
Port A audio data output mode select I I I I
Port A audio data input
I I I I
Port A audio data input sync/wc select
Port A audio data input sync/wc input
Port A audio data input bit clock input (256fs)
Ground I I I
Port A audio data output bit clock input (256fs)
Port A audio data output sync/wc input
Port A audio data output sync/wc select
Ground
Port A audio data output
Power supply +3.3V
Ground I I I
Port A ADAT clock input
Port A audio data input buffer active select
Port A mute I I I
Port B audio data input
I I I I
Port B audio data input sync/wc select
Port B audio data input sync/wc input
Port B audio data input bit clock input (256fs)
Ground I I I
Port B audio data output bit clock input (256fs)
Port B audio data output sync/wc input
Port B audio data output sync/wc select I I
Port B audio data input mode select I
PIN
NO.
DD
73
V
74
PB_H_M4_SEL PB_O_MUTE
75 76
VSS
PB_SO0_ATO
77 78
PB_SO1
79
PB_SO2
80
PB_SO3
SS
81
V
82
PB_O_H_MODE[0]
83
PB_O_H_MODE[1]
84
PB_O_H_MODE[2] PC_I_H_MODE[0]
85
PC_I_H_MODE[1]
86
PC_I_H_MODE[2]
87 88
PC_H_M4_SEL
89
PC_SI0_ATI
90
VDD
91
VSS
92
PC_SI1
93
PC_SI2
94
PC_SI3
95
PC_I_SW_SEL
96
PC_SYNC_WC_SI
97
PC_FS256_SI
98
VSS
99
PC_FS256_SO PC_SYNC_WC_SO
100 101
PC_O_SW_SEL
102
VSS
103
PC_SO0
104
PC_SO1
105
PC_SO2
106
PC_SO3
107
VSS
108
PC_O_MUTE
PC_O_H_MODE[0]
109
PC_O_H_MODE[1]
110
PC_O_H_MODE[2]
111
112
PC_CLK_ATI
113
VSS
PD_I_H_MODE[0]
114
PD_I_H_MODE[1]
115
PD_I_H_MODE[2]
116
VSS
117
PD_H_M4_SEL
118 119
PD_SI0
120
PD_SI1
121
PD_SI2
122
PD_SI3
123
PD_I_SW_SEL
124
PD_SYNC_WC_SI
125
PD_FS256_SI
VDD
126 127
VSS
PD_FS256_SO
128 129
PD_SYNC_WC_SO PD_O_SW_SEL
130
VSS
131 132
PD_SO0_ATO
133
PD_SO1
134
PD_SO2
135
PD_SO3
136
VSS
137
PD_O_MUTE
138
VSS
PD_O_H_MODE[0]
139
PD_O_H_MODE[1]
140
PD_O_H_MODE[2]
141 142
XSM
143
PA_WC_ATI PC_WC_ATI
144
DM: IC12, 13
I/O FUNCTIONNAME
Power supply +3.3V I I
Port B audio data input buffer active select
Port B mute
Ground
O O O
Port B audio data output
O
Ground I I
Port B audio data output mode select I I I
Port C audio data input mode select I I I
Port C audio data input buffer active select
Port C audio data input
Power supply +3.3V
Ground I I
Port C audio data input I I I I
Port C audio data input sync/wc select
Port C audio data input sync/wc input
Port C audio data input bit clock input (256fs)
Ground I I I
Port C audio data output bit clock input (256fs)
Port C audio data output sync/wc input
Port C audio data output sync/wc select
Ground
O O O
Port C audio data output
O
Ground I
Port C mute I I
Port C audio data output mode select I I
Port C ADAT clock input
Ground I I
Port D audio data input mode select I
Ground I
Port D audio data input buffer active select I I I
Port D audio data input
I I I I
Port D audio data input sync/wc select
Port D audio data input sync/wc input
Port D audio data input bit clock input (256fs)
Power supply +3.3V
Ground I I I
Port D audio data output bit clock input (256fs)
Port D audio data output sync/wc input
Port D audio data output sync/wc select
Ground
O O O
Port D audio data output
O
Ground I
Port D mute
Ground I I
Port D audio data output mode select I I
O O
LSI test pin
Port A ADAT word clock output
Port C ADAT word clock output
13
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