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bq2005

Fast-Charge IC

for Dual-Battery Packs

Features

Sequential fast charge and con

➤

ditioning of two NiCd or NiMH
nickel cadmium or nickel-metal
hydride battery packs

Hysteretic PWM switch-mode

➤

current regulation or gated con
trol of an external regulator

Easily integrated into systems

➤

or used as a stand-alone charger

Pre-charge qualification of tem

➤

perature and voltage

Direct LED outputs display

➤

battery and charge status

➤ Fast-charge termination by

temperature/∆ time, -∆V, maxi-

∆

mum voltage, maximum tem­perature, and maximum time

➤ Optional top-off and pulse-

trickle charging

Pin Connections

General Description

The bq2005 Fast-Charge IC provides

­comprehensive fast charge control
functions together with high-speed
switching power control circuitry on a
monolithic CMOS device for sequential
charge management in dual battery

­pack applications.

Integration of closed-loop current
control circuitry allows the bq2005
to be the basis of a cost-effective so
lution for stand-alone and system-

­integrated chargers for batteries of

one or more cells.

Switch-activated discharge-before­charge allows bq2005-based chargers
to support battery conditioning and
capacity determination.

High-efficiency power conversion is
accomplished using the bq2005 as a
hysteretic PWM controller for
switch-mode regulation of the charg­ing current. The bq2005 may alterna-

Pin Names

DCMDADischarge command input,

battery A

tively be used to gate an externally
regulated chargingcurrent.

Fast charge may begin on application
of the charging supply, replacement
of the battery, or switch depression.
For safety, fast charge is inhibited
unless/until the battery tempera
ture and voltage are within config
ured limits.

Temperature, voltage, and time are
monitored throughout fast charge.

-

Fast charge is terminated by any of
the following:

Rate of temperature rise

n

(∆T/∆t)

Negative delta voltage (-∆V)

n

Maximum voltage

n

Maximum temperature

n

n

Maximum time

After fast charge, optional top-off
and pulsed current maintenance
phases are available.

DIS

Discharge control output,

A

battery A

-

-

DCMD

SLUS079–JUNE 1999 F

A

DVEN

TM

1

TM

2

TCO

TS

A

TS

B

BAT

A

BAT

B

SNS

A

20-Pin DIP or SOIC

1
2

3
4
5
6
7
8
9
10

20
19

18

17
16
15
14
13
12
11

PN200501.eps

FCC
CH

MOD
MOD
V

CC

V

SS
FCC
CH
DIS

SNS

DVEN -∆V enable

B

B

B
A

A

A

A

B

TM

TM

TCO Temperature cut-off

TS
TS

BAT
BAT

Timer mode select 1

1

Timer mode select 2

2

, Temperature sense input,

A

battery A/B

B

, Battery voltage input,

A

battery A/B

B

, Charge status output,

CH

A

CH

FCC
FCC

V

V

MOD
MOD

battery A/B

B

, Fast charge complete output,

A

battery A/B

B

System ground

SS

5.0V±10% power

CC

, Charge current control

A

output, battery A/B

B

SNSA, Sense resistor input ,
SNSB battery A/B

1

bq2005

Pin Descriptions

DCMD

DVEN

TM
TM

TCO

TS

A

TS

B

BAT
BAT

SNS
SNS

Discharge-before-charge control input,

A

battery A

DCMD

controls the discharge-before-charge

A

function of the bq2005. A negative-going
pulse on DCMD
EDV followed by a charge if conditions allow.
By tying DCMD
discharge-before-charge is enabled on every
new charge cycle start.

-∆V enable input

This input enales/disables -∆V charge termina
tion. If DVEN is high, the -∆V test is enabled.
If DVEN is low, -∆V test is disabled. The state
of DVEN may be changed at any time.

Timer mode inputs

–

1

2

TM

and TM2are three-state inputs that con

1

figure the fast charge safety timer, -∆V hold­off time, and that enhance/disable top-off.
See Table 2.

Temperature cutoff threshold input

Input to set maximum allowable battery
temperature. If the potential between TS
and SNSAor TSB and SNSBis less than the
voltage at the TCO input, then fast charge or
top-off charge is terminated for the corre­sponding battery pack.

Temperature sense inputs

,

Input, referenced to SNS
tively, for an external thermistor monitoring
battery temperature.

Voltage inputs

,

A

B

The battery voltage sense input, referenced to
SNS

, respectively. This is created by a

A,B

high-impedance resistor divider network con
nected between the positive and the negative
terminals of the battery.

Charging current sense inputs,

,

A

B

SNS

controls the switching of MOD

A,B

based on the voltage across an external
sense resistor in the current path of the bat
tery. SNS is the reference potential for the
TS and BAT pins. If SNS is connected to
V

, MOD switches high at the beginning of

SS

charge and low at the end of charge.

initiates a discharge to

A

to ground, automatic

A

or SNSB,respec

A

A,B

DIS

Discharge control output

A

Push-pull output used to control an external
transistor to discharge battery A before
charging.

CH
CH

A

B

Charge status outputs

,

Push-pull outputs indicating charging status
for batteries A and B, respectively. See Fig

-

ure 1 and Table 2.

FCC
FCC

Fast charge complete outputs

,

A

B

Open-drain outputs indicating fast charge

-

MOD
MOD

complete for batteries A and B, respectively.
See Figure 1 and Table 2.

Charge current control outputs

,

A

B

MOD

is a push-pull output that is used to

A,B

control the charging current to the battery.

-

MOD
current to flow and low to inhibit charging

switches high to enable charging

A,B

current flow to batteries A and B,
respectively.

V

CC

VCCsupply input

5.0 V, ±10% power input.

A

Vss

Ground

-

-

-

2

bq2005

Functional Description

Figure 3 shows a block diagram and Figure 4 shows a
state diagram of the bq2005.

Battery Voltage and Temperature
Measurements

Battery voltage and temperature are monitored for maxi
mum allowable values. The voltage presented on the bat
tery sense input, BAT
tween 0.95 ∗ V

CC

resistor-divider ratio of:

is recommended to maintain the battery voltage within
the valid range, where N is the number of cells, RB1 is
the resistor connected to the positive battery terminal,
and RB2 is the resistor connected to the negative bat
tery terminal. See Figure 1.

Note: This resistor-divider network input impedance to
end-to-end should be at least 200kΩ and less than 1MΩ.

A ground-referenced negative temperature coefficient ther­mistor placed in proximity to the battery may be used as a
low-cost temperature-to-voltage transducer. The tempera­ture sense voltage input at TS
resistor-thermistor network between V
Figure 1. Both the BAT
enced to SNS

, so the signals used inside the IC are:

A,B

V

BAT(A,B)-VSNS(A,B)=VCELL(A,B)

V

TS(A,B)-VSNS(A,B)=VTEMP(A,B)

, must be divided down to be

A,B

and 0.475 ∗ VCCfor proper operation. A

RB1

=−1

RB2N2.375

is developed using a

A,B

A,B

and TS

and VSS. See

CC

inputs are refer-

A,B

and

Discharge-Before-Charge

The DCMDAinput is used to command discharge­before-charge via the DIS
DIS

becomes active (high) until V

A

where:

= 0.475 ∗ VCC± 30mV

V

EDV

at which time DIS

­begins.

-

­The DCMD

A

goes low and a new fast charge cycle

A

input is internally pulled up to VCC(its in
active state). Leaving the input unconnected, therefore,
results in disabling discharge-before-charge. A negative
going pulse on DCMD

A

at any time regardless of the current state of the
bq2005. If DCMD

A

charge will be the first step in all newly started charge
cycles.

Starting A Charge Cycle

-

A new charge cycle is started by (see Figure 2):

1. V

2. V

If DCMD

rising above 4.5V

CC

falling through the maximum cell voltage,

CELL

V

where:

MCV

V

= 0.95 ∗ VCC± 30mV

MCV

is tied low, a discharge-before-charge will be

A

executed as the first step of the new charge cycle. Oth­erwise, pre-charge qualification testing will be the first
step.

The battery must be within the configured temperature
and voltage limits before fast charging begins.

output. Once activated,

A

falls below V

CELL

initiates discharge-before-charge

is tied to VSS, discharge-before-

EDV

-

bq2005

BAT

SNS

A,B

A,B

Negative Temperature

Coefficient Thermister

V

CC

PACK+

TS

RB1

A,B

bq2005

RB2

PACK-

SNS

A,B

Figure 1. Voltage and Temperature Monitoring

3

RT1

RT2

PACK +

N
T
C

PACK -

Fg2005-1.eps

bq2005

The valid battery voltage range is V
The valid temperature range is V

EDV<VBAT<VMCV.

HTF<VTEMP<VLTF

where:

= 0.4 ∗ VCC± 30mV

V

LTF

= [(1/4 ∗ V

V

HTF

V

is the voltage presented at the TCO input pin, and is

TCO

configured by the user with a resistor divider between V

) + (3/4 ∗ V

LTF

)] ± 30mV

TCO

CC

and ground. The allowed range is 0.2 to 0.4 ∗ VCC.

If the temperature of the battery is out of range, or the
voltage is too low, the chip enters the charge pending
state and waits for both conditions to fall within their al
lowed limits. The MOD

output is modulated to pro

A,B

vide the configured trickle charge rate in the charge
pending state. There is no time limit on the charge

Charge

Pending*

(Pulse-Trickle)

Fast Charging

DIS

MOD

or
MOD

CH

A

A,B

A,B

A,B

Dis-

charge

(Optional
Battery A)

Switch-mode
Configuration

External
Regulation

Status Output

pending state; the charger remains in this state as long

,

as the voltage or temperature conditons are outside of
the allowed limits. If the voltage is too high, the chip
goes to the battery absent state and waits until a new
charge cycle is started.

Fast charge continues until termination by one or more
of the five possible termination conditions:

Delta temperature/delta time (∆T/∆t)

n

Negative delta voltage (-∆V)

n

Maximum voltage

n

­Maximum temperature

n

­Maximum time

n

Top-Off

(Optional)

4s

34s

4s

34s

Pulse-Trickle

260 s

Note*

260 s

Note*

FCC

Status Output

A,B

Battery within temperature/voltage limits.

Battery discharged to 0.475 * V
temperature/voltage limits.

Discharge-Before-Charge started

*See Table 3 for pulse-trickle period.

Figure 2. Charge Cycle Phases

Battery outside

CC.

T200501.eps

4

Table 1. Fast Charge Safety Time/Hold-Off/Top-Off Table

Corresponding

Fast-Charge Rate TM1 TM2

C/4 Low Low 360 137 Disabled
C/2 Float Low 180 820 Disabled

1C High Low 90 410 Disabled
2C Low Float 45 200 Disabled
4C Float Float 23 100 Disabled

C/2 High Float 180 820 C/16

1C Low High 90 410 C/8
2C Float High 45 200 C/4
4C High High 23 100 C/2

Note: Typical conditions = 25°C, VCC= 5.0V.

Typical Fast-Charge

and Top-Off
Time Limits

Typical -∆V/MCV

Hold-Off

Time (seconds)

bq2005

Top-Off

Rate

-∆V Termination

If the DVEN input is high, the bq2005 samples the volt­age at the BAT pin once every 34s. If V

CELL

is lower
than any previously measured value by 12mV ±4mV,
fast charge is terminated. The -∆V test is valid in the
range V

- (0.2 ∗ VCC)<V

MCV

CELL<VMCV

.

Voltage Sampling

Each sample is an average of 16 voltage measurements
taken 57µs apart. The resulting sample period
(18.18ms) filters out harmonics around 55Hz. This tech­nique minimizes the effect of any AC line ripple that
may feed through the power supply from either 50Hz or
60Hz AC sources. Tolerance on all timing is ±16%.

Voltage Termination Hold-off

A hold-off period occurs at the start of fast charging.
During the hold-off period, -∆V termination is disabled.
This avoids premature termination on the voltage spikes
sometimes produced by older batteries when fast-charge
current is first applied. ∆T/∆t, maximum voltage and
maximum temperature terminations are not affected by
the hold-off period.

∆T/∆t Termination

The bq2005 samples at the voltage at the TS pin every
34s, and compares it to the value measured two samples
earlier. If V
charge is terminated. The ∆T/∆t termination test is
valid only when V

has fallen 16mV ±4mV or more, fast

TEMP

TCO<VTEMP<VLTF

.

Temperature Sampling

Each sample is an average of 16 voltage measurements
taken 57µs apart. The resulting sample period
(18.18ms) filters out harmonics around 55Hz. This tech­nique minimizes the effect of any AC line ripple that
may feed through the power supply from either 50Hz or
60Hz AC sources. Tolerance on all timing is ±16%.

Maximum Voltage, Temperature, and Time

Anytime V
goes off) immediately. If the bq2005 is not in the voltage
hold-off period, fast charging also ceases immediately. If
V

CELL

(maximum), the chip transitions to the Charge Complete
state (maximum voltage termination). If V
above V
tions to the Battery Absent state (battery removal). See
Figure 4.

Maximum temperature termination occurs anytime the
voltage on the TS pin falls below the temperature cut-off
threshold V
rises above the minimum temperature fault threshold,
V

after fast charge begins.

LTF,

Maximum charge time is configured using the TM pin.
Time settings are available for corresponding charge
rates of C/4, C/2, 1C, and 2C. Maximum time-out termi
nation is enforced on the fast-charge phase, then reset,
and enforced again on the top-off phase, if selected.
There is no time limit on the trickle-charge phase.

rises above V

CELL

MCV,

then falls back below V

at the expiration of t

MCV

Charge will also be terminated if V

TCO.

CHG goes high (the LED

before t

MCV

CELL

the bq2005 transi

MCV,

MCV

remains

=1s

TEMP

Top-off Charge

An optional top-off charge phase may be selected to
follow fast charge termination for the C/2 through 4C
rates. This phase may be necessary on NiMH or other

-

-

5