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bq2005

Fast-Charge IC

for Dual-Battery Packs

Features

Sequential fast charge and con

➤

ditioning of two NiCd or NiMH
nickel cadmium or nickel-metal
hydride battery packs

Hysteretic PWM switch-mode

➤

current regulation or gated con
trol of an external regulator

Easily integrated into systems

➤

or used as a stand-alone charger

Pre-charge qualification of tem

➤

perature and voltage

Direct LED outputs display

➤

battery and charge status

➤ Fast-charge termination by

temperature/∆ time, -∆V, maxi-

∆

mum voltage, maximum tem­perature, and maximum time

➤ Optional top-off and pulse-

trickle charging

Pin Connections

General Description

The bq2005 Fast-Charge IC provides

­comprehensive fast charge control
functions together with high-speed
switching power control circuitry on a
monolithic CMOS device for sequential
charge management in dual battery

­pack applications.

Integration of closed-loop current
control circuitry allows the bq2005
to be the basis of a cost-effective so
lution for stand-alone and system-

­integrated chargers for batteries of

one or more cells.

Switch-activated discharge-before­charge allows bq2005-based chargers
to support battery conditioning and
capacity determination.

High-efficiency power conversion is
accomplished using the bq2005 as a
hysteretic PWM controller for
switch-mode regulation of the charg­ing current. The bq2005 may alterna-

Pin Names

DCMDADischarge command input,

battery A

tively be used to gate an externally
regulated chargingcurrent.

Fast charge may begin on application
of the charging supply, replacement
of the battery, or switch depression.
For safety, fast charge is inhibited
unless/until the battery tempera
ture and voltage are within config
ured limits.

Temperature, voltage, and time are
monitored throughout fast charge.

-

Fast charge is terminated by any of
the following:

Rate of temperature rise

n

(∆T/∆t)

Negative delta voltage (-∆V)

n

Maximum voltage

n

Maximum temperature

n

n

Maximum time

After fast charge, optional top-off
and pulsed current maintenance
phases are available.

DIS

Discharge control output,

A

battery A

-

-

DCMD

SLUS079–JUNE 1999 F

A

DVEN

TM

1

TM

2

TCO

TS

A

TS

B

BAT

A

BAT

B

SNS

A

20-Pin DIP or SOIC

1
2

3
4
5
6
7
8
9
10

20
19

18

17
16
15
14
13
12
11

PN200501.eps

FCC
CH

MOD
MOD
V

CC

V

SS
FCC
CH
DIS

SNS

DVEN -∆V enable

B

B

B
A

A

A

A

B

TM

TM

TCO Temperature cut-off

TS
TS

BAT
BAT

Timer mode select 1

1

Timer mode select 2

2

, Temperature sense input,

A

battery A/B

B

, Battery voltage input,

A

battery A/B

B

, Charge status output,

CH

A

CH

FCC
FCC

V

V

MOD
MOD

battery A/B

B

, Fast charge complete output,

A

battery A/B

B

System ground

SS

5.0V±10% power

CC

, Charge current control

A

output, battery A/B

B

SNSA, Sense resistor input ,
SNSB battery A/B

1

bq2005

Pin Descriptions

DCMD

DVEN

TM
TM

TCO

TS

A

TS

B

BAT
BAT

SNS
SNS

Discharge-before-charge control input,

A

battery A

DCMD

controls the discharge-before-charge

A

function of the bq2005. A negative-going
pulse on DCMD
EDV followed by a charge if conditions allow.
By tying DCMD
discharge-before-charge is enabled on every
new charge cycle start.

-∆V enable input

This input enales/disables -∆V charge termina
tion. If DVEN is high, the -∆V test is enabled.
If DVEN is low, -∆V test is disabled. The state
of DVEN may be changed at any time.

Timer mode inputs

–

1

2

TM

and TM2are three-state inputs that con

1

figure the fast charge safety timer, -∆V hold­off time, and that enhance/disable top-off.
See Table 2.

Temperature cutoff threshold input

Input to set maximum allowable battery
temperature. If the potential between TS
and SNSAor TSB and SNSBis less than the
voltage at the TCO input, then fast charge or
top-off charge is terminated for the corre­sponding battery pack.

Temperature sense inputs

,

Input, referenced to SNS
tively, for an external thermistor monitoring
battery temperature.

Voltage inputs

,

A

B

The battery voltage sense input, referenced to
SNS

, respectively. This is created by a

A,B

high-impedance resistor divider network con
nected between the positive and the negative
terminals of the battery.

Charging current sense inputs,

,

A

B

SNS

controls the switching of MOD

A,B

based on the voltage across an external
sense resistor in the current path of the bat
tery. SNS is the reference potential for the
TS and BAT pins. If SNS is connected to
V

, MOD switches high at the beginning of

SS

charge and low at the end of charge.

initiates a discharge to

A

to ground, automatic

A

or SNSB,respec

A

A,B

DIS

Discharge control output

A

Push-pull output used to control an external
transistor to discharge battery A before
charging.

CH
CH

A

B

Charge status outputs

,

Push-pull outputs indicating charging status
for batteries A and B, respectively. See Fig

-

ure 1 and Table 2.

FCC
FCC

Fast charge complete outputs

,

A

B

Open-drain outputs indicating fast charge

-

MOD
MOD

complete for batteries A and B, respectively.
See Figure 1 and Table 2.

Charge current control outputs

,

A

B

MOD

is a push-pull output that is used to

A,B

control the charging current to the battery.

-

MOD
current to flow and low to inhibit charging

switches high to enable charging

A,B

current flow to batteries A and B,
respectively.

V

CC

VCCsupply input

5.0 V, ±10% power input.

A

Vss

Ground

-

-

-

2

bq2005

Functional Description

Figure 3 shows a block diagram and Figure 4 shows a
state diagram of the bq2005.

Battery Voltage and Temperature
Measurements

Battery voltage and temperature are monitored for maxi
mum allowable values. The voltage presented on the bat
tery sense input, BAT
tween 0.95 ∗ V

CC

resistor-divider ratio of:

is recommended to maintain the battery voltage within
the valid range, where N is the number of cells, RB1 is
the resistor connected to the positive battery terminal,
and RB2 is the resistor connected to the negative bat
tery terminal. See Figure 1.

Note: This resistor-divider network input impedance to
end-to-end should be at least 200kΩ and less than 1MΩ.

A ground-referenced negative temperature coefficient ther­mistor placed in proximity to the battery may be used as a
low-cost temperature-to-voltage transducer. The tempera­ture sense voltage input at TS
resistor-thermistor network between V
Figure 1. Both the BAT
enced to SNS

, so the signals used inside the IC are:

A,B

V

BAT(A,B)-VSNS(A,B)=VCELL(A,B)

V

TS(A,B)-VSNS(A,B)=VTEMP(A,B)

, must be divided down to be

A,B

and 0.475 ∗ VCCfor proper operation. A

RB1

=−1

RB2N2.375

is developed using a

A,B

A,B

and TS

and VSS. See

CC

inputs are refer-

A,B

and

Discharge-Before-Charge

The DCMDAinput is used to command discharge­before-charge via the DIS
DIS

becomes active (high) until V

A

where:

= 0.475 ∗ VCC± 30mV

V

EDV

at which time DIS

­begins.

-

­The DCMD

A

goes low and a new fast charge cycle

A

input is internally pulled up to VCC(its in
active state). Leaving the input unconnected, therefore,
results in disabling discharge-before-charge. A negative
going pulse on DCMD

A

at any time regardless of the current state of the
bq2005. If DCMD

A

charge will be the first step in all newly started charge
cycles.

Starting A Charge Cycle

-

A new charge cycle is started by (see Figure 2):

1. V

2. V

If DCMD

rising above 4.5V

CC

falling through the maximum cell voltage,

CELL

V

where:

MCV

V

= 0.95 ∗ VCC± 30mV

MCV

is tied low, a discharge-before-charge will be

A

executed as the first step of the new charge cycle. Oth­erwise, pre-charge qualification testing will be the first
step.

The battery must be within the configured temperature
and voltage limits before fast charging begins.

output. Once activated,

A

falls below V

CELL

initiates discharge-before-charge

is tied to VSS, discharge-before-

EDV

-

bq2005

BAT

SNS

A,B

A,B

Negative Temperature

Coefficient Thermister

V

CC

PACK+

TS

RB1

A,B

bq2005

RB2

PACK-

SNS

A,B

Figure 1. Voltage and Temperature Monitoring

3

RT1

RT2

PACK +

N
T
C

PACK -

Fg2005-1.eps

bq2005

The valid battery voltage range is V
The valid temperature range is V

EDV<VBAT<VMCV.

HTF<VTEMP<VLTF

where:

= 0.4 ∗ VCC± 30mV

V

LTF

= [(1/4 ∗ V

V

HTF

V

is the voltage presented at the TCO input pin, and is

TCO

configured by the user with a resistor divider between V

) + (3/4 ∗ V

LTF

)] ± 30mV

TCO

CC

and ground. The allowed range is 0.2 to 0.4 ∗ VCC.

If the temperature of the battery is out of range, or the
voltage is too low, the chip enters the charge pending
state and waits for both conditions to fall within their al
lowed limits. The MOD

output is modulated to pro

A,B

vide the configured trickle charge rate in the charge
pending state. There is no time limit on the charge

Charge

Pending*

(Pulse-Trickle)

Fast Charging

DIS

MOD

or
MOD

CH

A

A,B

A,B

A,B

Dis-

charge

(Optional
Battery A)

Switch-mode
Configuration

External
Regulation

Status Output

pending state; the charger remains in this state as long

,

as the voltage or temperature conditons are outside of
the allowed limits. If the voltage is too high, the chip
goes to the battery absent state and waits until a new
charge cycle is started.

Fast charge continues until termination by one or more
of the five possible termination conditions:

Delta temperature/delta time (∆T/∆t)

n

Negative delta voltage (-∆V)

n

Maximum voltage

n

­Maximum temperature

n

­Maximum time

n

Top-Off

(Optional)

4s

34s

4s

34s

Pulse-Trickle

260 s

Note*

260 s

Note*

FCC

Status Output

A,B

Battery within temperature/voltage limits.

Battery discharged to 0.475 * V
temperature/voltage limits.

Discharge-Before-Charge started

*See Table 3 for pulse-trickle period.

Figure 2. Charge Cycle Phases

Battery outside

CC.

T200501.eps

4

Table 1. Fast Charge Safety Time/Hold-Off/Top-Off Table

Corresponding

Fast-Charge Rate TM1 TM2

C/4 Low Low 360 137 Disabled
C/2 Float Low 180 820 Disabled

1C High Low 90 410 Disabled
2C Low Float 45 200 Disabled
4C Float Float 23 100 Disabled

C/2 High Float 180 820 C/16

1C Low High 90 410 C/8
2C Float High 45 200 C/4
4C High High 23 100 C/2

Note: Typical conditions = 25°C, VCC= 5.0V.

Typical Fast-Charge

and Top-Off
Time Limits

Typical -∆V/MCV

Hold-Off

Time (seconds)

bq2005

Top-Off

Rate

-∆V Termination

If the DVEN input is high, the bq2005 samples the volt­age at the BAT pin once every 34s. If V

CELL

is lower
than any previously measured value by 12mV ±4mV,
fast charge is terminated. The -∆V test is valid in the
range V

- (0.2 ∗ VCC)<V

MCV

CELL<VMCV

.

Voltage Sampling

Each sample is an average of 16 voltage measurements
taken 57µs apart. The resulting sample period
(18.18ms) filters out harmonics around 55Hz. This tech­nique minimizes the effect of any AC line ripple that
may feed through the power supply from either 50Hz or
60Hz AC sources. Tolerance on all timing is ±16%.

Voltage Termination Hold-off

A hold-off period occurs at the start of fast charging.
During the hold-off period, -∆V termination is disabled.
This avoids premature termination on the voltage spikes
sometimes produced by older batteries when fast-charge
current is first applied. ∆T/∆t, maximum voltage and
maximum temperature terminations are not affected by
the hold-off period.

∆T/∆t Termination

The bq2005 samples at the voltage at the TS pin every
34s, and compares it to the value measured two samples
earlier. If V
charge is terminated. The ∆T/∆t termination test is
valid only when V

has fallen 16mV ±4mV or more, fast

TEMP

TCO<VTEMP<VLTF

.

Temperature Sampling

Each sample is an average of 16 voltage measurements
taken 57µs apart. The resulting sample period
(18.18ms) filters out harmonics around 55Hz. This tech­nique minimizes the effect of any AC line ripple that
may feed through the power supply from either 50Hz or
60Hz AC sources. Tolerance on all timing is ±16%.

Maximum Voltage, Temperature, and Time

Anytime V
goes off) immediately. If the bq2005 is not in the voltage
hold-off period, fast charging also ceases immediately. If
V

CELL

(maximum), the chip transitions to the Charge Complete
state (maximum voltage termination). If V
above V
tions to the Battery Absent state (battery removal). See
Figure 4.

Maximum temperature termination occurs anytime the
voltage on the TS pin falls below the temperature cut-off
threshold V
rises above the minimum temperature fault threshold,
V

after fast charge begins.

LTF,

Maximum charge time is configured using the TM pin.
Time settings are available for corresponding charge
rates of C/4, C/2, 1C, and 2C. Maximum time-out termi
nation is enforced on the fast-charge phase, then reset,
and enforced again on the top-off phase, if selected.
There is no time limit on the trickle-charge phase.

rises above V

CELL

MCV,

then falls back below V

at the expiration of t

MCV

Charge will also be terminated if V

TCO.

CHG goes high (the LED

before t

MCV

CELL

the bq2005 transi

MCV,

MCV

remains

=1s

TEMP

Top-off Charge

An optional top-off charge phase may be selected to
follow fast charge termination for the C/2 through 4C
rates. This phase may be necessary on NiMH or other

-

-

5

bq2005

battery chemistries that have a tendency to terminate
charge prior to reaching full capacity. With top-off en
abled, charging continues at a reduced rate after
fast-charge termination for a period of time selected
by the TM

and TM2input pins. (See Table 2.) During

1

top-off, the CC pin is modulated at a duty cycle of 4s
active for every 30s inactive. This modulation results
in an average rate 1/8th that of the fast charge rate.
Maximum voltage, time, and temperature are the only
termination methods enabled during top-off.

Pulse-Trickle Charge

Pulse-trickle charging follows the fast charge and op
tional top-off charge phases to compensate for self­discharge of the battery while it is idle in the charger.
The configured pulse-trickle rate is also applied in the
charge pending state to raise the voltage of an over­discharged battery up to the minimum required before
fast charge can begin.

In the pulse-trickle mode, MOD is active for 260µsofa
period specified by the settings of TM1 and TM2. See Ta
ble 1. The resulting trickle-charge rate is C/64 when
top-off is enabled and C/32 when top-off is disabled. Both
pulse trickle and top-off may be disabled by tying TM1
and TM2 to V

.

SS

Charge Status Indication

Charge status is indicated by the CHG output. The
state of the CHG output in the various charge cycle
phases is shown in Figure 4 and illustrated in Figure 2.

Temperature status is indicated by the TEMP output.
TEMP is in the high state whenever V
temperature window defined by the V
perature limits, and is low when the battery tempera
ture is outside these limits.

In all cases, if V

exceeds the voltage at the MCV

CELL

pin, both CHG and TEMP outputs are held high regard
less of other conditions. CHG and TEMP may both be used
to directly drive an LED.

TEMP

LTF

and V

is within the

tem

HTF

selected), and then maintenance charging on both. If
only battery A is present, the charge cycle begins on A

­and continues until fast charge termination even if a
battery is inserted in channel B in the meantime. A
new battery insertion in channel B while A is in the
top-off phase terminates top-off on A and begins a new
charge cycle on B. If A is configured for or commanded
to discharge-before-charge, the discharge may take
place while channel B is the active charging channel.
When the discharge is complete, if B is still the active
channel battery A enters the Charge Pending state until
A becomes the active channel.

-

Charge Current Control

The bq2005 controls charge current through the MOD
put pin. The current control circuitry is designed to sup
port implementation of a constant-current switching regu
lator or to gate an externally regulated current source.

When used in switch mode configuration, the nominal
regulated current is:

-

Charge current is monitored at the SNS
voltage drop across a sense resistor, R
low side of the battery pack and ground. R

I

REG

= 0.225V/R

SNS

input by the

A,B

, between the

SNS

SNS

provide the desired fast charge current.

If the voltage at the SNS
MOD

output is switched high to pass charge current to

A,B

pin is less than V

A,B

SNSLO

the battery.

When the SNS
MOD
current to the battery.

-

output is switched low—shutting off charging

A,B

-

When used to gate an externally regulated current

­source, the SNS

voltage is greater than V

A,B

= 0.04 ∗ VCC± 25mV

V

SNSLO

= 0.05 ∗ VCC± 25mV

V

SNSHI

pin is connected to VSS, and no sense

A,B

SNSHI

resisitor is required.

out

A,B

is sized to

, the

, the

-

-

-

Pack Sequencing

If both batteries A and B are present when a new charge
cycle is started, the charge cycle starts on battery B and
B remains the active channel until fast charge termina
tion. Then battery A will be fast charged, followed by a
top-off phase on B (if selected), a top-off phase on A (if

-

6

bq2005

FCC

FCC

DCM

DVEN

CH

CH

TM1

OSC

A

B

A

B

D

A

DISPLAY

CONTROL

CHARG

DISCHARGE

NTRO

CO

CO

E CONTROL STATE

ACHINE

M

L

TIM

NTROL

ING

M

CONTROL

TM2

O

TCO

TS

TS

SNS

SNS

BAT

BAT

A

B

A

B

A

B

TCO

TCO

CHECK

CHECK

LTF

CHECK

LTF

CHECK

- V

V

SNS

TS

A/D

A/D

V

- V

BAT

SNS

EDV

EDV

CHECK

CHECK

CV

M

CHECK

CV

M

D

CHECK

-

-

-

-

DIS

D

OD

A

M

MO

A

B

V

CC

V

SS

BD2005

Figure 3. Block Diagram

7

bq2005

New Charge Cycle
Started by either one of:

V

rising to valid level

CC

Battery replacement

falling through V

(V

CELL

V

EDV

V

TEMP

V

Battery

TEMP

Temperature?

V

V

<

HTF

TEMP

Fast

CHG = low

FCC = high

V

CELL

- V or T/ t or
< V

V

TEMP

Maximum Time Out

Top-off

selected?

Yes

No

TCO

< V

> V
< V

< V

> V

or

)

MCV

< V

CELL

Charge
Pending

or

LTF

HTF

LTF

MCV

DCMDA tied to

(channel A only)

No or

MCV

Battery Voltage?

V

CELL

Trickle

CHG = 1/8s

flash

FCC = high

V

EDV

and
V

HTF

ground?

channel B

< V

ED

V

CELL

< V

CELL

< V

TEMP

V

>

CELL

V

MCV

Top-off

CHG = high

FCC = low

V

> V

< V

< V

Yes

V

CELL

V

EDV

V

CELL

V

MCV

MCV

MCV

LTF

Trickle

CHG = high

FCC = high

V

<

CELL

V

MC

V

V

TEMP

or Maximum
Time Out

<

>

Rising edge

on DCMD

Discharge

CH

A

flash

FCC

V

CELL

V

MCV

< V

TCO

= 1/8s

= high

A

V

CELL

t >
t

MC

V

>

Trickle

CHG = high

FCC = low

A

> V

MCV

Battery
Absent

Trickle

CHG = high

FCC = high

Charge
Complete

Figure 4. State Diagram

8

SD2005

bq2005

Absolute Maximum Ratings

Symbol Parameter Minimum Maximum Unit Notes

V

CC

V

T

T

OPR

T

STG

T

SOLDER

T

BIAS

VCCrelative to V

DC voltage applied on any pin ex
cluding V

CC

SS

relative to V

-

SS

Operating ambient temperature -20 +70 °C Commercial

Storage temperature -55 +125 °C

Soldering temperature - +260 °C 10 sec max.

Temperature under bias -40 +85 °C

Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional opera

tion should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Expo
sure to conditions beyond the operational limits for extended periods of time may affect device reliability.

-0.3 +7.0 V

-0.3 +7.0 V

-

-

DC Thresholds (T

A=TOPR;VCC

±

10%)

Symbol Parameter Rating Tolerance Unit Notes

V

SNSHI

V

SNSLO

V

LTF

V

HTF

V

EDV

V

MCV

V

THERM

-∆V

High threshold at SNS
resulting in MOD

Low threshold at SNS
sulting in MOD

Low-temperature fault

High-temperature fault

End-of-discharge voltage

Maximum cell voltage

TS input change for ∆T/∆t
detection

BAT input change for -∆V
detection

A,B

= Low

A,B

= High

A,B

A,B

0.05*V

CC

-

re

(1/4*V

0.04*V

0.4*V

) + (3/4*V

LTF

0.475*V

0.95*V

CC

CC

TCO

CC

CC

16

12

0.025

±

0.010

±

0.030

±

)

0.030

±

0.030

±

0.030

±

±4

±4

V

V

V

V

terminates charge

V

V

charge

V

V

fast charge

V

V

terminates charge

mV

mV

V

≥

TEMP

TEMP

CELL<VEDV

CELL>VMCV

LTF

V

≤

HTF

inhibits/

inhibits

inhibits

inhibits/

9

bq2005

Recommended DC Operating Conditions (T

= 0 to +70°C)

A

Symbol Parameter Minimum Typical Maximum Unit Notes

V

V

V

V

V

V

V

V

V

V

I

I

I

I

I

I

I

I

CC

OH

OL

L

IL

IH

IZ

BAT

CC

CELL

BAT

TEMP

TS

TCO

IH

IL

OH

OL

Supply voltage 4.5 5.0 5.5 V

BAT voltage potential 0 - V

Battery input 0 - V

TS voltage potential 0 - V

Thermistor input 0 - V

Temperature cutoff 0.2*V

CC

- 0.4*V

CC

CC

CC

CC

CC

VV

BAT

V

VVTS- V

V

V

- V

SNS

SNS

Logic input high 2.0 - - V DCMDA, DVEN

Logic input high V

- 0.3 - - V TM1,TM

CC

2

Logic input low - - 0.8 V DCMDA, DVEN

Logic input low - - 0.3 V TM

Logic output high VCC- 0.5 - - V DISA, MOD

Logic output low - - 0.5 V

DIS

I

OL

,TM

1

, FCC

A

5mA

≤

2

A,B,IOH

,CH

A,B

Supply current - 1.0 3.0 mA Outputs unloaded

DISA, MOD

DISA, FCC
CH

sink

A,B

Input leakage

Logic input low source - - 70.0

Logic input high source -70.0 - -

TM1,TM2tri-state open
detection

Input current to BAT
when battery is removed

source -5.0 - - mA @VOH= VCC- 0.5V

A,B

A,B

, MOD

A,B

,

5.0 - - mA

--±1

- - -400

-2.0 - 2.0

@V

= VSS+ 0.5V

OL

A DVEN, V = V

µ

A DCMDA, V = V

µ

,TM2,

TM

A

µ

A

µ

A

µ

1

V = V

SS

,TM2,

TM

1

V = V

CC

,TM2should be left dis

TM

1

connected (floating) for Z logic
input state.

= 5.0V; TA= 25°C; input

V

A,B

- - -20

µ

CC

A

should be limited to this cur
rent when input exceeds V

SS

to VSS+ 0.3V

- 0.3V to V

Note: All voltages relative to VSS, except as noted.

to V

SS

A,B

CC

-5mA

≤

, MOD

CC

CC

A,B

,

-

­.

10

bq2005

Impedance

Symbol Parameter Minimum Typical Maximum Unit

R

BATA,B

R

TSA,B

R

TCO

R

SNSA,B

Battery A/B input impedance 50 - - M

TS

input impedance 50 - - M

A,B

TCO input impedance 50 - - M

SNS

input impedance 50 - - M

A,B

Ω

Ω

Ω

Ω

Timing (T

= 0 to +70°C; V

A

CC

±

10%)

Symbol Parameter Minimum Typical Maximum Unit Notes

t

d

t

t

PW

FCV

REG

MCV

Pulse width for DCMDA,
pulse command

1- -

Time base variation -16 - 16 % VCC= 4.5V to 5.5V

MOD output regulation
frequency

Maximum voltage
termination time limit

- - 300 kHz

--1s

Pulse start for discharge-before-

s

µ

charge

Time limit to distinguish battery
removed from charge complete

Note: Typical is at TA= 25°C, VCC= 5.0V.

11

bq2005

PN: 20-Pin DIP

20-Pin PN

(DIP)

Dimension Minimum Maximum

A 0.160 0.180

A1 0.015 0.040

D

B 0.015 0.022

B1 0.055 0.065

C 0.008 0.013
D 1.010 1.060
E 0.300 0.325

E1 0.230 0.280

e 0.300 0.370

E1

E

A

A1

L

C

e

GS

B1

B

G 0.090 0.110
L 0.115 0.135
S 0.055 0.080

All dimensions are in inches.

12

S: 20-Pin SOIC

bq2005

20-Pin S(SOIC

)

Dimension Minimum Maximum

A 0.095 0.105

B

e

D

A1 0.004 0.012

B 0.013 0.020
C 0.008 0.013
D 0.500 0.515
E 0.290 0.305

e 0.045 0.055

E

H

A

C

L

A1

.004

H 0.395 0.415
L 0.020 0.040

All dimensions are in inches.

13

bq2005

Data Sheet Revision History

Change No. Page No. Description Nature of Change

39V

4 5 Corrected sample period Was: 32s;

45,9

4 All Revised and expanded format of this

59T

rating Was V

SNSLO

Corrected -∆V threshold

data sheet

OPR

is 0.04 * V

Is: 34s

Was: 13mV
Is: 12mV

Clarification

Deleted industrial temperature range.

CC

- (0.01 * VCC);

SNSHI

Notes: Change 3 = Sept. 1996 D changes from Nov. 1993 C.

Change 4 = Nov. 1997 E changes from Sept. 1996 D.
Change 5 = June 1999 F changes from Nov. 1997 E.

14

Ordering Information

bq2005

bq2005

Package Option:

PN = 20-pin narrow plastic DIP
S = 20-pin SOIC

Device:

bq2005 Dual-Battery Fast-Charge IC

15

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