UNITRODE bq2004E, bq2004H Technical data

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bq2004E/H

Fast-Charge ICs

Features

Fast charge and conditioning of

➤

nickel cadmium or nickel-metal
hydride batteries

Hysteretic PWM switch-mode

➤

current regulation or gated con
trol of an external regulator

Easily integrated into systems or

➤

used as a stand-alone charger

Pre-charge qualification of tem

➤

perature and voltage

Configurable, direct LED outputs

➤

display battery and charge status
Fast-charge termination by ∆ tem

➤

perature/∆ time, peak volume de
tection, -∆V, maximum voltage,
maximum temperature, and maxi­mum time

➤ Optional top-off charge and

pulsed current maintenance
charging

➤ Logic-level controlled low-power

mode (< 5µA standby current)

General Description

The bq2004E and bq2004H Fast
Charge ICs provide comprehensive
fast charge control functions together
with high-speed switching power con
trol circuitry on a monolithic CMOS

­device.

Integration of closed-loop current
control circuitry allows the bq2004
to be the basis of a cost-effective so
lution for stand-alone and system-

­integrated chargers for batteries of

one or more cells.

Switch-activated discharge-before­charge allows bq2004E/H-based charg
ers to support battery conditioning

­and capacity determination.

-

High-efficiency power conversion is
accomplished using the bq2004E/H as
a hysteretic PWM controller for
switch-mode regulation of the charg­ing current. The bq2004E/H may al­ternatively be used to gate an exter­nally regulated charging current.

Fast charge may begin on application
of the charging supply, replacement
of the battery, or switch depression.
For safety, fast charge is inhibited
unless/until the battery tempera-

ture and voltage are within config
ured limits.

Temperature, voltage, and time are
monitored throughout fast charge.
Fast charge is terminated by any of

-

the following:

Rate of temperature rise

n

(∆T/∆t)

Peak voltage detection (PVD)

n

­Negative delta voltage (-∆V)

n

Maximum voltage

n

Maximum temperature

n

Maximum time

n

-

After fast charge, optional top-off
and pulsed current maintenance
phases with appropriate display
mode selections are available.

The bq2004H differs from the
bq2004E only in that fast charge,
hold-off, and top-off time units have
been scaled up by a factor of two,
and the bq2004H provides different
display selections. Timing differ­ences between the two ICs are illus­trated in Table 1. Display differ­ences are shown in Table 2.

-

Pin Connections

1

DCMD

DSEL

VSEL

TM

1

TM

2

TCO

TS

BAT

SLU S081 - JU NE 1999

16

2

15

3

14

4

13

5

12

6

11

7

10

8

9

16-Pin Narrow DIP

or Narrow SOIC

PN2004E01.eps

INH

DIS
MOD

VCC

V

SS
LED

LED
SNS

Pin Names

DCMD Discharge command

DSEL Display select

VSEL Voltage termination

select

TM

TM

2

1

TCO Temperature cutoff

Timer mode select 1

1

Timer mode select 2

2

TS Temperature sense

BAT Battery voltage

1

SNS Sense resistor input

LED

LED

V

SS

V

CC

Charge status output 1

1

Charge status output 2

2

System ground

5.0V±10% power

MOD Charge current control

DIS Discharge control

output

INH

Charge inhibit input

bq2004E/H

Pin Descriptions

DCMD

DSEL

VSEL

TM
TM

TCO

TS

BAT

Discharge-before-charge control input

The DCMD
that enable discharge-before-charge. DCMD
is pulled up internally. A negative-going
pulse on DCMD
of-discharge voltage (EDV) on the BAT pin,
followed by a new charge cycle start. Tying
DCMD

to ground enables automatic
discharge-before-charge on every new charge
cycle start.

Display select input

This three-state input configures the charge
status display mode of the LED
puts and can be used to disable top-off and
pulsed-trickle. See Table 2.

Voltage termination select input

This three-state input controls the voltage­termination technique used by the
bq2004E/H. When high, PVD is active.
When floating, -∆V is used. When pulled low,
both PVD and -∆V are disabled.

Timer mode inputs

–

1

2

TM

and TM2are three-state inputs that

1

configure the fast charge safety timer, voltage
termination hold-off time, “top-off ”, and
trickle charge control. See Table 1.

Temperature cut-off threshold input

Input to set maximum allowable battery
temperature. If the potential between TS
and SNS is less than the voltage at the TCO
input, then fast charge or top-off charge is ter
minated.

Temperature sense input

Input, referenced to SNS, for an external
thermister monitoring battery temperature.

Battery voltage input

BAT is the battery voltage sense input, refer
enced to SNS. This is created by a high­impedance resistor-divider network con
nected between the positive and the negative
terminals of the battery.

input controls the conditions

initiates a discharge to end-

and LED2out

1

SNS

Charging current sense input

SNS controls the switching of MOD based on
an external sense resistor in the current
path of the battery. SNS is the reference po

­tential for both the TS and BAT pins. If
SNS is connected to V
high at the beginning of charge and low at

, then MOD switches

SS

the end of charge.

LED
LED

Charge status outputs

–

1

2

Push-pull outputs indicating charging
status. See Table 2.

Vss

V

CC

-

Ground

VCCsupply input

5.0V, ±10% power input.

MOD

Charge current control output

MOD is a push-pull output that is used to
control the charging current to the battery.
MOD switches high to enable charging cur­rent to flow and low to inhibit charging
current flow.

DIS

Discharge control output

Push-pull output used to control an external
transistor to discharge the battery before
charging.

INH

Charge inhibit input

When low, the bq2004E/H suspends all
charge actions, drives all outputs to high im
pedance, and assumes a low-power opera

-

­tional state. When transitioning from low to
high, a new charge cycle is started.

-

-

-

2

bq2004E/H

Functional Description

Figure 2 shows a block diagram and Figure 3 shows a
state diagram of the bq2004E/H.

Battery Voltage and Temperature
Measurements

Battery voltage and temperature are monitored for
maximum allowable values. The voltage presented on
the battery sense input, BAT, should represent a
two-cell potential for the battery under charge. A
resistor-divider ratio of:

RB1

N

=

and

- 1

2

and VSS. See

CC

RB2

is recommended to maintain the battery voltage within
the valid range, where N is the number of cells, RB1 is
the resistor connected to the positive battery terminal,
and RB2 is the resistor connected to the negative bat­tery terminal. See Figure 1.

Note: This resistor-divider network input impedance to
end-to-end should be at least 200kΩand less than 1MΩ.

A ground-referenced negative temperature coefficient ther­mistor placed in proximity to the battery may be used as a
low-cost temperature-to-voltage transducer. The tempera­ture sense voltage input at TS is developed using a
resistor-thermistor network between V
Figure 1. Both the BAT and TS inputs are referenced to
SNS, so the signals used inside the IC are:

V

BAT-VSNS=VCELL

V

TS-VSNS=VTEMP

Discharge-Before-Charge

The DCMD input is used to command discharge-before­charge via the DIS output. Once activated, DIS becomes
active (high) until V
DIS goes low and a new fast charge cycle begins.

The DCMD

input is internally pulled up to VCC(its inac

falls below V

CELL

at which time

EDV,

tive state). Leaving the input unconnected, therefore,
results in disabling discharge-before-charge. A negative
going pulse on DCMD

initiates discharge-before-charge
at any time regardless of the current state of the
bq2004. If DCMD

is tied to VSS, discharge-before-charge

will be the first step in all newly started charge cycles.

Starting A Charge Cycle

A new charge cycle is started by:

1. Application of V

2. V

falling through the maximum cell voltage,

CELL

V

where:

MCV

3. A transition on the INH

If DCMD

is tied low, a discharge-before-charge will be
executed as the first step of the new charge cycle. Oth­erwise, pre-charge qualification testing will be the first
step.

The battery must be within the configured temperature
and voltage limits before fast charging begins.

The valid battery voltage range is V
where:

power.

CC

= 0.8 ∗ VCC± 30mV

V

MCV

= 0.4 ∗ VCC± 30mV

V

EDV

input from low to high.

EDV<VBAT<VMCV

-

bq2004E/H

BAT

SNS

Negative Temperature
Coefficient Thermister

V

CC

RT1

T

S

RT2

RB1

RB2

PACK+

PACK-

bq2004E/H

SNS

Figure 1. Voltage and Temperature Monitoring

3

PACK +

N
T
C

PACK -

Fg2004a.eps

bq2004E/H

TCOTM2TM1

Timing

Control

MOD

Control

Control

LED1
LED2

DSEL

DCMD

DVEN

OSC

Display
Control

Charge Control

State Machine

Discharge

Control

DIS MOD INH V

Figure 2. Block Diagram

The valid temperature range is V
where:

V

= 0.4 ∗ VCC± 30mV

LTF

= [(1/3 ∗ V

V

HTF

V

is the voltage presented at the TCO input pin, and is

TCO

configured by the user with a resistor divider between V

) + (2/3 ∗ V

LTF

and ground. The allowed range is 0.2 to 0.4 ∗V

If the temperature of the battery is out of range, or the
voltage is too low, the chip enters the charge pending
state and waits for both conditions to fall within their al
lowed limits. During the charge-pending mode, the IC
first applies a top-off charge to the battery.

The top-off charge, at the rate of
continues until the fast-charge conditions are met or the
top-off time-out period is exceeded. The IC then trickle
charges until the fast-charge conditions are met. There
is no time limit on the charge pending state; the charger
remains in this state as long as the voltage or tempera
ture conditons are outside of the allowed limits. If the
voltage is too high, the chip goes to the battery absent
state and waits until a new charge cycle is started.

HTF<VTEMP<VLTF

)] ± 30mV

TCO

.

CC

of the fast charge,

18

CC

TCO

Check

TS

LTF

Check

VTS - V

SNS

- V

SNS

A/D

V

BAT

SNS

EDV

Check

PWR

MCV

Check

BAT

CCVSS

BD200401.eps

Fast charge continues until termination by one or more

,

of the six possible termination conditions:

n

Delta temperature/delta time (∆T/∆t)

n

Peak voltage detection (PVD)

n

Negative delta voltage (-∆V)

n

Maximum voltage

n

Maximum temperature

n

Maximum time

-

PVD and -∆V Termination

The bq2004E/H samples the voltage at the BAT pin once
every 34s. When -∆V termination is selected, if V
lower than any previously measured value by 12mV
±4mV (6mV/cell), fast charge is terminated. When PVD
termination is selected, if V
ously measured value by 6mV ±2mV (3mV/cell), fast

-

charge is terminated. The PVD and -∆V tests are valid
in the range 0.4 ∗ V

CC<VCELL

is lower than any previ

CELL

< 0.8 ∗ V

CC

.

CELL

is

-

4

bq2004E/H

VSEL Input Voltage Termination

Low Disabled

Float

-∆V

High PVD

Voltage Sampling

Each sample is an average of voltage measurements.
The IC takes 32 measurements in PVD mode and 16
measurements in -∆V mode. The resulting sample peri
ods (9.17ms and 18.18ms, respectively) filter out har
monics centered around 55Hz and 109Hz. This tech
nique minimizes the effect of any AC line ripple that
may feed through the power supply from either 50Hz or
60Hz AC sources. Tolerance on all timing is ±16%.

Temperature and Voltage Termination
Hold-off

A hold-off period occurs at the start of fast charging.
During the hold-off period, -∆V and ∆T/∆t termination
are disabled. The MOD pin is enabled at a duty cycle of
260µs active for every 1820µs inactive. This modulation
results in an average rate 1/8th that of the fast charge
rate. This avoids premature termination on the voltage
spikes sometimes produced by older batteries when
fast-charge current is first applied. Maximum voltage
and maximum temperature terminations are not af­fected by the hold-off period.

∆T/∆t Termination

The bq2004E/H samples at the voltage at the TS pin
every 34s, and compares it to the value measured two
samples earlier. If V

has fallen 16mV ±4mV or

TEMP

more, fast charge is terminated. The ∆T/∆t termination
test is valid only when V

TCO<VTEMP<VLTF

.

Temperature Sampling

Each sample is an average of 16 voltage measurements.

-

The resulting sample period (18.18ms) filters out har

-

monics around 55Hz. This technique minimizes the ef

-

fect of any AC line ripple that may feed through the
power supply from either 50Hz or 60Hz AC sources. Tol
erance on all timing is ±16%.

Maximum Voltage,Temperature, and Time

Anytime V
rent flow into the battery ceases immediately. If V
then falls back below V
chip transitions to the Charge Complete state (maximum
voltage termination). If V
expiration of t
tery Absent state (battery removal). See Figure 3.

Maximum temperature termination occurs anytime
V

TEMP

V

. Charge will also be terminated if V

TCO

above the low temperature fault threshold, V
fast charge begins.

rises above V

CELL

MCV

the bq2004E/H transitions to the Bat-

MCV,

the LEDs go off and cur

MCV,

before t

MCV

remains above V

CELL

= 1.5s ±0.5s, the

MCV

falls below the temperature cutoff threshold

TEMP

LTF

-

-

-

-

CELL

at the

rises

, after

Table 1. Fast Charge Safety Time/Hold-Off/Top-Off Table

Typical

Corresponding

Fast-Charge

Rate

2004E 2004H 2004E 2004H 2004E 2004H 2004E 2004H 2004E 2004H

TM1 TM2

Fast-Charge

Safety

Time (min)

C/4 C/8 Low Low 325 650 137 273 Disabled Disabled Disabled

C/2 C/4 Float Low 154 325 546 546 Disabled C/512 15 30

1C C/2 High Low 77 154 273 546 Disabled C/512 7.5 15

2C 1C Low Float 39 77 137 273 Disabled C/512 3.75 7.5

4C 2C Float Float 19 39 68 137 Disabled C/512 1.88 3.75

C/2 C/4 High Float 154 325 546 546 C/16 C/32 C/512 15 30

1C C/2 Low High 77 154 273 546 C/8 C/16 C/512 7.5 15

2C 1C Float High 39 77 137 273 C/4 C/18 C/512 3.75 7.5

4C 2C High High 19 39 68 137 C/2 C/4 C/512 1.88 3.75

Note: Typical conditions = 25°C, VCC= 5.0V.

Typical
PVD, -∆V
Hold-Off
Time (s)

5

Top-Off

Rate

Pulse­Trickle
Rate

Pulse-

Trickle

Period (Hz)

bq2004E/H

Table 2. bq2004E/H LED Output Summary

Mode 1

bq2004E Charge Action State LED

Battery absent Low Low

DSEL = V

Mode 1

bq2004H Charge Action State LED

DSEL = V

Mode 2

bq2004E Charge Action State (See note) LED

DSEL = Floating

Mode 2

bq2004H Charge Action State (See note) LED

DSEL = Floating

Mode 3

bq2004E/H Charge Action State LED

DSEL = V

Fast charge pending or a discharge-before-charge in progress High High

SS

Fast charging Low High

Fast charge complete, top-off, and/or trickle High Low

Battery absent Low Low

Discharge-before-charge in progress High High

Fast charge pending Low

SS

Fast charging Low High

Fast charge complete, top-off, and/or trickle High Low

Battery absent Low Low

Fast charge pending or discharge-before-charge in progress High High

Fast charging Low High

Fast charge complete, top-off, and/or trickle High Low

Battery absent Low Low

Discharge-before-charge in progress High High

Fast charge pending Low

Fast charging Low High

Fast charge complete, top-off, and/or trickle High Low

Battery absent Low Low

Fast charge pending or discharge-before-charge in progress Low

CC

Fast charging Low High

Fast charge complete, top-off, and/or trickle High Low

1

1

1

1

1

LED

LED

1

second high

8

1

second low

8

LED

LED

1

second high

8

1

second low

8

LED

1

second high

8

1

second low

8

2

2

2

2

2

Note: Pulse trickle is inhibited in Mode 2.

6

bq2004E/H

Maximum charge time is configured using the TM pin.
Time settings are available for corresponding charge
rates of C/4, C/2, 1C, and 2C. Maximum time-out termi
nation is enforced on the fast-charge phase, then reset,
and enforced again on the top-off phase, if selected.
There is no time limit on the trickle-charge phase.

Top-off Charge

An optional top-off charge phase may be selected to
follow fast charge termination for the C/2 through 4C
rates. This phase may be necessary on NiMH or other
battery chemistries that have a tendency to terminate
charge prior to reaching full capacity. With top-off en
abled, charging continues at a reduced rate after
fast-charge termination for a period of time equal to

0.235∗ the fast-charge safety time (See Table 1.) Dur
ing top-off, the MOD pin is enabled at a duty cycle of
260µs active for every 1820µs inactive. This modula
tion results in an average rate 1/8th that of the fast
charge rate. Maximum voltage, time, and temperature
are the only termination methods enabled during top­off.

Pulse-Trickle Charge

Pulse-trickle charging may be configured to follow the
fast charge and optional top-off charge phases to com­pensate for self-discharge of the battery while it is idle
in the charger.

In the pulse-trickle mode, MOD is active for 260µsofa
period specified by the settings of TM1 and TM2. See
Table 1. The resulting trickle-charge rate is C/512.
Both pulse trickle and top-off may be disabled by tying
TM1 and TM2 to V
play.

or by selecting Mode 2 in the dis-

SS

Charge Current Control

The bq2004E/H controls charge current through the MOD

-

output pin. The current control circuitry is designed to sup
port implementation of a constant-current switching regulator
or to gate an externally regulated current source.

When used in switch mode configuration, the nominal
regulated current is:

I

= 0.225V/R

REG

Charge current is monitored at the SNS input by the
voltage drop across a sense resistor, R

-

low side of the battery pack and ground. R
provide the desired fast charge current.

If the voltage at the SNS pin is less than V

-

MOD output is switched high to pass charge current to
the battery.

-

When the SNS voltage is greater than V
output is switched low—shutting off charging current to
the battery.

V

= 0.04 ∗ VCC± 25mV

SNSLO

V

= 0.05 ∗ VCC± 25mV

SNSHI

When used to gate an externally regulated current
source, the SNS pin is connected to V
sisitor is required.

SNS

, between the

SNS

SNS

SNSHI

, and no sense re-

SS

SNSLO

, the MOD

-

is sized to

, the

Charge Status Indication

Charge status is indicated by the LED1and LED2out
puts. The state of these outputs in the various charge cy
cle phases is given in Table 2 and illustrated in Figure 3.

In all cases, if V
pin, both LED
less of other conditions. Both can be used to directly

1

drive an LED.

exceeds the voltage at the MCV

CELL

and LED2outputs are held low regard

-

-

-

7

bq2004E/H

New Charge Cycle Started by

Any One of:

Rising to Valid Level

V

CC

Battery Replacement

Falling through V

(V

CELL

Inhibit (INH) Released

V

EDV

MCV

< V

)

CELL

< V

DCMD Tied to Ground?

MCV

Battery Voltage?

No

Yes

V

CELL

< V

EDV

Falling Edge

on DCMD

Discharge-

Before-Charge

Battery Temperature?

V

HTF

Fast

Charge

- V or
T/ t or

V

TEMP

or
Maximum

Top-Off

Selected?

No

< V

V

TEMP

CELL

<

Yes

V

TEMP

V

TEMP

< V

V

>

V

TCO

Time Out

> V

LTF

MCV

< V

Charge
Pending

or

LTF

HTF

Pulse-Trickle

V

CELL

Top-Off and

Charge

V

EDV

and
V

HTF

V
V

< V

V

CELL

< V

< V

CELL
MCV

EDV

V

MCV

CELL

TEMP

>

>

< V

< V

Top-Off
Charge

V

> V

CELL

MCV

LTF

V

CELL

V

MCV

V

TEMP
or 0.235 Maximum
Time Out

MCV

Pulse

Trickle

Charge

<

< V

TCO

t >

V
V

CELL
MCV

V

CELL

t

MCV

>

SD2004EH.eps

> V

Pulse

Trickle

Charge

MCV

Battery
Absent

Pulse
Trickle
Charge

Charge
Complete

Figure 3. Charge Algorithm State Diagram

8

bq2004E/H

Absolute Maximum Ratings

Symbol Parameter Minimum Maximum Unit Notes

V

CC

V

T

T

OPR

T

STG

T

SOLDER

T

BIAS

Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional opera

VCCrelative to V

SS

DC voltage applied on any pin ex
cluding V

relative to V

CC

SS

-

-0.3 +7.0 V

-0.3 +7.0 V

Operating ambient temperature -20 +70 °C Commercial

Storage temperature -55 +125 °C

Soldering temperature - +260 °C 10 sec max.

Temperature under bias -40 +85 °C

tion should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Expo
sure to conditions beyond the operational limits for extended periods of time may affect device reliability.

-

-

DC Thresholds (T

A=TOPR;VCC

±

10%)

Symbol Parameter Rating Tolerance Unit Notes

V

SNSHI

V

SNSLO

V

LTF

V

HTF

V

EDV

V

MCV

V

THERM

-∆V

PVD

High threshold at SNS result­ing in MOD = Low

Low threshold at SNS result­ing in MOD = High

Low-temperature fault

High-temperature fault

End-of-discharge voltage

Maximum cell voltage
TS input change for∆T/∆t

detection
BAT input change for -∆V

detection
BAT input change for PVD

detection

(1/3*V

0.05*V

0.04 * V

0.4*V

) + (2/3*V

LTF

0.4*V

0.8*V

-16

-12

-6

CC

CC

CC

CC

CC

TCO

±0.025

±0.010

±0.030

)

±0.030

±0.030

±0.030

±4

±4

±2

V

V

V

TEMP

V

its/terminates charge

V

TEMP

V

charge
V

CELL<VEDV

V

fast charge
V

CELL>VMCV

V

terminates charge

= 5V, T

V

mV

mV

mV

V

V

CC

CC

CC

= 5V, T

= 5V, T

≥ V

≤ V

LTF

HTF

inhib-

inhibits

inhibits

inhibits/

= 25°C

A

= 25°C

A

= 25°C

A

9

bq2004E/H

Recommended DC Operating Conditions (T

= T

A

OPR)

Symbol Condition Minimum Typical Maximum Unit Notes

V

V

V

V

V

V

Supply voltage 4.5 5.0 5.5 V

CC

Battery input 0 - V

BAT

BAT voltage potential 0 - V

CELL

Thermistor input 0 - V

TS

TS voltage potential 0 - V

TEMP

Temperature cutoff 0.2*V

TCO

CC

- 0.4*V

CC

CC

CC

CC

V

VV

V

VVTS- V

V Valid∆T/∆t range

CC

BAT

- V

SNS

SNS

Logic input high 2.0 - - V DCMD, INH

V

IH

Logic input high VCC- 0.3 - - V TM1, TM2, DSEL, VSEL

Logic input low - - 0.8 V DCMD, INH

V

IL

Logic input low - - 0.3 V TM1, TM2, DSEL, VSEL

V

V

I

CC

I

SB

I

OH

I

OL

Logic output high

OH

Logic output low - - 0.8 V

OL

Supply current - 1 3 mA Outputs unloaded

Standby current - - 1

DIS, LED1, LED2, MOD source -1 0 - - m A @VOH= VCC- 0.8V

DIS, LED1, LED2, MOD sink 10 - - mA @VOL= VSS+ 0.8V

Input leakage - -

I

L

V

CC

- 0.8

--V

1

±

Input leakage 50 - 400

I

IL

I

IH

I

IZ

Logic input low source - - 70

Logic input high source -70 - -

Tri-state -2 - 2

DIS, MOD, LED

-10mA

I

≤

OH

DIS, MOD, LED

I

10mA

≤

OL

A INH = V

µ

A INH, BAT, V = VSSto V

µ

A DCMD, V = VSSto V

µ

TM

A

µ

V = V

TM

A

µ

V = V

TM

A

µ

should be left disconnected

IL

, TM2, DSEL, VSEL,

1

to VSS+ 0.3V

SS

, TM2, DSEL, VSEL,

1

- 0.3V to V

CC

,TM2, DSEL, and VSEL

1

(floating) for Z logic input state

, LED2,

1

, LED2,

1

CC

CC

CC

Note: All voltages relative to VSSexcept as noted.

10

bq2004E/H

Impedance

Symbol Parameter Minimum Typical Maximum Unit

R

BAT

R

TS

R

TCO

R

SNS

Battery input impedance 50 - - M

TS input impedance 50 - - M

TCO input impedance 50 - - M

SNS input impedance 50 - - M

Ω
Ω
Ω
Ω

Timing (T

= 0 to +70°C; V

A

CC

10%)

±

Symbol Parameter Minimum Typical Maximum Unit Notes

t

d

f

REG

t

PW

FCV

MCV

Pulse width for DCMD
and INH pulse command

1- -

Time base variation -16 - 16 % VCC= 4.75V to 5.25V

MOD output regulation
frequency

Maximum voltage termi­nation time limit

- - 300 kHz

1- 2s

Pulse start for charge or discharge

s

µ

before charge

Time limit to distinguish battery re­moved from charge complete.

Note: Typical is at TA= 25°C, VCC= 5.0V.

11

bq2004E/H

16-Pin DIP Narrow (PN)

16-Pin PN(0.300" DIP

Inches Millimeters

Dimension

A 0.160 0.180 4.06 4.57

A1 0.015 0.040 0.38 1.02

B 0.015 0.022 0.38 0.56

B1 0.055 0.065 1.40 1.65

C 0.008 0.013 0.20 0.33

D 0.740 0.770 18.80 19.56

E 0.300 0.325 7.62 8.26

E1 0.230 0.280 5.84 7.11

e 0.300 0.370 7.62 9.40

G 0.090 0.110 2.29 2.79

L 0.115 0.150 2.92 3.81

S 0.020 0.040 0.51 1.02

Min. Max. Min. Max.

)

12

16-Pin SOIC Narrow (SN)

bq2004E/H

16-Pin SN(0.150" SOIC

Inches Millimeters

D

e

B

E

H

C

A

A1

Dimension

A 0.060 0.070 1.52 1.78

A1 0.004 0.010 0.10 0.25

B 0.013 0.020 0.33 0.51

C 0.007 0.010 0.18 0.25

D 0.385 0.400 9.78 10.16

E 0.150 0.160 3.81 4.06

e 0.045 0.055 1.14 1.40

H 0.225 0.245 5.72 6.22

L 0.015 0.035 0.38 0.89

Min. Max. Min. Max.

)

.004

L

13

bq2004E/H

Data Sheet Revision History

Change No. Page No. Description Nature of Change

1 All Combined bq2004E and bq2004H, revised and

expanded format of this data sheet

2 7 Separated bq2004E and bq2004H in Table 2, LED

Output Summary

3 5 Description of charge-pending state Clarification

4

Clarification

Clarification

Note: Change 1 = Oct. 1997 B changes from Sept. 1996 (bq2004E), Feb. 1997 (bq2004H).

Change 2 = Feb. 1998 C changes from Oct. 1997 B.
Change 3 = Dec. 1998 D changes from Feb. 1998 C.
Change 4 = June 1999 E changes from Dec. 1998 D.

14

Ordering Information

bq2004

bq2004E/H

Package Option:

PN = 16-pin narrow plastic DIP
SN = 16-pin narrow SOIC

Device:

E = bq2004E Fast-Charge IC
H= bq2004H Fast-Charge IC

15

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