UNITRODE bq2004 Technical data

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bq2004

Fast-Charge IC

Features

Fast charge and conditioning of

➤

nickel cadmium or nickel-metal
hydride batteries

Hysteretic PWM switch-mode

➤

current regulation or gated con
trol of an external regulator

Easily integrated into systems or

➤

used as a stand-alone charger

Pre-charge qualification of tem

➤

perature and voltage

Configurable, direct LED outputs

➤

display battery and charge status

Fast-charge termination by ∆ tem

➤

perature/∆ time, peak volume de
tection, -∆V, maximum voltage,
maximum temperature, and maxi­mum time

➤ Optional top-off charge and

pulsed current maintenance
charging

➤ Logic-level controlled low-power

mode (< 5µA standby current)

General Description

The bq2004 Fast Charge IC provides
comprehensive fast charge control
functions together with high-speed
switching power control circuitry on a
monolithic CMOS device.

­Integration of closed-loop current
control circuitry allows the bq2004
to be the basis of a cost-effective so
lution for stand-alone and system­integrated chargers for batteries of

­one or more cells.

Switch-activated discharge-before­charge allows bq2004-based chargers
to support battery conditioning and
capacity determination.

-

­High-efficiency power conversion is

accomplished using the bq2004 as a
hysteretic PWM controller for
switch-mode regulation of the charg­ing current. The bq2004 may alterna­tively be used to gate an externally
regulated charging current.

Fast charge may begin on application
of the charging supply, replacement

of the battery, or switch depression.
For safety, fast charge is inhibited
unless/until the battery tempera
ture and voltage are within config
ured limits.

Temperature, voltage, and time are
monitored throughout fast charge.
Fast charge is terminated by any of
the following:

-

Rate of temperature time

n

(∆T/∆t)

Peak voltage detection (PVD)

n

Negative delta voltage (-∆V)

n

Maximum voltage

n

Maximum temperature

n

Maximum time

n

After fast charge, optional top-off
and pulsed current maintenance
phases are available.

-

-

Pin Connections

DCMD

DSEL

VSEL

TM

1

TM

2

TCO

TS

BAT

16-Pin Narrow DIP

SLUS063–JUNE 1999 F

16

1

2

15

3

14

4

13

5

12

6

11

7

10

8

or Narrow SOIC

PN2004E01.eps

9

INH

DIS

MOD

VCC

V

SS

LED

LED

SNS

Pin Names

DCMD Discharge command

DSEL Display select

VSEL Voltage termination

select

TM

TM

2

1

TCO Temperature cutoff

TS Temperature sense

Timer mode select 1

1

Timer mode select 2

2

BAT Battery voltage

1

SNS Sense resistor input

LED

LED

V

SS

V

CC

Charge status output 1

1

Charge status output 2

2

System ground

5.0V±10% power

MOD Charge current control

DIS Discharge control

output

INH

Charge inhibit input

bq2004

Pin Descriptions

DCMD

DSEL

VSEL

TM
TM

TCO

TS

BAT

Discharge-before-charge control input

The DCMD
that enable discharge-before-charge. DCMD
is pulled up internally. A negative-going
pulse on DCMD
of-discharge voltage (EDV) on the BAT pin,
followed by a new charge cycle start. Tying
DCMD

to ground enables automatic
discharge-before-charge on every new charge
cycle start.

Display select input

This three-state input configures the charge
status display mode of the LED
outputs. See Table 2.

Voltage termination select input

This three-state input controls the voltage­termination technique used by the bq2004.
When high, PVD is active. When floating,

-∆V is used. When pulled low, both PVD and

-∆V are disabled.

Timer mode inputs

–

1

2

and TM2are three-state inputs that

TM

1

configure the fast charge safety timer, voltage
termination hold-off time, “top-off ”, and
trickle charge control. See Table 1.

Temperature cut-off threshold input

Input to set maximum allowable battery
temperature. If the potential between TS
and SNS is less than the voltage at the TCO
input, then fast charge or top-off charge is ter
minated.

Temperature sense input

Input, referenced to SNS, for an external
thermister monitoring battery temperature.

Battery voltage input

BAT is the battery voltage sense input, refer
enced to SNS. This is created by a high­impedance resistor-divider network con
nected between the positive and the negative
terminals of the battery.

input controls the conditions

initiates a discharge to end-

and LED

1

SNS

Charging current sense input

SNS controls the switching of MOD based on
an external sense resistor in the current
path of the battery. SNS is the reference po

­tential for both the TS and BAT pins. If
SNS is connected to V

, then MOD switches

SS

high at the beginning of charge and low at
the end of charge.

LED
LED

Charge status outputs

–

1

2

Push-pull outputs indicating charging
status. See Table 2.

V

SS

V

CC

2

Ground

VCCsupply input

5.0V, ±10% power input.

MOD

Charge current control output

MOD is a push-pull output that is used to
control the charging current to the battery.
MOD switches high to enable charging cur­rent to flow and low to inhibit charging
current flow.

DIS

Discharge control output

Push-pull output used to control an external
transistor to discharge the battery before
charging.

INH

Charge inhibit input

When low, the bq2004 suspends all charge
actions, drives all outputs to high imped

­ance, and assumes a low-power operational
state. When transitioning from low to high, a

-

new charge cycle is started.

-

-

2

bq2004

Functional Description

Figure 3 shows a block diagram and Figure 4 shows a
state diagram of the bq2004.

Battery Voltage and Temperature
Measurements

Battery voltage and temperature are monitored for
maximum allowable values. The voltage presented on
the battery sense input, BAT, should represent a
two-cell potential for the battery under charge. A
resistor-divider ratio of:

RB1

N

=

and

- 1

2

and VSS. See

CC

RB2

is recommended to maintain the battery voltage within
the valid range, where N is the number of cells, RB1 is
the resistor connected to the positive battery terminal,
and RB2 is the resistor connected to the negative bat
tery terminal. See Figure 1.

Note: This resistor-divider network input impedance to
end-to-end should be at least 200kΩ and less than 1MΩ.

A ground-referenced negative temperature coefficient ther­mistor placed in proximity to the battery may be used as a
low-cost temperature-to-voltage transducer. The tempera­ture sense voltage input at TS is developed using a
resistor-thermistor network between V
Figure 1. Both the BAT and TS inputs are referenced to
SNS, so the signals used inside the IC are:

V

BAT-VSNS=VCELL

V

TS-VSNS=VTEMP

Discharge-Before-Charge

The DCMD input is used to command discharge-before­charge via the DIS output. Once activated, DIS becomes
active (high) until V

falls below V

CELL

at which time

EDV,

DIS goes low and a new fast charge cycle begins.

The DCMD

input is internally pulled up to VCC(its inac
tive state). Leaving the input unconnected, therefore,
results in disabling discharge-before-charge. A negative
going pulse on DCMD

initiates discharge-before-charge
at any time regardless of the current state of the
bq2004. If DCMD

is tied to VSS, discharge-before-charge

will be the first step in all newly started charge cycles.

Starting a Charge Cycle

A new charge cycle (see Figure 2) is started by:

1. V

-

2. V

3. A transition on the INH

If DCMD
cuted as the first step of the new charge cycle. Other­wise, pre-charge qualification testing is the first step.

The battery must be within the configured temperature
and voltage limits before fast charging begins.

The valid battery voltage range is V
where:

The valid temperature range is V
where:

rising above 4.5V

CC

falling through the maximum cell voltage,

CELL

V

where:

MCV

= 0.8 ∗ VCC± 30mV

V

MCV

input from low to high.

is tied low, a discharge-before-charge is exe-

EDV<VBAT<VMCV

= 0.4 ∗ VCC± 30mV

V

EDV

HTF<VTEMP<VLTF

-

,

Negative Temperature
Coefficient Thermister

V

CC

SNS

RT1

T

S

RT2

bq2004

BAT

SNS

RB1

RB2

PACK+

bq2004

PACK-

Figure 1. Voltage and Temperature Monitoring

3

PACK +

N
T
C

PACK -

Fg2004a.eps

bq2004

Dis-

charge

(Optional)

Charge

Pending*

(Pulse-Trickle)

DIS

Switch-mode

MOD

Configuration

or

External
Regulation

MOD

(

SNS Grounded)

Mode 1, LED2 Status Output

Mode 1, LED1 Status Output

Mode 2, LED2 Status Output

Mode 2, LED1 Status Output

Fast Charging

Top-Off

(Optional)

2080 s

2080 s

260 s

260 s

Pulse-Trickle

260 s

Note*

260 s

Note*

Mode 3, LED2 Status Output

Mode 3, LED1 Status Output

Battery within temperature/voltage limits.

Battery discharged to 0.4 * V
temperature/voltage limits.

Discharge-Before-Charge started

*See Table 3 for pulse-trickle period.

Figure 2. Charge Cycle Phases

Battery outside

CC.

TD200401a.eps

4

V

= 0.4 ∗ VCC± 30mV

LTF

V

HTF

= [(1/4 ∗ V

) + (3/4 ∗ V

LTF

)] ± 30mV

TCO

Note: The low temperature fault (LTF) threshold is not
enforced if the IC is configured for PVD termination
(VSEL = high).

V

is the voltage presented at the TCO input pin, and is

TCO

configured by the user with a resistor divider between V

CC

and ground. The allowed range is 0.2 to 0.4 ∗ VCC.

If the temperature of the battery is out of range, or the
voltage is too low, the chip enters the charge pending
state and waits for both conditions to fall within their al
lowed limits. The MOD output is modulated to provide
the configured trickle charge rate in the charge pending
state. There is no time limit on the charge pending
state; the charger remains in this state as long as the
voltage or temperature conditons are outside of the al
lowed limits. If the voltage is too high, the chip goes to
the battery absent state and waits until a new charge
cycle is started.

Fast charge continues until termination by one or more
of the six possible termination conditions:

Delta temperature/delta time (∆T/∆t)

n

Peak voltage detection (PVD)

n

n

Negative delta voltage (-∆V)

n

Maximum voltage

n

Maximum temperature

n

Maximum time

PVD and -∆V Termination

The bq2004 samples the voltage at the BAT pin once
every 34s. When -∆V termination is selected, if V

CELL

lower than any previously measured value by 12mV
±4mV (6mV/cell), fast charge is terminated. When PVD
termination is selected, if V

is lower than any previ

CELL

ously measured value by 6mV ±2mV (3mV/cell), fast
charge is terminated. The PVD and -∆V tests are valid
in the range 0.4 ∗ V

CC<VCELL

< 0.8 ∗ VCC.

VSEL Input Voltage Termination

Low Disabled

Float

-∆V

High PVD

Voltage Sampling

Each sample is an average of voltage measurements
taken 57µs apart. The IC takes 32 measurements in
PVD mode and 16 measurements in -∆V mode. The re

bq2004

sulting sample periods (9.17ms and 18.18ms, respec
tively) filter out harmonics centered around 55Hz and
109Hz. This technique minimizes the effect of any AC
line ripple that may feed through the power supply from
either 50Hz or 60Hz AC sources. Tolerance on all tim
ing is ±16%.

Voltage Termination Hold-off

A hold-off period occurs at the start of fast charging.
During the hold-off period, -∆V termination is disabled.
This avoids premature termination on the voltage
spikes sometimes produced by older batteries when

-

fast-charge current is first applied. ∆T/∆t, maximum
voltage and maximum temperature terminations are
not affected by the hold-off period.

∆T/∆t Termination

-

The bq2004 samples at the voltage at the TS pin every
34s, and compares it to the value measured two samples
earlier. If V
charge is terminated. If VSEL = high, the ∆T/∆t termi
nation test is valid only when V

0.2 ∗ V

. Otherwise the ∆T/∆t termination test is valid

CC

only when V

Temperature Sampling

Each sample is an average of 16 voltage measurements
taken 57µ s apart. The resulting sample period
(18.18ms) filters out harmonics around 55Hz. This tech­nique minimizes the effect of any AC line ripple that
may feed through the power supply from either 50Hz or
60Hz AC sources. Tolerance on all timing is ±16%.

Maximum Voltage, Temperature, and Time

Anytime V
charging ceases immediately. If V

is

low V
the Charge Complete state (maximum voltage termina
tion). If V

-

t

MCV,

(battery removal). See Figure 4.

Maximum temperature termination occurs anytime
V

TEMP

V

TCO

high), charge will also be terminated if V
above the low temperature fault threshold, V
fast charge begins. The V
when the IC is configured for PVD termination.

Maximum charge time is configured using the TM pin.
Time settings are available for corresponding charge
rates of C/4, C/2, 1C, and 2C. Maximum time-out termi
nation is enforced on the fast-charge phase, then reset,
and enforced again on the top-off phase, if selected.
There is no time limit on the trickle-charge phase.

-

before t

MCV

CELL

the bq2004 transitions to the Battery Absent state

falls below the temperature cutoff threshold

. Unless PVD termination is enabled (VSEL =

has fallen 16mV ±4mV or more, fast

TEMP

TCO<VTEMP<VTCO

TCO<VTEMP<VLTF

rises above V

CELL

= 1.5s ±0.5s, the chip transitions to

MCV

remains above V

.

the LEDs go off and

MCV,

LTF

then falls back be

CELL

at the expiration of

MCV

threshold is not enforced

TEMP

LTF

-

-

-

+

-

-

rises

, after

-

5