UNITRODE bq2004 Technical data

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bq2004

Fast-Charge IC

Features

Fast charge and conditioning of

➤

nickel cadmium or nickel-metal
hydride batteries

Hysteretic PWM switch-mode

➤

current regulation or gated con
trol of an external regulator

Easily integrated into systems or

➤

used as a stand-alone charger

Pre-charge qualification of tem

➤

perature and voltage

Configurable, direct LED outputs

➤

display battery and charge status

Fast-charge termination by ∆ tem

➤

perature/∆ time, peak volume de
tection, -∆V, maximum voltage,
maximum temperature, and maxi­mum time

➤ Optional top-off charge and

pulsed current maintenance
charging

➤ Logic-level controlled low-power

mode (< 5µA standby current)

General Description

The bq2004 Fast Charge IC provides
comprehensive fast charge control
functions together with high-speed
switching power control circuitry on a
monolithic CMOS device.

­Integration of closed-loop current
control circuitry allows the bq2004
to be the basis of a cost-effective so
lution for stand-alone and system­integrated chargers for batteries of

­one or more cells.

Switch-activated discharge-before­charge allows bq2004-based chargers
to support battery conditioning and
capacity determination.

-

­High-efficiency power conversion is

accomplished using the bq2004 as a
hysteretic PWM controller for
switch-mode regulation of the charg­ing current. The bq2004 may alterna­tively be used to gate an externally
regulated charging current.

Fast charge may begin on application
of the charging supply, replacement

of the battery, or switch depression.
For safety, fast charge is inhibited
unless/until the battery tempera
ture and voltage are within config
ured limits.

Temperature, voltage, and time are
monitored throughout fast charge.
Fast charge is terminated by any of
the following:

-

Rate of temperature time

n

(∆T/∆t)

Peak voltage detection (PVD)

n

Negative delta voltage (-∆V)

n

Maximum voltage

n

Maximum temperature

n

Maximum time

n

After fast charge, optional top-off
and pulsed current maintenance
phases are available.

-

-

Pin Connections

DCMD

DSEL

VSEL

TM

1

TM

2

TCO

TS

BAT

16-Pin Narrow DIP

SLUS063–JUNE 1999 F

16

1

2

15

3

14

4

13

5

12

6

11

7

10

8

or Narrow SOIC

PN2004E01.eps

9

INH

DIS

MOD

VCC

V

SS

LED

LED

SNS

Pin Names

DCMD Discharge command

DSEL Display select

VSEL Voltage termination

select

TM

TM

2

1

TCO Temperature cutoff

TS Temperature sense

Timer mode select 1

1

Timer mode select 2

2

BAT Battery voltage

1

SNS Sense resistor input

LED

LED

V

SS

V

CC

Charge status output 1

1

Charge status output 2

2

System ground

5.0V±10% power

MOD Charge current control

DIS Discharge control

output

INH

Charge inhibit input

bq2004

Pin Descriptions

DCMD

DSEL

VSEL

TM
TM

TCO

TS

BAT

Discharge-before-charge control input

The DCMD
that enable discharge-before-charge. DCMD
is pulled up internally. A negative-going
pulse on DCMD
of-discharge voltage (EDV) on the BAT pin,
followed by a new charge cycle start. Tying
DCMD

to ground enables automatic
discharge-before-charge on every new charge
cycle start.

Display select input

This three-state input configures the charge
status display mode of the LED
outputs. See Table 2.

Voltage termination select input

This three-state input controls the voltage­termination technique used by the bq2004.
When high, PVD is active. When floating,

-∆V is used. When pulled low, both PVD and

-∆V are disabled.

Timer mode inputs

–

1

2

and TM2are three-state inputs that

TM

1

configure the fast charge safety timer, voltage
termination hold-off time, “top-off ”, and
trickle charge control. See Table 1.

Temperature cut-off threshold input

Input to set maximum allowable battery
temperature. If the potential between TS
and SNS is less than the voltage at the TCO
input, then fast charge or top-off charge is ter
minated.

Temperature sense input

Input, referenced to SNS, for an external
thermister monitoring battery temperature.

Battery voltage input

BAT is the battery voltage sense input, refer
enced to SNS. This is created by a high­impedance resistor-divider network con
nected between the positive and the negative
terminals of the battery.

input controls the conditions

initiates a discharge to end-

and LED

1

SNS

Charging current sense input

SNS controls the switching of MOD based on
an external sense resistor in the current
path of the battery. SNS is the reference po

­tential for both the TS and BAT pins. If
SNS is connected to V

, then MOD switches

SS

high at the beginning of charge and low at
the end of charge.

LED
LED

Charge status outputs

–

1

2

Push-pull outputs indicating charging
status. See Table 2.

V

SS

V

CC

2

Ground

VCCsupply input

5.0V, ±10% power input.

MOD

Charge current control output

MOD is a push-pull output that is used to
control the charging current to the battery.
MOD switches high to enable charging cur­rent to flow and low to inhibit charging
current flow.

DIS

Discharge control output

Push-pull output used to control an external
transistor to discharge the battery before
charging.

INH

Charge inhibit input

When low, the bq2004 suspends all charge
actions, drives all outputs to high imped

­ance, and assumes a low-power operational
state. When transitioning from low to high, a

-

new charge cycle is started.

-

-

2

bq2004

Functional Description

Figure 3 shows a block diagram and Figure 4 shows a
state diagram of the bq2004.

Battery Voltage and Temperature
Measurements

Battery voltage and temperature are monitored for
maximum allowable values. The voltage presented on
the battery sense input, BAT, should represent a
two-cell potential for the battery under charge. A
resistor-divider ratio of:

RB1

N

=

and

- 1

2

and VSS. See

CC

RB2

is recommended to maintain the battery voltage within
the valid range, where N is the number of cells, RB1 is
the resistor connected to the positive battery terminal,
and RB2 is the resistor connected to the negative bat
tery terminal. See Figure 1.

Note: This resistor-divider network input impedance to
end-to-end should be at least 200kΩ and less than 1MΩ.

A ground-referenced negative temperature coefficient ther­mistor placed in proximity to the battery may be used as a
low-cost temperature-to-voltage transducer. The tempera­ture sense voltage input at TS is developed using a
resistor-thermistor network between V
Figure 1. Both the BAT and TS inputs are referenced to
SNS, so the signals used inside the IC are:

V

BAT-VSNS=VCELL

V

TS-VSNS=VTEMP

Discharge-Before-Charge

The DCMD input is used to command discharge-before­charge via the DIS output. Once activated, DIS becomes
active (high) until V

falls below V

CELL

at which time

EDV,

DIS goes low and a new fast charge cycle begins.

The DCMD

input is internally pulled up to VCC(its inac
tive state). Leaving the input unconnected, therefore,
results in disabling discharge-before-charge. A negative
going pulse on DCMD

initiates discharge-before-charge
at any time regardless of the current state of the
bq2004. If DCMD

is tied to VSS, discharge-before-charge

will be the first step in all newly started charge cycles.

Starting a Charge Cycle

A new charge cycle (see Figure 2) is started by:

1. V

-

2. V

3. A transition on the INH

If DCMD
cuted as the first step of the new charge cycle. Other­wise, pre-charge qualification testing is the first step.

The battery must be within the configured temperature
and voltage limits before fast charging begins.

The valid battery voltage range is V
where:

The valid temperature range is V
where:

rising above 4.5V

CC

falling through the maximum cell voltage,

CELL

V

where:

MCV

= 0.8 ∗ VCC± 30mV

V

MCV

input from low to high.

is tied low, a discharge-before-charge is exe-

EDV<VBAT<VMCV

= 0.4 ∗ VCC± 30mV

V

EDV

HTF<VTEMP<VLTF

-

,

Negative Temperature
Coefficient Thermister

V

CC

SNS

RT1

T

S

RT2

bq2004

BAT

SNS

RB1

RB2

PACK+

bq2004

PACK-

Figure 1. Voltage and Temperature Monitoring

3

PACK +

N
T
C

PACK -

Fg2004a.eps

bq2004

Dis-

charge

(Optional)

Charge

Pending*

(Pulse-Trickle)

DIS

Switch-mode

MOD

Configuration

or

External
Regulation

MOD

(

SNS Grounded)

Mode 1, LED2 Status Output

Mode 1, LED1 Status Output

Mode 2, LED2 Status Output

Mode 2, LED1 Status Output

Fast Charging

Top-Off

(Optional)

2080 s

2080 s

260 s

260 s

Pulse-Trickle

260 s

Note*

260 s

Note*

Mode 3, LED2 Status Output

Mode 3, LED1 Status Output

Battery within temperature/voltage limits.

Battery discharged to 0.4 * V
temperature/voltage limits.

Discharge-Before-Charge started

*See Table 3 for pulse-trickle period.

Figure 2. Charge Cycle Phases

Battery outside

CC.

TD200401a.eps

4

V

= 0.4 ∗ VCC± 30mV

LTF

V

HTF

= [(1/4 ∗ V

) + (3/4 ∗ V

LTF

)] ± 30mV

TCO

Note: The low temperature fault (LTF) threshold is not
enforced if the IC is configured for PVD termination
(VSEL = high).

V

is the voltage presented at the TCO input pin, and is

TCO

configured by the user with a resistor divider between V

CC

and ground. The allowed range is 0.2 to 0.4 ∗ VCC.

If the temperature of the battery is out of range, or the
voltage is too low, the chip enters the charge pending
state and waits for both conditions to fall within their al
lowed limits. The MOD output is modulated to provide
the configured trickle charge rate in the charge pending
state. There is no time limit on the charge pending
state; the charger remains in this state as long as the
voltage or temperature conditons are outside of the al
lowed limits. If the voltage is too high, the chip goes to
the battery absent state and waits until a new charge
cycle is started.

Fast charge continues until termination by one or more
of the six possible termination conditions:

Delta temperature/delta time (∆T/∆t)

n

Peak voltage detection (PVD)

n

n

Negative delta voltage (-∆V)

n

Maximum voltage

n

Maximum temperature

n

Maximum time

PVD and -∆V Termination

The bq2004 samples the voltage at the BAT pin once
every 34s. When -∆V termination is selected, if V

CELL

lower than any previously measured value by 12mV
±4mV (6mV/cell), fast charge is terminated. When PVD
termination is selected, if V

is lower than any previ

CELL

ously measured value by 6mV ±2mV (3mV/cell), fast
charge is terminated. The PVD and -∆V tests are valid
in the range 0.4 ∗ V

CC<VCELL

< 0.8 ∗ VCC.

VSEL Input Voltage Termination

Low Disabled

Float

-∆V

High PVD

Voltage Sampling

Each sample is an average of voltage measurements
taken 57µs apart. The IC takes 32 measurements in
PVD mode and 16 measurements in -∆V mode. The re

bq2004

sulting sample periods (9.17ms and 18.18ms, respec
tively) filter out harmonics centered around 55Hz and
109Hz. This technique minimizes the effect of any AC
line ripple that may feed through the power supply from
either 50Hz or 60Hz AC sources. Tolerance on all tim
ing is ±16%.

Voltage Termination Hold-off

A hold-off period occurs at the start of fast charging.
During the hold-off period, -∆V termination is disabled.
This avoids premature termination on the voltage
spikes sometimes produced by older batteries when

-

fast-charge current is first applied. ∆T/∆t, maximum
voltage and maximum temperature terminations are
not affected by the hold-off period.

∆T/∆t Termination

-

The bq2004 samples at the voltage at the TS pin every
34s, and compares it to the value measured two samples
earlier. If V
charge is terminated. If VSEL = high, the ∆T/∆t termi
nation test is valid only when V

0.2 ∗ V

. Otherwise the ∆T/∆t termination test is valid

CC

only when V

Temperature Sampling

Each sample is an average of 16 voltage measurements
taken 57µ s apart. The resulting sample period
(18.18ms) filters out harmonics around 55Hz. This tech­nique minimizes the effect of any AC line ripple that
may feed through the power supply from either 50Hz or
60Hz AC sources. Tolerance on all timing is ±16%.

Maximum Voltage, Temperature, and Time

Anytime V
charging ceases immediately. If V

is

low V
the Charge Complete state (maximum voltage termina
tion). If V

-

t

MCV,

(battery removal). See Figure 4.

Maximum temperature termination occurs anytime
V

TEMP

V

TCO

high), charge will also be terminated if V
above the low temperature fault threshold, V
fast charge begins. The V
when the IC is configured for PVD termination.

Maximum charge time is configured using the TM pin.
Time settings are available for corresponding charge
rates of C/4, C/2, 1C, and 2C. Maximum time-out termi
nation is enforced on the fast-charge phase, then reset,
and enforced again on the top-off phase, if selected.
There is no time limit on the trickle-charge phase.

-

before t

MCV

CELL

the bq2004 transitions to the Battery Absent state

falls below the temperature cutoff threshold

. Unless PVD termination is enabled (VSEL =

has fallen 16mV ±4mV or more, fast

TEMP

TCO<VTEMP<VTCO

TCO<VTEMP<VLTF

rises above V

CELL

= 1.5s ±0.5s, the chip transitions to

MCV

remains above V

.

the LEDs go off and

MCV,

LTF

then falls back be

CELL

at the expiration of

MCV

threshold is not enforced

TEMP

LTF

-

-

-

+

-

-

rises

, after

-

5

bq2004

Top-off Charge

An optional top-off charge phase may be selected to
follow fast charge termination for the C/2 through 4C
rates. This phase may be necessary on NiMH or other
battery chemistries that have a tendency to terminate
charge prior to reaching full capacity. With top-off en
abled, charging continues at a reduced rate after
fast-charge termination for a period of time equal to
the fast-charge safety time (See Table 1.) During top­off, the MOD pin is enabled at a duty cycle of 260µsac
tive for every 1820µs inactive. This modulation results
in an average rate 1/8th that of the fast charge rate.
Maximum voltage, time, and temperature are the only
termination methods enabled during top-off.

Pulse-Trickle Charge

Pulse-trickle charging follows the fast charge and op
tional top-off charge phases to compensate for self­discharge of the battery while it is idle in the charger.
The configured pulse-trickle rate is also applied in the
charge pending state to raise the voltage of an over­discharged battery up to the minimum required before
fast charge can begin.

In the pulse-trickle mode, MOD is active for 260µsofa
period specified by the settings of TM1 and TM2. See
Table 1. The resulting trickle-charge rate is C/64 when
top-off is enabled and C/32 when top-off is disabled.
Both pulse trickle and top-off may be disabled by tying
TM1 and TM2 to V

.

SS

Charge Status Indication

Charge status is indicated by the LED1and LED2out
puts. The state of these outputs in the various charge cy
cle phases is given in Table 2 and illustrated in Figure 2.

In all cases, if V

­pin, both LED

less of other conditions. Both can be used to directly
drive an LED.

-

Charge Current Control

The bq2004 controls charge current through the MOD
output pin. The current control circuitry is designed to
support implementation of a constant-current switching
regulator or to gate an externally regulated current
source.

-

When used in switch mode configuration, the nominal
regulated current is:

Charge current is monitored at the SNS input by the
voltage drop across a sense resistor, R
low side of the battery pack and ground. R
provide the desired fast charge current.

If the voltage at the SNS pin is less than V
MOD output is switched high to pass charge current to
the battery.

1

exceeds the voltage at the MCV

CELL

and LED2outputs are held low regard

I

= 0.225V/R

REG

SNS

, between the

SNS

SNS

is sized to

, the

SNSLO

-

-

-

Table 1. Fast-Charge Safety Time/Hold-Off/Top-Off Table

Corresponding

Fast-Charge

Rate TM1 TM2

C/4 Low Low 360 137 Disabled Disabled Disabled

C/2 Float Low 180 820 Disabled C/32 240

1C High Low 90 410 Disabled C/32 120

2C Low Float 45 200 Disabled C/32 60

4C Float Float 23 100 Disabled C/32 30

C/2 High Float 180 820 C/16 C/64 120

1C Low High 90 410 C/8 C/64 60

2C Float High 45 200 C/4 C/64 30

4C High High 23 100 C/2 C/64 15

Note: Typical conditions = 25°C, VCC= 5.0V.

Typical

Fast-Charge Safety

Time (minutes)

Typical

PVD, -∆V Hold-Off

Time (seconds)

Top-Off

Rate

6

Pulse-

Trickle

Rate

Pulse-

Trickle

Period (Hz)

bq2004

When the SNS voltage is greater than V

SNSHI

, the MOD
output is switched low—shutting off charging current to
the battery.

V

= 0.04 ∗ VCC± 25mV

SNSLO

= 0.05 ∗ VCC± 25mV

V

SNSHI

Table 2. bq2004 LED Status Display Options

Mode 1 Charge Status LED

Battery absent Low Low

DSEL = V

SS

Mode 2 Charge Status LED

DSEL = Floating

Mode 3 Charge Status LED

DSEL = V

CC

Fast charge pending or discharge-before-charge in progress High High
Fast charge in progress Low High
Charge complete, top-off, and/or trickle High Low

Battery absent, fast charge in progress or complete Low Low
Fast charge pending High Low
Discharge in progress Low High
Top-off in progress High High

Battery absent Low Low

Fast charge pending or discharge-before-charge in progress Low

Fast charge in progress Low High
Fast charge complete, top-off, and/or trickle High Low

When used to gate an externally regulated current
source, the SNS pin is connected to V

, and no sense re

SS

sisitor is required.

1

1

1

LED

LED

LED

2

2

2

1/8s high

1/8s low

-

LED1
LED2

DSEL

DCMD

DVEN

TCOTM2TM1

OSC

Display

Control

Charge Control

State Machine

Discharge

Control

DIS MOD INH VCCV

Timing

Control

MOD

Control

PWR

Control

VTS - V

V

BAT

TCO

Check

LTF

Check

SNS

A/D

- V
SNS

EDV

Check

MCV

Check

Figure 3. Block Diagram

7

TS

SNS

BAT

SS

BD200401.eps

bq2004

New Charge Cycle Started by

Any One of:

Rising to Valid Level

V

CC

Battery Replacement

Falling through V

(V

CELL

Inhibit (INH) Released

V

EDV

MCV

< V

)

CELL

< V

DCMD Tied to Ground?

MCV

Battery Voltage?

No

Yes

V

CELL

< V

EDV

Rising Edge

on DCMD

Discharge-

Before-Charge

Charge
Pending

> V

< V

LTF

LTF

HTF

*

or

V

TEMP

V

TEMP

Battery Temperature?

V

CELL

<

Yes

TEMP

>

V

TCO

Time Out

< V

V

MCV

< V

V

HTF

Fast

Charge

- V or

T/ t or

V

TEMP

or
Maximum

Top-Off

Selected?

No

*VSEL = High disables LTF threshold enforcement

Pulse

Trickle

Charge

V

CELL

V

and

V

EDV

HTF

V
V

< V

V

CELL

< V

< V

CELL
MCV

EDV

V

MCV

CELL

TEMP

>

>

< V

< V

Top-Off

Charge

V

CELL

MCV

LTF

> V

*

V

CELL

V

MCV

V

TEMP
or Maximum
Time Out

MCV

Pulse

Trickle

Charge

<

< V

TCO

t >

V

CELL

V

MCV

t

MCV

>

V

CELL

> V

Pulse

Trickle

Charge

SD2004.eps

MCV

Battery
Absent

Pulse

Trickle

Charge

Charge
Complete

Figure 4. State Diagram

8

bq2004

Absolute Maximum Ratings

Symbol Parameter Minimum Maximum Unit Notes

V

CC

V

T

T

OPR

T

STG

T

SOLDER

T

BIAS

Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional opera

VCCrelative to V

SS

DC voltage applied on any pin ex
cluding V

relative to V

CC

SS

-

-0.3 +7.0 V

-0.3 +7.0 V

Operating ambient temperature -20 +70 °C Commercial

Storage temperature -55 +125 °C

Soldering temperature - +260 °C 10 sec max.

Temperature under bias -40 +85 °C

tion should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Expo
sure to conditions beyond the operational limits for extended periods of time may affect device reliability.

-

-

DC Thresholds (T

A=TOPR;VCC

10%)

±

Symbol Parameter Rating Tolerance Unit Notes

V

SNSHI

V

SNSLO

V

LTF

V

HTF

V

EDV

V

MCV

V

THERM

-∆V

PVD

High threshold at SNS result­ing in MOD = Low

Low threshold at SNS result­ing in MOD = High

Low-temperature fault

High-temperature fault

End-of-discharge voltage

Maximum cell voltage

TS input change for∆T/∆t
detection

BAT input change for -∆V
detection

BAT input change for PVD
detection

(1/4*V

0.05*V

0.04 * V

0.4*V

) + (2/3*V

LTF

0.4*V

0.8*V

-16

-12

-6

CC

CC

CC

CC

CC

TCO

0.025

±

0.010

±

0.030

±

)

0.030

±

0.030

±

0.030

±

±4

±4

±2

V

V

V

TEMP

V

its/terminates charge
V

TEMP

V

charge
V

CELL<VEDV

V

fast charge
V

CELL>VMCV

V

terminates charge

V

mV

mV

mV

= 5V, TA= 25°C

CC

V

= 5V, TA= 25°C

CC

V

= 5V, TA= 25°C

CC

V

≥

LTF

V

≤

HTF

-

inhib

inhibits

inhibits

inhibits/

9

bq2004

Recommended DC Operating Conditions (T

= T

A

OPR)

Symbol Condition Minimum Typical Maximum Unit Notes

V

V

V

V

V

V

CC

BAT

CELL

TS

TEMP

TCO

Supply voltage 4.5 5.0 5.5 V

Battery input 0 - V

BAT voltage potential 0 - V

Thermistor input 0 - V

TS voltage potential 0 - V

Temperature cutoff 0.2*V

CC

- 0.4*V

CC

CC

CC

CC

CC

V

VV

BAT

- V

SNS

V

VVTS- V

SNS

V Valid∆T/∆t range

Logic input high 2.0 - - V DCMD, INH

V

IH

Logic input high VCC- 0.3 - - V TM1,TM2, DSEL, VSEL

Logic input low - - 0.8 V DCMD, INH

V

IL

Logic input low - - 0.3 V TM1,TM2, DSEL, VSEL

V

V

OH

V

OL

I

CC

I

SB

I

OH

I

OL

Logic output high

Logic output low - - 0.8 V

Supply current - 1 3 mA Outputs unloaded

Standby current - - 1

DIS, LED1, LED2, MOD source -10 - - mA @VOH= VCC- 0.8V

DIS, LED1, LED2, MOD sink 10 - - mA @VOL= VSS+ 0.8V

Input leakage - -

I

L

CC

- 0.8

--V

1

±

Input leakage 50 - 400

I

IL

I

IH

I

IZ

Logic input low source - - 70

Logic input high source -70 - -

Tri-state -2 - 2

DIS, MOD, LED
I

-10mA

≤

OH

DIS, MOD, LED

I

10mA

≤

OL

A INH = V

µ

A INH, BAT, V = VSSto V

µ

A DCMD, V = VSSto V

µ

TM

A

µ

V = V

TM

A

µ

V = V

TM

A

µ

should be left disconnected

IL

,TM2, DSEL, VSEL,

1

to VSS+ 0.3V

SS

,TM2, DSEL, VSEL,

1

- 0.3V to V

CC

,TM2, DSEL, and VSEL

1

(floating) for Z logic input state

, LED2,

1

, LED2,

1

CC

CC

CC

Note: All voltages relative to VSSexcept as noted.

10

bq2004

Impedance

Symbol Parameter Minimum Typical Maximum Unit

R

BAT

R

TS

R

TCO

R

SNS

Battery input impedance 50 - - M

TS input impedance 50 - - M

TCO input impedance 50 - - M

SNS input impedance 50 - - M

Ω

Ω

Ω

Ω

Timing (T

= 0 to +70°C; V

A

CC

10%)

±

Symbol Parameter Minimum Typical Maximum Unit Notes

t

d

f

REG

t

MCV

PW

FCV

Pulse width for DCMD
and INH pulse command

1- -

Time base variation -16 - 16 % VCC= 4.75V to 5.25V

MOD output regulation
frequency

Maximum voltage termi­nation time limit

- - 300 kHz

1- 2s

Pulse start for charge or discharge

s

µ

before charge

Time limit to distinguish battery re­moved from charge complete.

Note: Typical is at TA= 25°C, VCC= 5.0V.

11

bq2004

16-Pin DIP Narrow (PN)

16-Pin PN(0.300" DIP

Inches Millimeters

Dimension

A 0.160 0.180 4.06 4.57

A1 0.015 0.040 0.38 1.02

B 0.015 0.022 0.38 0.56

B1 0.055 0.065 1.40 1.65

C 0.008 0.013 0.20 0.33

D 0.740 0.770 18.80 19.56

E 0.300 0.325 7.62 8.26

E1 0.230 0.280 5.84 7.11

e 0.300 0.370 7.62 9.40

G 0.090 0.110 2.29 2.79

L 0.115 0.150 2.92 3.81

S 0.020 0.040 0.51 1.02

Min. Max. Min. Max.

)

12

16-Pin SOIC Narrow (SN)

bq2004

16-Pin SN(0.150" SOIC

Inches Millimeters

D

e

B

E

H

C

A

A1

Dimension

A 0.060 0.070 1.52 1.78

A1 0.004 0.010 0.10 0.25

B 0.013 0.020 0.33 0.51

C 0.007 0.010 0.18 0.25

D 0.385 0.400 9.78 10.16

E 0.150 0.160 3.81 4.06

e 0.045 0.055 1.14 1.40

H 0.225 0.245 5.72 6.22

L 0.015 0.035 0.38 0.89

Min. Max. Min. Max.

)

.004

L

13

bq2004

Data Sheet Revision History

Change No. Page No. Description Nature of Change

1 10 Standby current ISB

29V

Rating Was: V

BSNSLO

2 7 Correction in Peak Voltage Detect Termination section Was VCELL; is VBAT

2 3 Added block diagram Diagram insertion

2 7 Added VSEL/termination table Table insertion

2 8 Added values to Table 3 Top-off rate values

3 7 VSEL/Termination Low, High changed

4 All Revised and expanded format of this data sheet Clarification

5 9 Corrected V

69T

OPR

HTF

rating

Was 5 µA max; is 1 µA max

Is: 0.04 * V

Was: (1/3 ∗ V
V

TCO

Is: (1/4 ∗ V

CC

) + (2/3 ∗

LTF

)

) + (3/4 ∗ V

LTF

- (0.01 * VCC)

SNSHI

Deleted industrial tempera­ture range

TCO

)

Notes: Change 1 = Apr. 1994 B “Final” changes from Dec. 1993 A “Preliminary.”

Change 2 = Sept. 1996 C changes from Apr. 1994 B.
Change 3 = April 1997 C changes from Sept. 1996 C.
Change 4 = Oct. 1997 D changes from April 1997 C.
Change 5 = Jan. 1998 E changes from Oct. 1997 D.
Change 6 = June 1999 F changes from Jan. 1998 E.

14

Ordering Information

bq2004

bq2004

Package Option:

PN = 16-pin narrow plastic DIP
SN = 16-pin narrow SOIC

Device:

bq2004 Fast-Charge IC

15

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