This User’s Guide describes the evaluation modules (EVM) for the UCD90120 (UCD90120EVM) and
UCD90124 (UCD90124EVM). The EVM contains evaluation and reference circuitry for the UCD90120 and
UCD90124. UCD90120 and UCD90124 are advanced power system controllers containing sequencing,
monitoring, fan control and many other power supply system support features.
6UCD90120/4EVM Bill of Materials ..................................................................................... 31
1Description
The UCD90120 and UCD90124 EVM provides many sophisticated power supply system controller
application capabilities. The EVM allows direct PMBus (power management bus) communication with the
UCD90120 and UCD90124 via an onboard USB interface. This interface allows direct control and
feedback with the UCD90120 and UCD90124 when using the
TI-Fusion-Digital-Power-Designer-Graphical-User-Interface.
1.1Features
•General features
– Single 12V supply input
– 12 rail sequencing
– 13 analog monitors
– Single fan control interface
– Status LEDs on all GPIOs
– USB-PMBus interface for communication
•Orderable options
– UCD90124EVM 12 channel sequencer and monitor with fan control
– UCD90120EVM 12 channel sequencer and monitor
www.ti.com
1.2Applications
•Industrial / ATE
•Telecommunications and Networking Equipment
•Servers and Storage Systems
•Any System Requiring Sequencing and Monitoring of Multiple Power Rails
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Evaluation Module for UCD90120 and UCD90124SLVU347–December 2009
Figure 1 shows a typical test setup for UCD90120/4EVM. All that is required is a 12V (500mA for
UCD90120EVM or 2000mA for UCD90124EVM running a fan) wall adapter/laptop power supply (see J1
BOM description for receptacle size) and a PC. The USB-EVM cable is provided with the EVM.
Quick Start
SLVU347–December 2009Evaluation Module for UCD90120 and UCD90124
The UCD90120 and UCD90124 EVMs use the Texas Instruments Fusion Digital Power Designer
graphical user interface (GUI) which may be downloaded from the following web site:
Place the TI-Fusion-Digital-Power-Designer-zip file in a known location on the PC. Unzip the
TI-Fusion-Digital-Power-Designer-zip file.
Double click the unzipped TI-Fusion-Digital-Power-Designer-exe file. Proceed through the installation by
accepting the installer prompts and the license agreement. Accept the GUI suggested default PC
installation locations to complete the install.
Once the GUI completes the installation it will start. The first time the GUI is launched on a particular PC
the user may be prompted to select a device. Choose UCD9xxx. Afterwards, the GUI may be closed.
Note that the TI-Fusion-Digital-Power-Designer v1.6.105 was used for the examples to be shown later in
the document.
www.ti.com
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Evaluation Module for UCD90120 and UCD90124SLVU347–December 2009
The EVM comes pre-loaded with a 12 rail default project that sequences the EVM rails on at power up. It
is a good idea to export the default project to a file on the PC prior to making changes.
3.2.1Launch TI-Fusion-Digital-Power-Designer
Navigate to the location where the Fusion GUI is installed and (Start, All Programs, Texas Instruments
Fusion Digital Power Designer, Fusion Digital Power Designer) and start it. A window similar to the
following will appear.
UCD90120/4 EVM GUI Setup
SLVU347–December 2009Evaluation Module for UCD90120 and UCD90124
Most of the GUI control features are available from the Configure window. Monitor and Status information
is available from the respective buttons on the GUI lower left. A typical Monitor window is shown below.
www.ti.com
8
Evaluation Module for UCD90120 and UCD90124SLVU347–December 2009
D9REDV33DUCD90120/4 power ON
D28REDALERTPMBus Alert
D29GREENCTRLPMBus Control
D56GREENUSB ONUSB attached
D8AMBERGPI1GPI1 input HIGH
D10AMBERGPI2GPI2 input HIGH
D12AMBERGPI3GPI3 input HIGH
D13AMBERGPI4GPI4 input HIGH
D30GREENGPIO1GPIO1 HIGH
D32GREENGPIO2GPIO2 HIGH
D34GREENGPIO3GPIO3 HIGH
D36GREENGPIO4GPIO4 HIGH
D38GREENGPIO13GPIO13 HIGH
D47GREENGPIO14GPIO14 HIGH
D49GREENGPIO15GPIO15 HIGH
D40GREENGPIO16GPIO16 HIGH
D42GREENGPIO17GPIO17 HIGH
D44GREENGPIO18GPIO18 HIGH
D46GREENGPIO19GPIO19 HIGH
D48GREENGPIO20GPIO20 HIGH
D54GREENGPIO21GPIO21 HIGH
D55GREENGPIO22GPIO22 HIGH
D31AMBERFPWM1GPIO5 HIGH
D33AMBERFPWM2GPIO6 HIGH
D35AMBERFPWM3GPIO7 HIGH
D37AMBERFPWM4GPIO8 HIGH
D39AMBERFPWM5GPIO9 HIGH
D41AMBERFPWM6GPIO10 HIGH
D43AMBERFPWM7GPIO11 HIGH
D45AMBERFPWM8GPIO12 HIGH
D14REDVR1VR1 ON
D15REDVR2VR2 ON
D16REDVR3VR3 ON
D17REDVR4VR4 ON
D18REDVR5VR5 ON
D19REDVR6VR6 ON
D20REDVR7VR7 ON
D21REDVR8VR8 ON
D22REDVR9VR9 ON
D23REDVR10VR10 ON
D24REDVR11VR11 ON
D25REDVR12VR12 ON
www.ti.com
Table 2. EVM LED’s
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Evaluation Module for UCD90120 and UCD90124SLVU347–December 2009
The EVM will be equipped with shunts on the jumper positions identified in the Default Pin Position below.
Shunts can be moved and removed as required during use.
The following paragraphs describe the UCD90120/4 EVM functionality and operation.
5.1Communication Interfaces
Several communication interfaces to the UCD90120/4 are provided on the EVM.
5.1.1USB Interface
An onboard USB to PMBus interface is provided through the USB Input (J3) connector. D56 provides USB
attach status. The presence of USB power at J3 activates buffer circuitry which gives control of the PMBus
to the on board circuitry. The absence of USB power at J3 gives PMBus control through the Expansion
PMBus (J77) connector.
5.1.2PMBus
Standard PMBus interface is provided to the UCD90120/4 through the J77 connector when the on EVM
USB-PMBus interface is not used. PMBus addressing is set using the J18 jumper block for ADDRSENS1
and ADDRSENS0 respectively. ADDRx=8 and ADDRx=5 positions for each are provided. The EVM
comes with PMBus address set to 101 decimal.
Standard JTAG programming interface is provided to the UCD90120/4 through the J9 connector. Install
J6, J7, J11, and J12 jumpers and ensure that rail 9-12 enable jumpers (J47, J53, J59, J65) are removed
when using the JTAG interface.
Description
5.2Power
5.2.1Input Power
The 12VDC EVM input power is provided through J1 (standard DC jack) or J2 (screw jack). A wall or
laptop adapter with 500mA (UCD90120EVM) or 2000mA (UCD90124EVM running a fan) capability and
2.5mm I.D. x 5.5mm O.D. x 9.5mm DC jack can power the EVM. Reverse voltage protection and inrush
limiting is provided for 12VBUS. The 12VBUS signal is distributed for fan power and Local 3.3V supply.
5.2.25VBUS
5VBUS is derived from 12VBUS and provides the input voltage for rails 1-12. D5 will illuminate when
5VBUS is present.
5.2.3L3P3V
L3P3V is derived from 5VBUS and provides a general purpose 3.3V supply for the common onboard
functions. The L3P3V jumper (J4) is installed to provide a connection to the 3P3V node.
5.2.4V33D
The V33D node is connected to the UCD90120/4 digital and analog supply pins. V33D can be sourced by
3P3V or Local V33D using the J5 jumper. D9 will illuminate when V33D is present.
5.2.5Local 3.3V
The UCD90120/4 can be powered from 12VBUS using the local V33D supply. Install J13 (12VB) and
ensure J5 is installed in the LV33D position to use the local regulator.
SLVU347–December 2009Evaluation Module for UCD90120 and UCD90124
When the local 12V power supply source is not available, a subset of EVM functionality is available using
only power from the local USB source (3P3V_USB). Install J8 (3.3VUSB) and remove J4 when this
operation is desired. Communication to the UCD90120/4 is possible but power supply sequencing and
operation is not.
5.3Test/Debug and Status
5.3.1GPIO Expansion
J73 and J74 provide EVM to system board expansion capability as well as an HP type logic analyzer
interface.
5.3.2Status LEDs
Visual status information for the GPI, GPIO, and PMBus signals (control and alert) is provided. Logic high
at GPI1-4 or GPIO1-22 will illuminate the associated LED. The GPIO status LEDs can be enabled (EN) or
disabled (EN bar) through the use of S10 to prevent the LED bias from affecting the logic state of the
GPIO signal during device reset.
5.4Digital I/O Terminations
5.4.1General Purpose Input/Output Terminations
GPIO1-22 can be pulled up or down with a 10kΩ resistor using jumpers. GPIO14 and GPIO15 can also be
used as voltage margining inputs.
www.ti.com
5.4.2General Purpose Input Terminations
GPI1-4 can be pulled up or down with a 10kΩ resistor using jumpers.
5.5Analog Monitor Inputs
The UCD90120/4 monitor inputs MON1-13 can be used to monitor onboard or off board voltages.
Jumpers are used to select the analog source.
5.5.1MON1 and MON4–MON11
MON1 and MON4-11 can be sourced by the onboard rail (L#) or an external (E#) voltage.
5.5.2MON2, MON3, MON12 and MON13
MON2 can be sourced by the onboard rail (L2), an external (E2) or the on board temperature sensor (T1)
voltage. MON3 can be sourced by the onboard rail (L3), an external (E3) or the on board current monitor
(C1) voltage. MON12 can be sourced by onboard rail (12L), an external source (12E) or the onboard fan
temperature potentiometer input (TEMP MON) voltage. MON13 can be sourced by the V33D or 12VBUS
voltage.
5.5.3Monitor Scaling
For the external monitor jumper positions (E1-E4), the external supply can be scaled by a selectable factor
of 2 for monitoring external voltages up to 5V or 6 for monitoring external voltages up to 15V. For MON13,
the scale factor is 6 for the 12VB position and 2 for the V33D position. For all other MON jumper positions,
the scale factor is 2.
5.5.4Monitor Fault Injection
Under voltage or over voltage faults can be injected on MON 5–MON12 through the use of on board
switches (S2, S4, S6, S8, S3, S5, S7, S9 respectively). The switches provide a fault bias on the nominal
voltage of approximately ±20%
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Evaluation Module for UCD90120 and UCD90124SLVU347–December 2009
Twelve on board voltages are provided for sequencing and monitoring. Each voltage rail has an output on
LED. The nominal output voltages are listed in Table 5.
An onboard temperature sensor is provided to measure temperature rise of the VR1 output load (R74).
MON2 can be used to monitor the temperature rise caused by heat up of R74 when the shunt on J24 is in
the T1 position. When J26 (C1) is installed, the temperature sensor near R74 records temperature rise
simulating power supply warm up.
•Use TP14 (T1) to measure the temperature sensor output voltage.
•Temperature (in degrees C) = 100 × VT1 – 50 where VT1 is the voltage at TP14.
•The voltage at TP14 is scaled by a factor of 2 prior to sampling at MON2.
•Set the GUI Temp Cal Gain = 200°C/V and the Temp Cal Offset = –50°C.
5.7.1Basic Process for Adding Temperature Monitoring to a Rail
A basic procedure to add temperature monitoring to rail #1, starting with the EVM default configuration will
follow. Ensure that rail #1 is selected in the upper right corner.
Description
SLVU347–December 2009Evaluation Module for UCD90120 and UCD90124
•Press and release the EVM RESET (S1) button and the on EVM temperature sensor will provide rail
Description
#1 load temperature.
5.8Input Current Monitoring
An onboard current monitor is provided to measure VR1 load current. MON3 can be used to monitor VR1
output current when the shunt on J28 is in the C1 position. When J26 (C1) is installed, VR1 output load
(R74) is connected causing an increase in current which can be measured by MON3 and at TP18.
•Use TP18 (C1) to measure the current monitor output voltage.
•Current (in amperes) = 0.5 × VC1 where VC1 is the voltage at TP18.
•The voltage at TP18 is scaled by a factor of 2 prior to sampling at MON3.
•Set the GUI Iout Cal Gain = 1000mΩ and the Iout Cal Offset = 0A.
5.8.1Basic Process for Adding Current Monitoring to a Rail
A basic procedure to add current monitoring to rail #1, starting with the previously modified (adding
temperature) configuration will follow. Ensure that rail #1 is selected in the upper right corner.
SLVU347–December 2009Evaluation Module for UCD90120 and UCD90124
•Press and release the EVM RESET (S1) button and the on EVM current monitor will provide rail #1
Description
load current.
5.9Closed Loop Voltage Margining
The output voltage of VR1-4 can be varied from nominal in a closed loop fashion for voltage margining.
Four duty cycle modulated GPIO signals (FPWM1-4) are filtered to control the rail output voltage. Two
GPIO – feedback node filter configurations are provided; simple R-C-R or R-C-buffer-R. Jumpers provide
selection of either the simple or buffered method. Install J22, J25, J30, or J33 in either the RC (for R-C-R)
or MRGx (for R-C-buffer-R).
5.9.1Basic Process for Voltage Margining a Rail
A basic procedure to voltage margin rail #1, starting with the EVM default configuration will follow. For
more information on voltage margining please refer to application note (SLVA375). Ensure that rail #1 is
selected in the upper right corner.
NOTE: Ensure that S10 (STAT LED) is in the EN position.
SLVU347–December 2009Evaluation Module for UCD90120 and UCD90124
•Press the Write to Hardware button and OK the window below (note that the window below may not
always be present depending on the version of the GUI used.
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Evaluation Module for UCD90120 and UCD90124SLVU347–December 2009
The UCD90124 provides support for up to four fans. The UCD90124EVM provides a single fan interface
from J66. The UCD90124EVM interface can support three fan types including 2-wire, 3-wire, and 4-wire.
The FAN connector has four terminals (12V, GND, Tach, and PWM).
5.10.1Fan Tach Input
The fan tach signal is an input to the UCD90124 providing an indication of fan speed based on signal
frequency. The EVM Tach input signal is conditioned prior to being connected to the UCD90124 and can
interface with either a 3.3V or 5V signal using J72. Install a shunt in the TACH position of J67 to connect
the conditioned signal to the UCD90124. The TACH signal at J66-2 is inverted by the conditioning circuitry
prior to J67.
5.10.2Fan PWM Output
The fan PWM signal is an output from the UCD90124 providing fan speed control using a pulse width
modulated signal. The UCD90124 output signal can come from either PWM1 (J67 in the PWM position) or
FPWM5 (J70 in the FPWM5 position). The PWM1 or FPWM5 output signal can directly drive the fan PWM
input (four wire fan with J68 in the 4W position) or be conditioned prior the fan PWM input (two or three
wire fan with J68 in the 2/3W position). When J68 is in the 2/3W position, the PWM signal at J66-3 can
drive or modulate the ground of a two or three wire fan. When J68 is in the 2/3W position, the PWM signal
at J66-3 can provide a 3.3V, 5V, or 12V level PWM signal with appropriately installed shunts on J69 for
use with four wire fans. When J68 is in the 2/3W position, the PWM1 or FPWM5 signal at J70 is inverted
by the conditioning circuitry prior to J66-3.
www.ti.com
5.10.3Fan Temperature Simulation
An onboard potentiometer (TEMP MON) can be used to simulate analog temperature when used in
conjunction with the fan interface for fan speed control. The potentiometer voltage can be monitored at
TP54 (TEMP MON) through MON12. Install a shunt in the 12E position of J61 and install J71 (EVR12).
The potentiometer voltage can be varied from 0 to approximately 4.2V. This voltage is scaled by 2 before
being sampled at MON12.
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Evaluation Module for UCD90120 and UCD90124SLVU347–December 2009
Table 6. UCD90120/4EVM Bill of Materials (continued)
Count
RefDesValueDescriptionSizePart NumberMFR
UCD90124EVMUCD90120EVM
11U14SN74CBTLV3125DBQ IC, Low Voltage Quad FET Bus SwitchTSSOP-16SN74CBTLV3125DBQTI
11U15TUSB3210PMIC, USB, General Purpose Device ControllerPQFP-64TUSB3210PM**TI
11U16TPS76333DBVIC, Micro-Power 100 mA LDO RegulatorSOT23-5TPS76333DBVTI
22U2, U3SN74LVC2G04DBVIC, Dual Schmitt-Trigger InverterSOT23-6SN74LVC2G04DBVTI
01U4UCD90120RGCIC, Digital PWM System ControllerPFC-64UCD90120RGCTI
10U4UCD90124RGCIC, Digital PWM System Controller w/FanPFC-64UCD90124RGCTI
Control
11U5TPS62420DRCIC, 2.25 MHz Dual Step Down ConverterQFN10TPS62420DRCTI
11U6TLC274CDIC, CMOS, Quad Operational AmplifierSO14TLC274CDTI
11U7MCP9700T-EIC, Low-Power Voltage output TemperatureSC70-5MCP9700T-EMicrochip
Sensor
11U8INA196AIDBVIC, Current Shunt Monitor, –16V to 80VSOT23-5INA196AIDBVTI
Common-Mode Range
11U9TPS71202DRCIC, Dual 250mA Output, Ultralow Noise, HighDRC10TPS71202DRCTI
PSRR, LDO Linear Regulator
11Y112MHZCrystal, 12-MHz, 20 pF, ±50 PPM at 25C0.185 × 0.532CY12BPSMDCrystek
5757–Shunt, Black100-mil929950-003M
44SJ-5003BUMPON HEMISPHERE 0.44×0.20 BLACKSJ-50033M
11–PCB, 6 In × 5 In × 0.062 InHPA459Any
11USB Cable, 5-pin, B-Mini Male to Type A Male,AK672M/2-2-RAssman
2m
36
Evaluation Module for UCD90120 and UCD90124SLVU347–December 2009
Layout Guidelines, EVM Schematic, and Assembly Drawings
7Layout Guidelines, EVM Schematic, and Assembly Drawings
7.1Layout Guidelines
Thermal pad
The thermal pad provides a thermal and mechanical interface between the device and the printed circuit
board (PCB). While device power dissipation is not of primary concern, a more robust thermal interface
can help the internal temperature sensor provide a better representation of PCB temperature. Connect the
exposed thermal pad of the PCB to the device VSS pins and provide at least a 4 × 4 pattern of PCB vias
to connect the thermal pad and VSS pins to the circuit ground on other PCB layers.
Supply voltage decoupling
Provide power supply pin bypass to the device as follows:
•0.1µF, X7R ceramic in parallel with 0.01µF, X7R ceramic at pin 47 (BPCAP)
•0.1µF, X7R ceramic in parallel with 4.7µF, X5R ceramic at pin 44 (V33D)
•0.1µF, X7R ceramic at pin 7 (V33DIO)
•0.1µF, X7R ceramic in parallel with 4.7µF, X5R ceramic at pin 46 (V33A)
Digital output signals
Depending on use and application of the various GPIO signals used as digital outputs, some impedance
control may be desired to quiet fast signal edges. For example, when using the FPWM pins for fan control
or voltage margining the pin will be configured as a digital clock signal. Route these signals away from
sensitive analog signals. It is also good design practice to provide a series impedance of 20–33 Ω at the
signal source to slow fast digital edges.
PMBus clock and data
Route PMBUS_CLK and PMBUS_DATA in a careful fashion away from sensitive analog signals. Provide
a series impedance of 20–33 Ω at the signal source.
7.2EVM Schematic
The searchable PDF of the schematic is appended to this User's Guide.
7.3Assembly Drawings
The assembly drawings are appended to this User's Guide. The topside and bottomside component
layouts are searchable.
SLVU347–December 2009Evaluation Module for UCD90120 and UCD90124
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the
product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are
not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations,
including product safety and environmental measures typically found in end products that incorporate such semiconductor
components or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regarding
electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet the
technical requirements of these directives or other related directives.
Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30
days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY
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The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all
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TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.
TI assumes no liability for applications assistance, customer product design, software performance, or infringement of
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Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the
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This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, and
can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15
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EVM Warnings and Restrictions
It is important to operate this EVM within the input voltage range of 0 V to 20 V and the output voltage range of 0 V to 5 V .
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are
questions concerning the input range, please contact a TI field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the
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specification, please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than 85°C. The EVM is designed to
operate properly with certain components above 85°C as long as the input and output ranges are maintained. These components
include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of
devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near
these devices during operation, please be aware that these devices may be very warm to the touch.
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