Texas Instruments TPS2041BD, TPS2041BDBV, TPS2041BDGN, TPS2042BD, TPS2042BDGN Schematic [ru]

...
D−16
D−8
DBV−5
DRB−8
DGN−8
1
2
3
4
5
6
7
8
11
9
GND
IN2
EN3
NC
OC3 OUT3 NC NC
1
2
3
4
8
7
6
5
GND
IN IN
EN
OUT OUT OUT OC
TPS2041B/TPS2051B
D ANDDGNPACKAGES
(TOP VIEW)
1
2
3
4
8
7
6
5
GND
GND
IN
IN
EN1
EN1
EN2
EN2
OC1
OC1
OUT1
OUT1
OUT2
OUT2
OC2
OC2
TPS2042B/TPS2052B
DRBPACKAGES
(TOP VIEW)
OC1 OUT1 OUT2 OC2
GND
IN1
EN1
EN2
1
2
3
4
5
6
7
8
11
9
GND
IN2
EN3
EN4
OC3 OUT3 OUT4 OC4
OC1 OUT1 OUT2 OC2
GND
IN1
EN1
EN2
− NoconnectNC
Allenableinputsareactivehighforthe TPS205xBseries.
TPS2044B/TPS2054B
D PACKAGE
(TOP VIEW)
TPS2043B/TPS2053B
DPACKAGE
(TOP VIEW)
GND
OUT
TPS2041B/TPS2051B
DBVPACKAGE
(TOP VIEW)
OC
IN
EN
4
3
2
1
5
6
7
8
TPS2042B/TPS2052B
D ANDDGNPACKAGES
(TOP VIEW)
TPS2014600mA TPS20151 A TPS2041B500mA TPS2051B500mA TPS2045A 250mA TPS2049100mA TPS2055A 250mA TPS20611 A TPS20651 A TPS20681.5 A TPS20691.5 A
TPS2042B500mA TPS2052B500mA TPS2046B250mA TPS2056250mA TPS20621 A TPS20661 A TPS20601.5 A TPS20641.5 A
TPS2080500mA TPS2081500mA TPS2082500mA TPS2090250mA TPS2091250mA TPS2092250mA
TPS2043B500mA TPS2053B500mA TPS2047B250mA TPS2057A 250mA TPS20631 A TPS20671 A
TPS2044B500mA TPS2054B500mA TPS2048A 250mA TPS2058250mA
TPS2085500mA TPS2086500mA TPS2087500mA TPS2095250mA TPS2096250mA TPS2097250mA
TPS201xA 0.2 A to2A TPS202x0.2 A to2A TPS203x0.2 A to2A
GENERAL SWITCHCATALOG
33m ,SingleW 80m ,SingleW
80m ,DualW 80m ,DualW
80m , TripleW
80m ,QuadW 80m ,QuadW
TPS2043B, TPS2044B, TPS2051B TPS2052B, TPS2053B, TPS2054B
www.ti.com
SLVS514L –JUNE 2010– REVISED JUNE 2011
CURRENT-LIMITED, POWER-DISTRIBUTION SWITCHES
Check for Samples: TPS2041B, TPS2042B, TPS2043B, TPS2044B, TPS2051B, TPS2052B, TPS2053B, TPS2054B
1

FEATURES

2
70-mHigh-Side MOSFET
500-mA Continuous Current Short-Circuit Protections
Thermal and Short-Circuit Protection
Accurate Current Limit
(0.75 A min, 1.25 A max)
Operating Range: 2.7 V to 5.5 V
0.6-ms Typical Rise Time
Undervoltage Lockout
Deglitched Fault Report (OC)
No OC Glitch During Power Up
Maximum Standby Supply Current: 1-μA (Single, Dual) or 2-μA (Triple, Quad)
Ambient Temperature Range: -40°C to 85°C
UL Recognized, File Number E169910
Additional UL Recognition for TPS2042B and
TPS2052B for Ganged Configuration

APPLICATIONS

Heavy Capacitive Loads
TPS2041B, TPS2042B

DESCRIPTION

The TPS204xB/TPS205xB power-distribution switches are intended for applications where heavy capacitive loads and short circuits are likely to be encountered. These devices incorporates 70-mN-channel MOSFET power switches for power-distribution systems that require multiple power switches in a single package. Each switch is controlled by a logic enable input. Gate drive is provided by an internal charge pump designed to control the power-switch rise times and fall times to minimize current surges during switching. The charge pump requires no external components and allows operation from supplies as low as 2.7 V.
When the output load exceeds the current-limit threshold or a short is present, the device limits the output current to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx) logic output low. When continuous heavy overloads and short-circuits increase the power dissipation in the switch, causing the junction temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from a thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures that the switch remains off until valid input voltage is present. This power-distribution switch is designed to set current limit at 1 A typically.
1
2PowerPAD is a trademark of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
See TI Switch Portfolio at http://www.ti.com/usbpower
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2010–2011, Texas Instruments Incorporated
TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B TPS2052B, TPS2053B, TPS2054B
SLVS514L –JUNE 2010– REVISED JUNE 2011
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
www.ti.com
(1)
MSOP (DGN) SOIC (D) SOT-23 (DBV) SON (DRB)
T
A
-40°C to 85°C
DEVICE INFORMATION
RECOMMENDED SHORT-
ENABLE OF
Active low Single TPS2041BDGN TPS2041BD TPS2041BDBV
Active high Single TPS2051BDGN TPS2051BD TPS2051BDBV
Active low Dual TPS2042BDGN TPS2042BD TPS2042BDRB
Active high Dual TPS2052BDGN TPS2052BD TPS2052BDRB
Active low Triple -- TPS2043BD
Active high Triple -- TPS2053BD
Active low Quad -- TPS2044BD
Active high Quad -- TPS2054BD
MAXIMUM CIRCUIT
CONTINUOUS CURRENT
LOAD CURRENT LIMIT
0.5 A 1 A
TYPICAL PACKAGED DEVICES
NUMBER
SWITCHES
AT 25°C
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted
Input voltage range, V Output voltage range, V Input voltage range, V Voltage range, V
I(/OC)
I(IN)
I(EN)
, V
O(OUT)
I(OCx)
Continuous output current, I Continuous total power dissipation See Dissipation Rating Table Operating virtual junction temperature range, T Storage temperature range, T
Electrostatic discharge (ESD) protection
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND.
, V
, V
I(INx)
, V
I(ENx)
O(OUT)
stg
(2)
O(OUTx)
, V
I(EN)
, I
O(OUTx)
(2)
, V
I(ENx)
J
Human body model (HBM) 2 kV Charge device model (CDM) 500 V
(1)
UNIT
-0.3 V to 6 V
-0.3 V to 6 V
-0.3 V to 6 V
-0.3 V to 6 V
Internally limited
-40°C to 125°C
-65°C to 150°C

DISSIPATING RATING TABLE

PACKAGE
DGN-8 1712.3 mW 17.123 mW/°C 941.78 mW 684.93 mW
D-8 585.82 mW 5.8582 mW/°C 322.20 mW 234.32 mW
D-16 898.47 mW 8.9847 mW/°C 494.15 mW 359.38 mW
DBV-5 285 mW 2.85 mW/°C 155 mW 114 mW
DRB-8 (Low-K)
DRB-8 (High-K)
(1)
(2)
(1) Soldered PowerPAD on a standard 2-layer PCB without vias for thermal pad. See TI application note SLMA002 for further details. (2) Soldered PowerPAD on a standard 4-layer PCB with vias for thermal pad. See TI application note SLMA002 for further details.
2 Copyright © 2010–2011, Texas Instruments Incorporated
THERMAL TA≤ 25°C DERATING FACTOR TA= 70°C TA= 85°C
RESISTANCE, θ
POWER RATING ABOVE TA= 25°C POWER RATING POWER RATING
JA
270 °CW 370 mW 3.71 mW/°C 203 mW 148 mW
60 °CW 1600 mW 16.67 mW/°C 916 mW 866 mW
TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B TPS2052B, TPS2053B, TPS2054B
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RECOMMENDED OPERATING CONDITIONS

Input voltage, V Input voltage, V Continuous output current, I Operating virtual junction temperature, T
I(IN) I(EN)
, V
, V
I(INx)
I(ENx)
, V
I(EN)
O(OUT)
, V
, I
O(OUTx)
I(ENx)
J

ELECTRICAL CHARACTERISTICS

over recommended operating junction temperature range, V
PARAMETER TEST CONDITIONS
POWER SWITCH
Static drain-source on-state D and DGN packages 70 135 resistance, 5-V operation m and 3.3-V operation
r
Static drain-source on-state V
DS(on)
resistance, 2.7-V operation -40°C TJ≤ 125°C Static drain-source on-state V
resistance, 5-V operation connected, 0°C TJ≤ 70°C TPS2042B/52B
t
Rise time, output
r
t
Fall time, output
f
ENABLE INPUT EN AND ENx
V
High-level input voltage 2.7 V V
IH
V
Low-level input voltage 2.7 V V
IL
I
Input current V
I
t
Turnon time CL= 100 μF, RL= 10 3
on
t
Turnoff time CL= 100 μF, RL= 10 10
off
CURRENT LIMIT
I
Short-circuit output current A
OS
I
Overcurrent trip threshold VIN= 5 V, 100 A/s A
OC
SUPPLY CURRENT (TPS2041B, TPS2051B)
Supply current, low-level output μA
Supply current, high-level output μA
Leakage current -40°C TJ≤ 125°C 1 μA Reverse leakage current V
(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account
separately.
V
= 5 V or 3.3 V, IO= 0.5 A,
I(IN)
-40°C TJ≤ 125°C = 2.7 V, IO= 0.5 A,
I(IN)
= 5 V, IO= 1.0 A, OUT1 and OUT2 DGN package,
I(IN)
V
= 5.5 V 0.6 1.5
I(IN)
V
= 2.7 V 0.4 1
I(IN)
V
= 5.5 V 0.05 0.5
I(IN)
V
= 2.7 V 0.05 0.5
I(IN)
5.5 V 2
I(IN)
5.5 V 0.8
I(IN)
= 0 V or 5.5 V -0.5 0.5 μA
I(ENx)
V
= 5 V, OUT connected to GND,
I(IN)
device enabled into short-circuit V
= 5 V, OUT1 and OUT2 connected to
I(IN)
GND, device enabled into short-circuit, 1.5 measure at IN
No load on OUT, V or V
I(ENx)
= 0 V
No load on OUT, V or V
I(ENx)
= 5.5 V
I(ENx)
I(ENx)
OUT connected to ground, V or V
= 0 V
I(ENx)
= 5.5 V, IN = ground TJ= 25°C 0 μA
I(OUTx)
= 5.5 V, IO= 0.5 A, V
I(IN)
(1)
DBV package only 95 140
D and DGN packages 75 150 m
CL= 1 μF, RL= 10
TJ= 25°C ms
TJ= 25°C 0.75 1 1.25
-40°C TJ≤ 125°C 0.7 1 1.3 0°C TJ≤ 70°C
TPS2042B/52B
TPS2041B/51B I TPS2042B/52B IOS1.55 2.0
= 5.5 V,
TJ= 25°C 0.5 1
-40°°C TJ≤ 125°C 0.5 5
= 0 V,
TJ= 25°C 43 60
-40°C TJ≤ 125°C 43 70
= 5.5 V,
I(ENx)
SLVS514L –JUNE 2010– REVISED JUNE 2011
MIN MAX UNIT
2.7 5.5 V 0 5.5 V 0 500 mA
-40 125 °C
= 0 V (unless otherwise noted)
I(/ENx)
MIN TYP MAX UNIT
49 m
1.5 1.9
OS
V
ms
Copyright © 2010–2011, Texas Instruments Incorporated 3
TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B TPS2052B, TPS2053B, TPS2054B
SLVS514L –JUNE 2010– REVISED JUNE 2011
ELECTRICAL CHARACTERISTICS (continued)
over recommended operating junction temperature range, V
PARAMETER TEST CONDITIONS
SUPPLY CURRENT (TPS2042B, TPS2052B)
Supply current, low-level output No load on OUT, V
Supply current, high-level output No load on OUT, V
Leakage current OUT connected to ground, V Reverse leakage current V
= 5.5 V, IN = ground TJ= 25°C 0.2 μA
I(OUTx)
SUPPLY CURRENT (TPS2043B, TPS2053B)
Supply current, low-level output No load on OUT, V
Supply current, high-level output No load on OUT, V
Leakage current OUT connected to ground, V Reverse leakage current V
= 5.5 V, INx = ground TJ= 25°C 0.2 μA
I(OUTx)
SUPPLY CURRENT (TPS2044B, TPS2054B)
Supply current, low-level output μA
Supply current, high-level output μA
Leakage current -40°CTJ≤ 125°C 1 μA Reverse leakage current V
No load on OUT, V or V
I(ENx)
= 0 V
No load on OUT, V or V
I(ENx)
= 5.5 V
OUT connected to ground, V or V
= 0 V
I(ENx)
= 5.5 V, INx = ground TJ= 25°C 0.2 μA
I(OUTx)
UNDERVOLTAGE LOCKOUT
Low-level input voltage, IN, INx 2 2.5 V Hysteresis, IN, INx TJ= 25°C 75 mV
OVERCURRENT OC and OCx
Output low voltage, V
OL(/OCx)
Off-state current V
I
= 5 mA 0.4 V
O(OCx)
= 5 V or 3.3 V 1 μA
O(OCx)
OC deglitch OCx assertion or deassertion 4 8 15 ms
THERMAL SHUTDOWN
(2)
Thermal shutdown threshold 135 °C Recovery from thermal shutdown 125 °C Hysteresis 10 °C
(2) The thermal shutdown only reacts under overcurrent conditions.
I(ENx)
I(ENx)
I(ENx)
I(ENx)
I(ENx)
I(ENx)
= 5.5 V, IO= 0.5 A, V
I(IN)
= 5.5 V μA
= 0 V μA
= 5.5 V -40°C TJ≤ 125°C 1 μA
I(ENx)
= 0 V μA
= 5.5 V μA
= 0 V -40°CTJ≤ 125°C 1 μA
I(ENx)
= 5.5 V,
(1)
TJ= 25°C 0.5 1
-40°C TJ≤ 125°C 0.5 5 TJ= 25°C 50 70
-40°C TJ≤ 125°C 50 90
TJ= 25°C 0.5 2
-40°C TJ≤ 125°C 0.5 10 TJ= 25°C 65 90
-40°C TJ≤ 125°C 65 110
TJ= 25°C 0.5 2
= 0 V (unless otherwise noted)
I(/ENx)
MIN TYP MAX UNIT
-40°C TJ≤ 125°C 0.5 10
= 0 V,
TJ= 25°C 75 110
-40°C TJ≤ 125°C 75 140
= 5.5 V,
I(ENx)
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4 Copyright © 2010–2011, Texas Instruments Incorporated
OUT
OC
IN
EN
GND
Current
Limit
Driver
UVLO
Charge
Pump
CS
Thermal
Sense
Deglitch
Note A: Current sense Note B: Active low (EN
) for TPS2041B; Active high (EN) for TPS2051B
(See Note A)
(See Note B)
TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B TPS2052B, TPS2053B, TPS2054B
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DEVICE INFORMATION

Terminal Functions (TPS2041B and TPS2051B)
TERMINAL
D AND DGN PACKAGE DBV PACKAGE I/O DESCRIPTION
NAME TPS2041B TPS2051B TPS2041B TPS2051B
EN 4 4 I Enable input, logic low turns on power switch EN 4 4 I Enable input, logic high turns on power switch GND 1 1 2 2 Ground IN 2, 3 2, 3 5 5 I Input voltage OC 5 5 3 3 O Overcurrent open-drain output, active-low OUT 6, 7, 8 6, 7, 8 1 1 O Power-switch output
Figure 1. Functional Block Diagram (TPS2041B and TPS2051B)
SLVS514L –JUNE 2010– REVISED JUNE 2011
Copyright © 2010–2011, Texas Instruments Incorporated 5
Thermal
Sense
Driver
Current
Limit
Charge
Pump
UVLO
CS
Driver
Current
Limit
CS
Thermal
Sense
Charge
Pump
GND
EN1
IN
EN2
OC1
OUT1
OUT2
OC2
Deglitch
Deglitch
(See Note A)
(See Note B)
Note A: Current sense Note B: Active low (ENx
) for TPS2042B; Active high (ENx) for TPS2052B
(See Note B)
(See Note A)
TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B TPS2052B, TPS2053B, TPS2054B
SLVS514L –JUNE 2010– REVISED JUNE 2011
Terminal Functions (TPS2042B and TPS2052B)
TERMINAL
D, DGN, and DRB PACKAGES I/O DESCRIPTION
NAME TPS2042B TPS2052B
EN1 3 - I Enable input, logic low turns on power switch IN-OUT1 EN2 4 - I Enable input, logic low turns on power switch IN-OUT2 EN1 - 3 I Enable input, logic high turns on power switch IN-OUT1 EN2 - 4 I Enable input, logic high turns on power switch IN-OUT2 GND 1 1 Ground IN 2 2 I Input voltage OC1 8 8 O Overcurrent, open-drain output, active low, IN-OUT1 OC2 5 5 O Overcurrent, open-drain output, active low, IN-OUT2 OUT1 7 7 O Power-switch output, IN-OUT1 OUT2 6 6 O Power-switch output, IN-OUT2
PowerPAD - -
Functional Block Diagram (TPS2042B and TPS2052B)
Internally connected to GND; used to heat-sink the part to the circuit board traces. Should be connected to GND pin.
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6 Copyright © 2010–2011, Texas Instruments Incorporated
TPS2043B, TPS2044B, TPS2051B TPS2052B, TPS2053B, TPS2054B
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Terminal Functions (TPS2043B and TPS2053B)
TERMINAL
NAME TPS2043B TPS2053B
EN1 3 -- I Enable input, logic low turns on power switch IN1-OUT1 EN2 4 -- I Enable input, logic low turns on power switch IN1-OUT2 EN3 7 -- I Enable input, logic low turns on power switch IN2-OUT3 EN1 -- 3 I Enable input, logic high turns on power switch IN1-OUT1 EN2 -- 4 I Enable input, logic high turns on power switch IN1-OUT2 EN3 -- 7 I Enable input, logic high turns on power switch IN2-OUT3 GND 1, 5 1, 5 Ground IN1 2 2 I Input voltage for OUT1 and OUT2 IN2 6 6 I Input voltage for OUT3 NC 8, 9, 10 8, 9, 10 No connection OC1 16 16 O Overcurrent, open-drain output, active low, IN1-OUT1 OC2 13 13 O Overcurrent, open-drain output, active low, IN1-OUT2 OC3 12 12 O Overcurrent, open-drain output, active low, IN2-OUT3 OUT1 15 15 O Power-switch output, IN1-OUT1 OUT2 14 14 O Power-switch output, IN1-OUT2 OUT3 11 11 O Power-switch output, IN2-OUT3
I/O DESCRIPTION
SLVS514L –JUNE 2010– REVISED JUNE 2011
TPS2041B, TPS2042B
Copyright © 2010–2011, Texas Instruments Incorporated 7
Thermal
Sense
Driver
Current
Limit
UVLO
CS
Driver
Current
Limit
CS
Thermal
Sense
GND
EN1
IN1
EN2
OC1
OUT1
OUT2
OC2
Deglitch
Deglitch
Driver
Current
Limit
CS
Thermal
Sense
Charge
Pump
GND
IN2
EN3
OUT3
OC3
Deglitch
VCC
Selector
UVLO
(See Note A)
Note A: Current sense Note B: Active low (ENx
) for TPS2043B; Active high (ENx) for TPS2053B
(See Note A)
(See Note A)
(See Note B)
(See Note B)
(See Note B)
TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B TPS2052B, TPS2053B, TPS2054B
SLVS514L –JUNE 2010– REVISED JUNE 2011
Figure 2. Functional Block Diagram (TPS2043B and TPS2053B)
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8 Copyright © 2010–2011, Texas Instruments Incorporated
TPS2043B, TPS2044B, TPS2051B TPS2052B, TPS2053B, TPS2054B
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Terminal Functions (TPS2044B and TPS2054B)
TERMINAL
NAME TPS2044B TPS2054B
EN1 3 - I Enable input, logic low turns on power switch IN1-OUT1 EN2 4 - I Enable input, logic low turns on power switch IN1-OUT2 EN3 7 - I Enable input, logic low turns on power switch IN2-OUT3 EN4 8 - I Enable input, logic low turns on power switch IN2-OUT4 EN1 - 3 I Enable input, logic high turns on power switch IN1-OUT1 EN2 - 4 I Enable input, logic high turns on power switch IN1-OUT2 EN3 - 7 I Enable input, logic high turns on power switch IN2-OUT3 EN4 - 8 I Enable input, logic high turns on power switch IN2-OUT4 GND 1, 5 1, 5 Ground IN1 2 2 I Input voltage for OUT1 and OUT2 IN2 6 6 I Input voltage for OUT3 and OUT4 OC1 16 16 O Overcurrent, open-drain output, active low, IN1-OUT1 OC2 13 13 O Overcurrent, open-drain output, active low, IN1-OUT2 OC3 12 12 O Overcurrent, open-drain output, active low, IN2-OUT3 OC4 9 9 O Overcurrent, open-drain output, active low, IN2-OUT4 OUT1 15 15 O Power-switch output, IN1-OUT1 OUT2 14 14 O Power-switch output, IN1-OUT2 OUT3 11 11 O Power-switch output, IN2-OUT3 OUT4 10 10 O Power-switch output, IN2-OUT4
I/O DESCRIPTION
SLVS514L –JUNE 2010– REVISED JUNE 2011
TPS2041B, TPS2042B
Copyright © 2010–2011, Texas Instruments Incorporated 9
Thermal
Sense
Driver
Current
Limit
UVLO
CS
Driver
Current
Limit
CS
Thermal
Sense
Power Switch
GND
EN1
IN1
EN2
OC1
OUT1
OUT2
OC2
Deglitch
Deglitch
Thermal
Sense
Driver
Current
Limit
UVLO
CS
Driver
Current
Limit
CS
Thermal
Sense
Charge
Pump
Power Switch
GND
EN3
IN2
EN4
OC3
OUT3
OUT4
OC4
Deglitch
Deglitch
VCC
Selector
Note A: Current sense Note B: Active low (ENx
) for TPS2044B; Active high (ENx) for TPS2054B
(See Note A)
(See Note A)
(See Note A)
(See Note A)
(See Note B)
(See Note B)
(See Note B)
(See Note B)
TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B TPS2052B, TPS2053B, TPS2054B
SLVS514L –JUNE 2010– REVISED JUNE 2011
Figure 3. Functional Block Diagram (TPS2044B and TPS2054B)
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10 Copyright © 2010–2011, Texas Instruments Incorporated
R
L
C
L
OUT
t
r
t
f
90%
90%
10%
10%
50%
50%
90%
10%
V
O(OUT)
V
I(EN)
V
O(OUT)
VOLTAGE WAVEFORMS
TEST CIRCUIT
t
on
t
off
50%
50%
90%
10%
V
I(EN)
V
O(OUT)
t
on
t
off
V
I(EN
)
V
I(EN)
5 V/div
V
O(OUT)
2 V/div
RL = 10 W, CL = 1 mF TA = 255C
t − Time − 500 ms/div
V
I(EN
)
V
I(EN)
5 V/div
V
O(OUT)
2 V/div
RL = 10 W, CL = 1 mF TA = 255C
t − Time − 500 ms/div
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TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B TPS2052B, TPS2053B, TPS2054B
SLVS514L –JUNE 2010– REVISED JUNE 2011

PARAMETER MEASUREMENT INFORMATION

Figure 4. Test Circuit and Voltage Waveforms
Figure 5. Turnon Delay and Rise Time With 1-μF Figure 6. Turnoff Delay and Fall Time With 1-μF
Load Load
Copyright © 2010–2011, Texas Instruments Incorporated 11
V
I(EN
)
V
I(EN)
5 V/div
V
O(OUT)
2 V/div
RL = 10 W, CL = 100 mF TA = 255C
t − Time − 500 ms/div
V
O(OUT)
2 V/div
V
I(EN
)
V
I(EN)
5 V/div
RL = 10 W, CL = 100 mF TA = 255C
t − Time − 500 ms/div
220 mF
470 mF
100 mF
VI = 5 V , RL = 10 W, TA = 255C
V
I(EN
)
V
I(EN)
5 V/div
I
O(OUT)
500 mA/div
t − Time − 500 ms/div
V
I(EN
)
V
I(EN)
5 V/div
I
O(OUT)
500 mA/div
t − Time − 500 ms/div
TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B TPS2052B, TPS2053B, TPS2054B
SLVS514L –JUNE 2010– REVISED JUNE 2011
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 7. Turnon Delay and Rise Time With 100-μF Figure 8. Turnoff Delay and Fall Time With 100-μF
Load Load
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Figure 9. Short-Circuit Current, Figure 10. Inrush Current With Different
Device Enabled Into Short Load Capacitance
12 Copyright © 2010–2011, Texas Instruments Incorporated
V
O(OC
)
2 V/div
I
O(OUT)
500 mA/div
t − Time − 2 ms/div
V
O(OC
)
2 V/div
I
O(OUT)
500 mA/div
t − Time − 2 ms/div
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
2 3 4 5 6
Turnon Time − ms
VI − Input Voltage − V
CL = 100 mF, RL = 10 W, TA = 255C
2.8
2.9
3
3.1
3.2
3.3
2 3 4 5 6
Turnoff Time − ms
VI − Input Voltage − V
CL = 100 mF, RL = 10 W, TA = 255C
TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B TPS2052B, TPS2053B, TPS2054B
www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 11. 3-Load Connected to Enabled Device Figure 12. 2-Load Connected to Enabled Device
SLVS514L –JUNE 2010– REVISED JUNE 2011

TYPICAL CHARACTERISTICS

TURNON TIME TURNOFF TIME
vs vs
INPUT VOLTAGE INPUT VOLTAGE
Figure 13. Figure 14.
Copyright © 2010–2011, Texas Instruments Incorporated 13
0
0.1
0.2
0.3
0.4
0.5
0.6
2 3 4 5 6
Rise Time − ms
VI − Input Voltage − V
CL = 1 mF, RL = 10 W, TA = 255C
0
0.05
0.1
0.15
0.2
0.25
2 3 4 5 6
CL = 1 mF, RL = 10 W, TA = 255C
Fall Time − ms
VI − Input Voltage − V
0
10
20
30
40
50
60
−50 0 50 100 150
VI = 5.5 V
VI = 3.3 V
VI = 2.7 V
TJ − Junction Temperature − 5C
− Supply Current, Output Enabled −
I
I (IN)
Aµ
VI = 5 V
0
10
20
30
40
50
60
70
−50 0 50 100 150
VI = 5.5 V
VI = 5 V
VI = 3.3 V
VI = 2.7 V
TJ − Junction Temperature − 5C
− Supply Current, Output Enabled −
I
I (IN)
Aµ
TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B TPS2052B, TPS2053B, TPS2054B
SLVS514L –JUNE 2010– REVISED JUNE 2011
TYPICAL CHARACTERISTICS (continued)
RISE TIME FALL TIME
vs vs
INPUT VOLTAGE INPUT VOLTAGE
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Figure 15. Figure 16.
TPS2041B/2051B TPS2042B/TPS2052B
SUPPLY CURRENT, OUTPUT ENABLED SUPPLY CURRENT, OUTPUT ENABLED
JUNCTION TEMPERATURE JUNCTION TEMPERATURE
14 Copyright © 2010–2011, Texas Instruments Incorporated
Figure 17. Figure 18.
vs vs
0
10
20
30
40
50
60
70
80
90
−50 0 50 100 150
VI = 5.5 V
VI = 5 V
VI = 3.3 V
VI = 2.7 V
TJ − Junction Temperature − 5C
− Supply Current, Output Enabled −
I
I (IN)
Aµ
0
20
40
60
80
100
120
−50 0 50 100 150
VI = 5.5 V
VI = 3.3 V
VI = 2.7 V
TJ − Junction Temperature − 5C
− Supply Current, Output Enabled −
I
I (IN)
Aµ
VI = 5 V
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
−50 0 50 100 150
VI = 5.5 V
VI = 5 V
VI = 3.3 V
VI = 2.7 V
TJ − Junction Temperature − 5C
− Supply Current, Output Disabled −
I
I (IN)
Aµ
TJ − Junction Temperature − 5C
− Supply Current, Output Disabled −I I (IN)
Aµ
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
−50 0 50 100 150
VI = 2.7 V
VI = 3.3 V
VI = 5.5 V
VI = 5 V
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TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B TPS2052B, TPS2053B, TPS2054B
SLVS514L –JUNE 2010– REVISED JUNE 2011
TYPICAL CHARACTERISTICS (continued)
TPS2043B/TPS2053B TPS2044B/2054B
SUPPLY CURRENT, OUTPUT ENABLED SUPPLY CURRENT, OUTPUT ENABLED
vs vs
JUNCTION TEMPERATURE JUNCTION TEMPERATURE
Figure 19. Figure 20.
TPS2041B/2051B TPS2042B/TPS2052B
SUPPLY CURRENT, OUTPUT DISABLED SUPPLY CURRENT, OUTPUT DISABLED
JUNCTION TEMPERATURE JUNCTION TEMPERATURE
Copyright © 2010–2011, Texas Instruments Incorporated 15
Figure 21. Figure 22.
vs vs
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
−50 0 50 100 150
VI = 5.5 V
VI = 5 V
VI = 2.7 V
TJ − Junction Temperature − 5C
− Supply Current, Output Disabled −
I
I (IN)
Aµ
VI = 3.3 V
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
−50 0 50 100 150
VI = 5.5 V
VI = 5 V
VI = 2.7 V
TJ − Junction Temperature − 5C
− Supply Current, Output Disabled −I
I (IN)
Aµ
VI = 3.3 V
0.9
0.92
0.94
0.96
0.98
1.0
1.02
1.04
1.06
1.08
−50 0 50 100 150
VI = 5 V
VI = 3.3 V
VI = 5.5 V
TJ − Junction Temperature − 5C
VI = 2.7 V
− Short-Circuit Output Current − A I
OS
0
20
40
60
80
100
120
−50 0 50 100 150
VI = 5 V
VI = 3.3 V
TJ − Junction Temperature − 5C
r
DS(on) − Static Drain-Source On-State Resistance − m
VI = 2.7 V
IO = 0.5 A
TPS2041B, TPS2042B TPS2043B, TPS2044B, TPS2051B TPS2052B, TPS2053B, TPS2054B
SLVS514L –JUNE 2010– REVISED JUNE 2011
TYPICAL CHARACTERISTICS (continued)
TPS2043B/TPS2053B TPS2044B/2054B
SUPPLY CURRENT, OUTPUT DISABLED SUPPLY CURRENT, OUTPUT DISABLED
vs vs
JUNCTION TEMPERATURE JUNCTION TEMPERATURE
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Figure 23. Figure 24.
STATIC DRAIN-SOURCE ON-STATE RESISTANCE SHORT-CIRCUIT OUTPUT CURRENT
JUNCTION TEMPERATURE JUNCTION TEMPERATURE
16 Copyright © 2010–2011, Texas Instruments Incorporated
Figure 25. Figure 26.
vs vs
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