TEXAS INSTRUMENTS TPS2041B, TPS2042B, TPS2043B, TPS2044B, TPS2051B Technical data

...

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DGN−8

D−16

D−8

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1 2 3 4 5 6 7 8

16 15 14 13 12 11 10

GND

IN2

EN3

†

OC3 OUT3 NC NC

1 2 3 4

8 7 6 5

GND

IN IN

†

OUT OUT OUT OC

TPS2041B/TPS2051B

D AND DGN PACKAGES

(TOP VIEW)

1 2 3 4

8 7 6 5

GND

EN1

†

EN2

†

OC1 OUT1 OUT2 OC2

TPS2042B/TPS2052B

D AND DGN PACKAGES

(TOP VIEW)

OC1 OUT1 OUT2 OC2

GND

IN1

EN1

†

EN2

†

1 2 3 4 5 6 7 8

16 15 14 13 12 11 10

GND

IN2

EN3

†

EN4

†

OC3 OUT3 OUT4 OC4

OC1 OUT1 OUT2 OC2

GND

IN1

EN1

†

EN2

†

NC − No connect

†

All enable inputs are active high for the TPS205xB series.

TPS2044B/TPS2054B

D PACKAGE

(TOP VIEW)

TPS2043B/TPS2053B

D PACKAGE

(TOP VIEW)

TPS201xA TPS202x TPS203x

33 mΩ, single

0.2 A − 2 A

TPS2014 TPS2015 TPS2041B TPS2051B TPS2045 TPS2055 TPS2061 TPS2065

80 mΩ, single

600 mA 1 A 500 mA 500 mA 250 mA 250 mA 1 A 1 A

GENERAL SWITCH CA TALOG

TPS2042B TPS2052B TPS2046 TPS2056 TPS2062 TPS2066

80 mΩ , dual

500 mA 500 mA 250 mA 250 mA 1 A 1 A

TPS2100/1

260 mΩ

IN1 500 mA IN2 10 mA

OUT

IN1 IN2

TPS2102/3/4/5

IN1 500 mA IN2 100 mA

1.3 Ω

TPS2043B TPS2053B TPS2047 TPS2057

80 mΩ, triple

500 mA 500 mA 250 mA 250 mA

TPS2044B TPS2054B TPS2048 TPS2058

80 mΩ, quad

500 mA 500 mA 250 mA 250 mA

80 mΩ, dual

TPS2080 TPS2081 TPS2082 TPS2090

500 mA 500 mA 500 mA

250 mA TPS2091 TPS2092

250 mA

80 mΩ, quad

TPS2085 TPS2086 TPS2087 TPS2095

500 mA 500 mA 500 mA

250 mA TPS2096 TPS2097

250 mA

查询TPS2041B供应商

CURRENT-LIMITED, POWER-DISTRIBUTION SWITCHES

FEATURES APPLICATIONS

• 70-m Ω High-Side MOSFET

• 500-mA Continuous Current

• Thermal and Short-Circuit Protection

• Accurate Current Limit

(0.75 A min, 1.25 A max)

• Operating Range: 2.7 V to 5.5 V

• 0.6-ms Typical Rise Time

• Undervoltage Lockout

• Deglitched Fault Report ( OC)

• No OC Glitch During Power Up

• Maximum Standby Supply Current:

1-µA (Single, Dual) or 2-µA (Triple, Quad)

• Bidirectional Switch

• Ambient Temperature Range: -40°C to 85°C

• ESD Protection

• UL Recognized, File Number E169910

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

• Heavy Capacitive Loads

• Short-Circuit Protections

DESCRIPTION

The TPS204xB/TPS205xB power-distribution switches are intended for applications where heavy capacitive loads and short circuits are likely to be encountered. These devices incorporates 70-m Ω N-channel MOSFET power switches for power-distribution systems that require multiple power switches in a single package. Each switch is controlled by a logic enable input. Gate drive is provided by an internal charge pump designed to control the power-switch rise times and fall times to minimize current surges during switching. The charge pump requires no external components and allows operation from supplies as low as 2.7 V.

When the output load exceeds the current-limit threshold or a short is present, the device limits the output current to a safe level by switching into a constant-current mode, pulling the overcurrent ( OCx) logic output low. When continuous heavy overloads and short-circuits increase the power dissipation in the switch, causing the junction temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from a thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures that the switch remains off until valid input voltage is present. This power-distribution switch is designed to set current limit at 1 A typically.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

AVAILABLE OPTION AND ORDERING INFORMATION

RECOMMENDED TYPICAL PACKAGED DEVICES

ENABLE

Active low Single TPS2041BDGN TPS2041BD

Active high Single TPS2051BDGN TPS2051BD

Active low Dual TPS2042BDGN TPS2042BD

-40°C to 85°C 0.5 A 1 A

Active high Dual TPS2052BDGN TPS2052BD

Active low Triple -- TPS2043BD

Active high Triple -- TPS2053BD

Active low Quad -- TPS2044BD

Active high Quad -- TPS2054BD

(1) The package is available taped and reeled. Add an R suffix to device types (e.g., TPS2042BDR)

MAXIMUM SHORT-CIRCUIT NUMBER OF

CONTINUOUS CURRENT LIMIT SWITCHES

LOAD CURRENT AT 25°c

(1)

MSOP (DGN) SOIC (D)

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted

Input voltage range, V Output voltage range, V Input voltage range, V Voltage range, V

I(IN)

O(OUT)

I( EN)

, V

I(/OC)

Continuous output current, I Continuous total power dissipation See Dissipation Rating Table Operating virtual junction temperature range, T Storage temperature range, T Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds 260°C

Electrostatic discharge (ESD) protection

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltages are with respect to GND.

, V

I( OCx)

(2)

I(INx)

, V

I( ENx)

O(OUT)

stg

(2)

O(OUTx)

, V

I(EN)

I(ENx)

, I

O(OUTx)

Human body model MIL-STD-883C 2 kV Charge device model (CDM) 500 V

(1)

UNIT

-0.3 V to 6 V

Internally limited

-40°C to 125°C

-65°C to 150°C

DISSIPATING RATING TABLE

PACKAGE

DGN-8 1712.3 mW 17.123 mW/°C 941.78 mW 684.93 mW

D-8 585.82 mW 5.8582 mW/°C 322.20 mW 234.32 mW

D-16 898.47 mW 8.9847 mW 494.15 mW 359.38 mW

TA≤ 25°C DERATING FACTOR TA= 70°C TA= 85°C

POWER RATING ABOVE TA= 25°C POWER RATING POWER RATING

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TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

RECOMMENDED OPERATING CONDITIONS

MIN MAX UNIT

Input voltage, V Input voltage, V Continuous output current, I Operating virtual junction temperature, T

ELECTRICAL CHARACTERISTICS

over recommended operating junction temperature range, V

POWER SWITCH

Static drain-source on-state resistance, 5-V operation V and 3.3-V operation

DS(on)

Static drain-source on-state resistance, 2.7-V V operation

(2)

Rise time, output

(2)

Fall time, output

ENABLE INPUT EN AND ENx

High-level input voltage 2.7 V ≤ V

Low-level input voltage 2.7 V ≤ V

Input current V

(2)

Turnon time CL= 100 µF, RL= 10 Ω 3

(2)

Turnoff time CL= 100 µF, RL= 10 Ω 10

off

CURRENT LIMIT

Short-circuit output current A

SUPPLY CURRENT (TPS2041B, TPS2051B)

Supply current, low-level output µA

Supply current, high-level output µA

Leakage current -40°C ≤ TJ≤ 125°C 1 µA Reverse leakage current V

SUPPLY CURRENT (TPS2042B, TPS2052B)

Supply current, low-level output No load on OUT, V

Supply current, high-level output No load on OUT, V

Leakage current OUT connected to ground, V Reverse leakage current V

(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account

separately.

(2) Not tested in production, specified by design.

, V

I(IN)

I(INx)

, V

I( EN)

I( ENx)

, V

I(EN)

I(ENx)

, I

O(OUT)

O(OUTx)

PARAMETER TEST CONDITIONS

= 5 V or 3.3 V, IO= 0.5 A -40°C ≤ TJ≤ 125°C 70 135 m Ω

I(IN)

= 2.7 V, IO= 0.5 A -40°C ≤ TJ≤ 125°C 75 150 m Ω

(2)

I(IN)

= 5.5 V 0.6 1.5

I(IN)

= 2.7 V 0.4 1

I(IN)

= 5.5 V 0.05 0.5

I(IN)

= 2.7 V 0.05 0.5

I(IN)

≤ 5.5 V 2

I(IN)

≤ 5.5 V 0.8

I(IN)

= 0 V or 5.5 V -0.5 0.5 µA

I( ENx)

= 5 V, OUT connected to GND,

I(IN)

device enabled into short-circuit

No load on OUT, V or V

= 0 V

I(ENx)

No load on OUT, V or V

= 5.5 V

I(ENx)

OUT connected to ground, V or V

= 0 V

I(ENx)

= 5.5 V, IN = ground

I(OUTx)

= 5.5 V, IN = ground

I(OUTx)

2.7 5.5 V 0 5.5 V 0 500 mA

-40 125 °C

= 5.5 V, IO= 0.5 A, V

I(IN)

CL= 1 µF, RL= 10 Ω

(1)

TJ= 25°C ms

= 0 V (unless otherwise noted)

I(/ENx)

MIN TYP MAX UNIT

TJ= 25°C 0.75 1 1.25

-40°C ≤ TJ≤ 125°C 0.7 1 1.3

I( ENx)

= 5.5 V,

TJ= 25°C 0.5 1

-40°C ≤ TJ≤ 125°C 0.5 5

I( ENx)

= 0 V,

TJ= 25°C 43 60

-40°C ≤ TJ≤ 125°C 43 70

= 5.5 V,

I( ENx)

(2)

= 5.5 V µA

I( ENx)

= 0 V µA

I( ENx)

= 5.5 V -40°C ≤ TJ≤ 125°C 1 µA

I( ENx) (2)

TJ= 25°C 0 µA

TJ= 25°C 0.5 1

-40°C ≤ TJ≤ 125°C 0.5 5 TJ= 25°C 50 70

-40°C ≤ TJ≤ 125°C 50 90

TJ= 25°C 0.2 µA

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TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

ELECTRICAL CHARACTERISTICS (continued)

over recommended operating junction temperature range, V

PARAMETER TEST CONDITIONS

SUPPLY CURRENT (TPS2043B, TPS2053B)

Supply current, low-level output No load on OUT, V

Supply current, high-level output No load on OUT, V

Leakage current OUT connected to ground, V Reverse leakage current V

= 5.5 V, INx = ground

I(OUTx)

SUPPLY CURRENT (TPS2044B, TPS2054B)

Supply current, low-level output µA

Supply current, high-level output µA

Leakage current -40°C ≤ TJ≤ 125°C 1 µA Reverse leakage current V

No load on OUT, V or V

= 0 V

I(ENx)

No load on OUT, V or V

= 5.5 V

I(ENx)

OUT connected to ground, V or V

= 0 V

I(ENx)

= 5.5 V, INx = ground

I(OUTx)

UNDERVOLTAGE LOCKOUT

Low-level input voltage, IN, INx 2 2.5 V Hysteresis, IN, INx TJ= 25°C 75 mV

OVERCURRENT OC and OCx

Output low voltage, V Off-state current OC deglitch

(3)

THERMAL SHUTDOWN

Thermal shutdown threshold Recovery from thermal shutdown Hysteresis

(3)

OL(/OCx)

(3)

(4)

(3)

= 5 mA 0.4 V

O( OCx)

= 5 V or 3.3 V 1 µA

O( OCx)

OCx assertion or deassertion 4 8 15 ms

(3)

I(ENx)

I( ENx)

= 5.5 V, IO= 0.5 A, V

I(IN)

(1)

= 0 V µA

= 5.5 V µA

= 0 V -40°C ≤ TJ≤ 125°C 1 µA

I(ENx)

(3)

= 5.5 V,

TJ= 25°C 0.5 2

-40°C ≤ TJ≤ 125°C 0.5 10 TJ= 25°C 65 90

-40°C ≤ TJ≤ 125°C 65 110

TJ= 25°C 0.2 µA

TJ= 25°C 0.5 2

= 0 V (unless otherwise noted)

I(/ENx)

MIN TYP MAX UNIT

-40°C ≤ TJ≤ 125°C 0.5 10

= 0 V,

TJ= 25°C 75 110

-40°C ≤ TJ≤ 125°C 75 140

= 5.5 V,

I( ENx)

(3)

TJ= 25°C 0.2 µA

135 °C 125 °C

10 °C

(3) Not tested in production, specified by design. (4) The thermal shutdown only reacts under overcurrent conditions.

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DEVICE INFORMATION

OUT

GND

Current

Limit

Driver

UVLO

Charge

Pump

Thermal

Sense

Deglitch

Note A: Current sense Note B: Active low (EN

) for TPS2041B; Active high (EN) for TPS2051B

(See Note A)

(See Note B)

Terminal Functions (TPS2041B and TPS2051B)

TERMINAL

NAME TPS2041B TPS2051B

EN 4 - I Enable input, logic low turns on power switch EN - 4 I Enable input, logic high turns on power switch GND 1 1 Ground IN 2, 3 2, 3 I Input voltage OC 5 5 O Overcurrent open-drain output, active-low OUT 6, 7, 8 6, 7, 8 O Power-switch output

Functional Block Diagram (TPS2041B and TPS2051B)

I/O DESCRIPTION

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

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Thermal

Sense

Driver

Current

Limit

Charge

Pump

UVLO

Driver

Current

Limit

Thermal

Sense

Charge

Pump

GND

EN1

EN2

OC1

OUT1

OUT2

OC2

Deglitch

(See Note A)

(See Note B)

Note A: Current sense Note B: Active low (ENx

) for TPS2042B; Active high (ENx) for TPS2052B

(See Note B)

(See Note A)

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

Terminal Functions (TPS2042B and TPS2052B)

TERMINAL

NAME TPS2042B TPS2052B

EN1 3 - I Enable input, logic low turns on power switch IN-OUT1 EN2 4 - I Enable input, logic low turns on power switch IN-OUT2 EN1 - 3 I Enable input, logic high turns on power switch IN-OUT1 EN2 - 4 I Enable input, logic high turns on power switch IN-OUT2 GND 1 1 Ground IN 2 2 I Input voltage OC1 8 8 O Overcurrent, open-drain output, active low, IN-OUT1 OC2 5 5 O Overcurrent, open-drain output, active low, IN-OUT2 OUT1 7 7 O Power-switch output, IN-OUT1 OUT2 6 6 O Power-switch output, IN-OUT2

Functional Block Diagram (TPS2042B and TPS2052B)

I/O DESCRIPTION

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TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

Terminal Functions (TPS2043B and TPS2053B)

TERMINAL

NAME TPS2043B TPS2053B

EN1 3 -- I Enable input, logic low turns on power switch IN1-OUT1 EN2 4 -- I Enable input, logic low turns on power switch IN1-OUT2 EN3 7 -- I Enable input, logic low turns on power switch IN2-OUT3 EN1 -- 3 I Enable input, logic high turns on power switch IN1-OUT1 EN2 -- 4 I Enable input, logic high turns on power switch IN1-OUT2 EN3 -- 7 I Enable input, logic high turns on power switch IN2-OUT3 GND 1, 5 1, 5 Ground IN1 2 2 I Input voltage for OUT1 and OUT2 IN2 6 6 I Input voltage for OUT3 NC 8, 9, 10 8, 9, 10 No connection OC1 16 16 O Overcurrent, open-drain output, active low, IN1-OUT1 OC2 13 13 O Overcurrent, open-drain output, active low, IN1-OUT2 OC3 12 12 O Overcurrent, open-drain output, active low, IN2-OUT3 OUT1 15 15 O Power-switch output, IN1-OUT1 OUT2 14 14 O Power-switch output, IN1-OUT2 OUT3 11 11 O Power-switch output, IN2-OUT3

I/O DESCRIPTION

TPS2041B , , TPS2042B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

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Thermal

Sense

Driver

Current

Limit

UVLO

Driver

Current

Limit

Thermal

Sense

GND

EN1

IN1

EN2

OC1

OUT1

OUT2

OC2

Deglitch

Driver

Current

Limit

Thermal

Sense

Charge

Pump

GND

IN2

EN3

OUT3

OC3

Deglitch

VCC

Selector

UVLO

(See Note A)

Note A: Current sense Note B: Active low (ENx

) for TPS2043B; Active high (ENx) for TPS2053B

(See Note A)

(See Note B)

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

Functional Block Diagram (TPS2043B and TPS2053B)

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TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

Terminal Functions (TPS2044B and TPS2054B)

TERMINAL

NAME TPS2044B TPS2054B

EN1 3 - I Enable input, logic low turns on power switch IN1-OUT1 EN2 4 - I Enable input, logic low turns on power switch IN1-OUT2 EN3 7 - I Enable input, logic low turns on power switch IN2-OUT3 EN4 8 - I Enable input, logic low turns on power switch IN2-OUT4 EN1 - 3 I Enable input, logic high turns on power switch IN1-OUT1 EN2 - 4 I Enable input, logic high turns on power switch IN1-OUT2 EN3 - 7 I Enable input, logic high turns on power switch IN2-OUT3 EN4 - 8 I Enable input, logic high turns on power switch IN2-OUT4 GND 1, 5 1, 5 Ground IN1 2 2 I Input voltage for OUT1 and OUT2 IN2 6 6 I Input voltage for OUT3 and OUT4 OC1 16 16 O Overcurrent, open-drain output, active low, IN1-OUT1 OC2 13 13 O Overcurrent, open-drain output, active low, IN1-OUT2 OC3 12 12 O Overcurrent, open-drain output, active low, IN2-OUT3 OC4 9 9 O Overcurrent, open-drain output, active low, IN2-OUT4 OUT1 15 15 O Power-switch output, IN1-OUT1 OUT2 14 14 O Power-switch output, IN1-OUT2 OUT3 11 11 O Power-switch output, IN2-OUT3 OUT4 10 10 O Power-switch output, IN2-OUT4

I/O DESCRIPTION

TPS2041B , , TPS2042B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

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Thermal

Sense

Driver

Current

Limit

UVLO

Driver

Current

Limit

Thermal

Sense

Power Switch

GND

EN1

IN1

EN2

OC1

OUT1

OUT2

OC2

Deglitch

Thermal

Sense

Driver

Current

Limit

UVLO

Driver

Current

Limit

Thermal

Sense

Charge

Pump

Power Switch

GND

EN3

IN2

EN4

OC3

OUT3

OUT4

OC4

Deglitch

VCC

Selector

Note A: Current sense Note B: Active low (ENx

) for TPS2044B; Active high (ENx) for TPS2054B

(See Note A)

(See Note B)

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

Functional Block Diagram (TPS2044B and TPS2054B)

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PARAMETER MEASUREMENT INFORMATION

OUT

90%

10%

50%

90%

10%

O(OUT)

I(EN)

O(OUT)

VOLTAGE WAVEFORMS

TEST CIRCUIT

off

50%

90%

10%

I(EN)

O(OUT)

off

I(EN)

5 V/div

O(OUT)

2 V/div

RL = 10 , CL = 1 F TA = 25C

t − Time − 500 s/div

I(EN)

5 V/div

O(OUT)

2 V/div

RL = 10 , CL = 1 F TA = 25C

t − Time − 500 s/div

Figure 1. Test Circuit and Voltage Waveforms

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

Figure 2. Turnon Delay and Rise Time With 1-µF Load Figure 3. Turnoff Delay and Fall Time With 1-µF Load

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I(EN)

5 V/div

O(OUT)

2 V/div

RL = 10 , CL = 100 F TA = 25C

t − Time − 500 s/div

O(OUT)

2 V/div

I(EN)

5 V/div

RL = 10 , CL = 100 F TA = 25C

t − Time − 500 s/div

220 F

470 F

100 F

VI = 5 V , RL = 10 , TA = 25C

I(EN)

5 V/div

O(OUT)

500 mA/div

t − Time − 500 s/div

I(EN)

5 V/div

O(OUT)

500 mA/div

t − Time − 500 s/div

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

PARAMETER MEASUREMENT INFORMATION (continued)

Figure 4. Turnon Delay and Rise Time With 100-µF Load Figure 5. Turnoff Delay and Fall Time With 100-µF Load

Figure 6. Short-Circuit Current, Figure 7. Inrush Current With Different

Device Enabled Into Short Load Capacitance

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O(OC)

2 V/div

O(OUT)

500 mA/div

t − Time − 2 ms/div

O(OC)

2 V/div

O(OUT)

500 mA/div

t − Time − 2 ms/div

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

2 3 4 5 6

Turnon Time − ms

VI − Input Voltage − V

CL = 100 F, RL = 10 , TA = 25C

2.8

2.9

3.1

3.2

3.3

2 3 4 5 6

Turnoff Time − ms

VI − Input Voltage − V

CL = 100 F, RL = 10 , TA = 25C

PARAMETER MEASUREMENT INFORMATION (continued)

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

Figure 8. 3- Ω Load Connected to Enabled Device Figure 9. 2- Ω Load Connected to Enabled Device

TYPICAL CHARACTERISTICS

TURNON TIME TURNOFF TIME

vs vs

INPUT VOLTAGE INPUT VOLTAGE

Figure 10. Figure 11.

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0.1

0.2

0.3

0.4

0.5

0.6

2 3 4 5 6

Rise Time − ms

VI − Input Voltage − V

CL = 1 F, RL = 10 , TA = 25C

0.05

0.1

0.15

0.2

0.25

2 3 4 5 6

CL = 1 F, RL = 10 , TA = 25C

Fall Time − ms

VI − Input Voltage − V

−50 0 50 100 150

VI = 5.5 V

VI = 3.3 V

VI = 2.7 V

TJ − Junction Temperature − C

− Supply Current, Output Enabled −

I (IN)

Aµ

VI = 5 V

−50 0 50 100 150

VI = 5.5 V

VI = 5 V

VI = 3.3 V

VI = 2.7 V

TJ − Junction Temperature − C

− Supply Current, Output Enabled −

I (IN)

Aµ

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

RISE TIME FALL TIME

INPUT VOLTAGE INPUT VOLTAGE

TYPICAL CHARACTERISTICS (continued)

vs vs

Figure 12. Figure 13.

SUPPLY CURRENT, OUTPUT ENABLED SUPPLY CURRENT, OUTPUT ENABLED

TPS2041B/2051B TPS2042B/TPS2052B

JUNCTION TEMPERATURE JUNCTION TEMPERATURE

Figure 14. Figure 15.

vs vs

www.ti.com

−50 0 50 100 150

VI = 5.5 V

VI = 5 V

VI = 3.3 V

VI = 2.7 V

TJ − Junction Temperature − C

− Supply Current, Output Enabled −

I (IN)

Aµ

100

120

−50 0 50 100 150

VI = 5.5 V

VI = 3.3 V

VI = 2.7 V

TJ − Junction Temperature − C

− Supply Current, Output Enabled −

I (IN)

Aµ

VI = 5 V

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

−50 0 50 100 150

VI = 5.5 V

VI = 5 V

VI = 3.3 V

VI = 2.7 V

TJ − Junction Temperature − C

− Supply Current, Output Disabled −

I (IN)

Aµ

TJ − Junction Temperature − C

− Supply Current, Output Disabled −I I (IN)

Aµ

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

−50 0 50 100 150

VI = 2.7 V

VI = 3.3 V

VI = 5.5 V

VI = 5 V

TYPICAL CHARACTERISTICS (continued)

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

SUPPLY CURRENT, OUTPUT ENABLED SUPPLY CURRENT, OUTPUT ENABLED

SUPPLY CURRENT, OUTPUT DISABLED SUPPLY CURRENT, OUTPUT DISABLED

TPS2043B/TPS2053B TPS2044B/2054B

vs vs

JUNCTION TEMPERATURE JUNCTION TEMPERATURE

Figure 16. Figure 17.

TPS2041B/2051B TPS2042B/TPS2052B

vs vs

JUNCTION TEMPERATURE JUNCTION TEMPERATURE

Figure 18. Figure 19.

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0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

−50 0 50 100 150

VI = 5.5 V

VI = 5 V

VI = 2.7 V

TJ − Junction Temperature − C

− Supply Current, Output Disabled −

I (IN)

Aµ

VI = 3.3 V

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

−50 0 50 100 150

VI = 5.5 V

VI = 5 V

VI = 2.7 V

TJ − Junction Temperature − C

− Supply Current, Output Disabled −I

I (IN)

Aµ

VI = 3.3 V

0.9

0.92

0.94

0.96

0.98

1.0

1.02

1.04

1.06

1.08

−50 0 50 100 150

VI = 5 V

VI = 3.3 V

VI = 5.5 V

TJ − Junction Temperature − C

VI = 2.7 V

− Short-Circuit Output Current − A I

100

120

−50 0 50 100 150

VI = 5 V

VI = 3.3 V

TJ − Junction Temperature − C

DS(on) − Static Drain-Source On-State Resistance − m

Ω

VI = 2.7 V

IO = 0.5 A

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

TYPICAL CHARACTERISTICS (continued)

SUPPLY CURRENT, OUTPUT DISABLED SUPPLY CURRENT, OUTPUT DISABLED

STATIC DRAIN-SOURCE ON-STATE RESISTANCE SHORT-CIRCUIT OUTPUT CURRENT

TPS2043B/TPS2053B TPS2044B/2054B

vs vs

JUNCTION TEMPERATURE JUNCTION TEMPERATURE

Figure 20. Figure 21.

vs vs

JUNCTION TEMPERATURE JUNCTION TEMPERATURE

Figure 22. Figure 23.

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1.2

1.4

1.6

1.8

2.5 3 3.5 4 4.5 5 5.5 6

TA = 25C Load Ramp = 1A/10 ms

Threshold Trip Current − A

VI − Input Voltage − V

TPS2043B, TPS2044B, TPS2053B, TPS2054B

Threshold Trip Current − A

VI − Input Voltage − V

1.2

1.4

1.6

1.8

2.5 3 3.5 4 4.5 5 5.5 6

TA = 25C Load Ramp = 1A/10 ms

TPS2041B, TPS2042B, TPS2051B, TPS2052B

100

0 2.5 5 7.5 10 12.5

Peak Current − A

VI = 5 V , TA = 25C

Current-Limit Response − sµ

2.1

2.14

2.18

2.22

2.26

2.3

−50 0 50 100 150

UVLO Rising

UVLO Falling

UVLO − Undervoltage Lockout − V

TJ − Junction Temperature − C

TYPICAL CHARACTERISTICS (continued)

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

THRESHOLD TRIP CURRENT THRESHOLD TRIP CURRENT

UNDERVOLTAGE LOCKOUT CURRENT-LIMIT RESPONSE

JUNCTION TEMPERATURE PEAK CURRENT

vs vs

INPUT VOLTAGE INPUT VOLTAGE

Figure 24. Figure 25.

vs vs

Figure 26. Figure 27.

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OC1 EN1 OC2

0.1 µF 22 µF

Load

OUT1

OUT2

Power Supply

2.7 V to 5.5 V

EN2

GND

0.1 µF

TPS2042B

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

APPLICATION INFORMATION

POWER-SUPPLY CONSIDERATIONS

Figure 28. Typical Application (Example, TPS2042B)

A 0.01-µF to 0.1-µF ceramic bypass capacitor between IN and GND, close to the device, is recommended. Placing a high-value electrolytic capacitor on the output pin(s) is recommended when the output load is heavy. This precaution reduces power-supply transients that may cause ringing on the input. Additionally, bypassing the output with a 0.01-µF to 0.1-µF ceramic capacitor improves the immunity of the device to short-circuit transients.

OVERCURRENT

A sense FET is employed to check for overcurrent conditions. Unlike current-sense resistors, sense FETs do not increase the series resistance of the current path. When an overcurrent condition is detected, the device maintains a constant output current and reduces the output voltage accordingly. Complete shutdown occurs only if the fault is present long enough to activate thermal limiting.

Three possible overload conditions can occur. In the first condition, the output has been shorted before the device is enabled or before V

has been applied (see Figure 14 through Figure 17 ). The TPS204xB/TPS205xB

I(IN)

senses the short and immediately switches into a constant-current output. In the second condition, a short or an overload occurs while the device is enabled. At the instant the overload

occurs, high currents may flow for a short period of time before the current-limit circuit can react. After the current-limit circuit has tripped (reached the overcurrent trip threshold), the device switches into constant-current mode.

In the third condition, the load has been gradually increased beyond the recommended operating current. The current is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device is exceeded (see Figure 18 through Figure 21 ). The TPS204xB/TPS205xB is capable of delivering current up to the current-limit threshold without damaging the device. Once the threshold has been reached, the device switches into its constant-current mode.

OC RESPONSE

The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature shutdown condition is encountered after a 10-ms deglitch timeout. The output remains asserted until the overcurrent or overtemperature condition is removed. Connecting a heavy capacitive load to an enabled device can cause a momentary overcurrent condition; however, no false reporting on OCx occurs due to the 10-ms deglitch circuit. The TPS204xB/TPS205xB is designed to eliminate false overcurrent reporting. The internal overcurrent deglitch eliminates the need for external components to remove unwanted pulses. OCx is not deglitched when the switch is turned off due to an overtemperature shutdown.

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GND IN EN1

EN2

OC1

OC2

OUT1 OUT2

TPS2042B

pullup

V+

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

APPLICATION INFORMATION (continued)

Figure 29. Typical Circuit for the OC Pin (Example, TPS2042B)

POWER DISSIPATION AND JUNCTION TEMPERATURE

The low on-resistance on the N-channel MOSFET allows the small surface-mount packages to pass large currents. The thermal resistances of these packages are high compared to those of power packages; it is good design practice to check power dissipation and junction temperature. Begin by determining the r N-channel MOSFET relative to the input voltage and operating temperature. As an initial estimate, use the highest operating ambient temperature of interest and read r

from Figure 22 . Using this value, the power

DS(on)

dissipation per switch can be calculated by:

• P

= r

DS(on)

× I

Multiply this number by the number of switches being used. This step renders the total power dissipation from the N-channel MOSFETs.

Finally, calculate the junction temperature:

• TJ= P

x R

+ T

Θ JA

Where:

• TA= Ambient temperature °C

• R

• P

= Thermal resistance

Θ JA

= Total power dissipation based on number of switches being used.

Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees, repeat the calculation, using the calculated value as the new estimate. Two or three iterations are generally sufficient to get a reasonable answer.

DS(on)

of the

THERMAL PROTECTION

Thermal protection prevents damage to the IC when heavy-overload or short-circuit faults are present for extended periods of time. The TPS204xB/TPS205xB implements a thermal sensing to monitor the operating junction temperature of the power distribution switch. In an overcurrent or short-circuit condition, the junction temperature rises due to excessive power dissipation. Once the die temperature rises to approximately 140°C due to overcurrent conditions, the internal thermal sense circuitry turns the power switch off, thus preventing the power switch from damage. Hysteresis is built into the thermal sense circuit, and after the device has cooled approximately 10°C, the switch turns back on. The switch continues to cycle in this manner until the load fault or input power is removed. The OCx open-drain output is asserted (active low) when an overtemperature shutdown or overcurrent occurs.

UNDERVOLTAGE LOCKOUT (UVLO)

An undervoltage lockout ensures that the power switch is in the off state at power up. Whenever the input voltage falls below approximately 2 V, the power switch is quickly turned off. This facilitates the design of hot-insertion systems where it is not possible to turn off the power switch before input power is removed. The UVLO also keeps the switch from being turned on until the power supply has reached at least 2 V, even if the switch is enabled. On reinsertion, the power switch is turned on, with a controlled rise time to reduce EMI and voltage overshoots.

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OC EN

GND

0.1 µF

2, 3

5 4

6, 7, 8

0.1 µF 120 µF

GND

OUT

TPS2041B

Power Supply

D+ D−

BUS

Downstream

USB Ports

USB

Control

3.3 V 5 V

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

APPLICATION INFORMATION (continued)

UNIVERSAL SERIAL BUS (USB) APPLICATIONS

The universal serial bus (USB) interface is a 12-Mb/s, or 1.5-Mb/s, multiplexed serial bus designed for low-to-medium bandwidth PC peripherals (e.g., keyboards, printers, scanners, and mice). The four-wire USB interface is conceived for dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided for differential data, and two lines are provided for 5-V power distribution.

USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where power is distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 V from the 5-V input or its own internal power supply.

The USB specification defines the following five classes of devices, each differentiated by power-consumption requirements:

• Hosts/self-powered hubs (SPH)

• Bus-powered hubs (BPH)

• Low-power, bus-powered functions

• High-power, bus-powered functions

• Self-powered functions

Self-powered and bus-powered hubs distribute data and power to downstream functions. The TPS204xB/TPS205xB can provide-power distribution solutions to many of these classes of devices.

HOST/SELF-POWERED AND BUS-POWERED HUBS

Hosts and self-powered hubs have a local power supply that powers the embedded functions and the downstream ports (see Figure 30 and Figure 31 ). This power supply must provide from 5.25 V to 4.75 V to the board side of the downstream connection under full-load and no-load conditions. Hosts and SPHs are required to have current-limit protection and must report overcurrent conditions to the USB controller. Typical SPHs are desktop PCs, monitors, printers, and stand-alone hubs.

Figure 30. Typical One-Port USB Host / Self-Powered Hub

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IN1

OC1 EN1 OC2 EN2

GND

0.1 µF

33 µF

GND

OUT1

OUT2

TPS2044B

Power Supply

D+ D−

BUS

GND

D+ D−

BUS

Downstream

USB Ports

USB

Controller

3.3 V 5 V

OC3 EN3 OC4 EN4

7 9

IN2

GND

33 µF

GND

OUT3

OUT4

D+ D−

BUS

GND

D+ D−

BUS

APPLICATION INFORMATION (continued)

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

Figure 31. Typical Four-Port USB Host / Self-Powered Hub

Bus-powered hubs obtain all power from upstream ports and often contain an embedded function. The hubs are required to power up with less than one unit load. The BPH usually has one embedded function, and power is always available to the controller of the hub. If the embedded function and hub require more than 100 mA on power up, the power to the embedded function may need to be kept off until enumeration is completed. This can be accomplished by removing power or by shutting off the clock to the embedded function. Power switching the embedded function is not necessary if the aggregate power draw for the function and controller is less than one unit load. The total current drawn by the bus-powered device is the sum of the current to the controller, the embedded function, and the downstream ports, and it is limited to 500 mA from an upstream port.

LOW-POWER BUS-POWERED AND HIGH-POWER BUS-POWERED FUNCTIONS

Both low-power and high-power bus-powered functions obtain all power from upstream ports; low-power functions always draw less than 100 mA; high-power functions must draw less than 100 mA at power up and can draw up to 500 mA after enumeration. If the load of the function is more than the parallel combination of 44 Ω and 10 µF at power up, the device must implement inrush current limiting (see Figure 32 ).

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OC1

OC2

8 3

5 4

0.1 µF 10 µF

Internal

Function

OUT1

Power Supply

3.3 V

EN1

0.1 µF 10 µF

OUT2

Internal

Function

0.1 µF

10 µF

USB

Control

GND

BUS

D−

D+

EN2

GND

TPS2042B

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

APPLICATION INFORMATION (continued)

Figure 32. High-Power Bus-Powered Function (Example, TPS2042B)

USB POWER-DISTRIBUTION REQUIREMENTS

USB can be implemented in several ways, and, regardless of the type of USB device being developed, several power-distribution features must be implemented.

• Hosts/self-powered hubs must: – Current-limit downstream ports – Report overcurrent conditions on USB V

• Bus-powered hubs must: – Enable/disable power to downstream ports – Power up at <100 mA – Limit inrush current (<44 Ω and 10 µF)

• Functions must: – Limit inrush currents – Power up at <100 mA

The feature set of the TPS204xB/TPS205xB allows them to meet each of these requirements. The integrated current-limiting and overcurrent reporting is required by hosts and self-powered hubs. The logic-level enable and controlled rise times meet the need of both input and output ports on bus-powered hubs, as well as the input ports for bus-powered functions (see Figure 33 through Figure 36 ).

BUS

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†

USB rev 1.1 requires 120 µF per hub.

DP1 DM1

DP2 DM2

DP3 DM3

DP4

PWRON1

OVRCUR1

PWRON2

OVRCUR2

PWRON3

OVRCUR3

PWRON4

OVRCUR4

DM4

DP0 DM0

XTAL1

XTAL2

OCSOFF

SN75240

D + D −

5 V

GND

D + D −

5 V

D + D −

5 V

D + D −

5 V

48-MHz

Crystal

Downstream

Ports

TUSB2041B

Hub Controller

Tuning

Circuit

ABC

33 µF

†

SN75240

ABC

GND

33 µF

†

33 µF

†

33 µF

†

D + D −

Upstream Port

TPS2041B

SN75240

A B

5 V

GND

C D

1 µF

GND

Ferrite Beads

BUSPWR GANGED

Tie to TPS2041B EN Input

OC EN

OUT

5-V Power

Supply

GND

3.3 V

4.7 µF

0.1 µF

4.7 µF

GND

EN OC

TPS2041B

OUT

EN OC

TPS2041B

OUT

EN OC

TPS2041B

OUT

EN OC

TPS2041B

OUT

TPS76333

0.1 µF

APPLICATION INFORMATION (continued)

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

Figure 33. Hybrid Self / Bus-Powered Hub Implementation, TPS2041B/TPS2051B

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DP1

DM1

DP2

DM2

DP3

DM3

DP4

PWRON1

OVRCUR1

PWRON2

OVRCUR2

DM4

DP0 DM0

XTAL1

XTAL2

OCSOFF

SN75240

D + D −

5 V

GND

D + D −

5 V

D + D −

5 V

D + D −

5 V

48-MHz

Crystal

Downstream

Ports

TUSB2040

Hub Controller

Tuning

Circuit

ABC

33 µF

†

SN75240

ABC

GND

33 µF

†

33 µF

†

33 µF

†

D + D −

Upstream Port

TPS2041B

SN75240

A B

5 V

GND

C D

1 µF

GND

Ferrite Beads

BUSPWR GANGED

Tie to TPS2041B EN Input

OC EN

OUT

5-V Power

Supply

GND

3.3 V

4.7 µF

0.1 µF

4.7 µF

EN1

OC1

OUT1

TPS2042B

EN2

OC2

OUT2

0.1 µF

GND

†

USB rev 1.1 requires 120 µF per hub.

TPS76333

PWRON3

PWRON4

OVRCUR3

OVRCUR4

EN1

OC1

OUT1

TPS2042B

EN2

OC2

OUT2

0.1 µF

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

APPLICATION INFORMATION (continued)

Figure 34. Hybrid Self / Bus-Powered Hub Implementation, TPS2042B/TPS2052B

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DP1

DM1

DP2

DM2

DP3

DM3

PWRON1

OVRCUR1

PWRON2

OVRCUR2

PWRON3

OVRCUR3

DP0 DM0

XTAL1

XTAL2

OCSOFF

SN75240

D + D −

5 V

GND

D + D −

5 V

D + D −

5 V

48-MHz

Crystal

Downstream

Ports

TUSB2040

Hub Controller

Tuning

Circuit

ABC

47 µF

†

1/2 SN75240

ABC

GND

47 µF

†

47 µF

†

D +

D −

Upstream Port

TPS2041B

1/2 SN75240

5 V

GND

C D

1 µF

GND

Ferrite Beads

BUSPWR GANGED

Tie to TPS2041B EN Input

OC EN

OUT

5-V Power

Supply

GND

3.3 V

4.7 µF

0.1 µF

4.7 µF

EN1

IN1

OC1

OUT1

TPS2053B

EN2 OC2

OUT2

0.1 µF

GND

†

USB rev 1.1 requires 120 µF per hub.

OUT3

EN3 OC3

IN2

GND GND

TPS76333

APPLICATION INFORMATION (continued)

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

Figure 35. Hybrid Self / Bus-Powered Hub Implementation, TPS2043B/TPS2053B

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DP1

DM1

DP2

DM2

DP3

DM3

DP4

PWRON1

OVRCUR1

PWRON2

OVRCUR2

PWRON3

OVRCUR3

PWRON4

OVRCUR4

DM4

DP0 DM0

XTAL1

XTAL2

OCSOFF

SN75240

D + D −

5 V

GND

D + D −

5 V

D + D −

5 V

D + D −

5 V

48-MHz

Crystal

Downstream

Ports

TUSB2040

Hub Controller

Tuning

Circuit

ABC

33 µF

†

SN75240

ABC

GND

33 µF

†

33 µF

†

33 µF

†

D +

D −

Upstream Port

TPS2041B

SN75240

A B

5 V

GND

C D

1 µF

GND

Ferrite Beads

BUSPWR GANGED

Tie to TPS2041B EN Input

OC EN

OUT

5-V Power

Supply

GND

3.3 V

4.7 µF

0.1 µF

4.7 µF

EN1

IN1

OC1

OUT1

TPS2044B

EN2 OC2

OUT2

0.1 µF

GND

†

USB rev 1.1 requires 120 µF per hub.

EN3 OC3

OUT3

EN4 OC4

OUT4

IN2

GND1 GND2

TPS76333

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

APPLICATION INFORMATION (continued)

Figure 36. Hybrid Self / Bus-Powered Hub Implementation, TPS2044B/TPS2054B

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Power

Supply

0.1 µF

1000 µF Optimum

2.7 V to 5.5 V

PC Board

Overcurrent Response

TPS2042B

OC1

GND

EN1

EN2

OUT1 OUT2

OC2

Block of Circuitry

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

APPLICATION INFORMATION (continued)

GENERIC HOT-PLUG APPLICATIONS

In many applications it may be necessary to remove modules or pc boards while the main unit is still operating. These are considered hot-plug applications. Such implementations require the control of current surges seen by the main power supply and the card being inserted. The most effective way to control these surges is to limit and slowly ramp the current and voltage being applied to the card, similar to the way in which a power supply normally turns on. Due to the controlled rise times and fall times of the TPS204xB/TPS205xB, these devices can be used to provide a softer start-up to devices being hot-plugged into a powered system. The UVLO feature of the TPS204xB/TPS205xB also ensures that the switch is off after the card has been removed, and that the switch is off during the next insertion. The UVLO feature insures a soft start with a controlled rise time for every insertion of the card or module.

Figure 37. Typical Hot-Plug Implementation (Example, TPS2042B)

By placing the TPS204xB/TPS205xB between the V

input and the rest of the circuitry, the input power reaches

these devices first after insertion. The typical rise time of the switch is approximately 1 ms, providing a slow voltage ramp at the output of the device. This implementation controls system surge currents and provides a hot-plugging mechanism for any device.

DETAILED DESCRIPTION

Power Switch

The power switch is an N-channel MOSFET with a low on-state resistance. Configured as a high-side switch, the power switch prevents current flow from OUT to IN and IN to OUT when disabled. The power switch supplies a minimum current of 500 mA.

Charge Pump

An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires little supply current.

Driver

The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and fall times of the output voltage.

Enable ( ENx)

The logic enable pin disables the power switch and the bias for the charge pump, driver, and other circuitry to reduce the supply current. The supply current is reduced to less than 1 µA or 2 µA when a logic high is present on EN. A logic zero input on EN restores bias to the drive and control circuits and turns the switch on. The enable input is compatible with both TTL and CMOS logic levels.

www.ti.com

TPS2041B , , TPS2042B TPS2043B , TPS2044B , TPS2051B TPS2052B , TPS2053B , TPS2054B

SLVS514E – APRIL 2004 – REVISED JANUARY 2006

DETAILED DESCRIPTION (continued)

Enable (ENx)

The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to reduce the supply current. The supply current is reduced to less than 1 µA or 2 µA when a logic low is present on ENx. A logic high input on ENx restores bias to the drive and control circuits and turns the switch on. The enable input is compatible with both TTL and CMOS logic levels.

Overcurrent ( OCx)

The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature condition is encountered. The output remains asserted until the overcurrent or overtemperature condition is removed. A 10-ms deglitch circuit prevents the OCx signal from oscillation or false triggering. If an overtemperature shutdown occurs, the OCx is asserted instantaneously.

Current Sense

A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into its saturation region, which switches the output into a constant-current mode and holds the current constant while varying the voltage on the load.

Thermal Sense

The TPS204xB/TPS205xB implements a thermal sensing to monitor the operating temperature of the power distribution switch. In an overcurrent or short-circuit condition, the junction temperature rises. When the die temperature rises to approximately 140°C due to overcurrent conditions, the internal thermal sense circuitry turns off the switch, thus preventing the device from damage. Hysteresis is built into the thermal sense, and after the device has cooled approximately 10 degrees, the switch turns back on. The switch continues to cycle off and on until the fault is removed. The open-drain false reporting output ( OCx) is asserted (active low) when an overtemperature shutdown or overcurrent occurs.

Undervoltage Lockout

A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V, a control signal turns off the power switch.

PACKAGE OPTION ADDENDUM

www.ti.com

PACKAGING INFORMATION

Orderable Device Status

TPS2041BD ACTIVE SOIC D 8 75 Green (RoHS &

TPS2041BDG4 ACTIVE SOIC D 8 75 Green (RoHS &

TPS2041BDGN ACTIVE MSOP-

TPS2041BDGN-ASY OBSOLETE MSOP-

TPS2041BDGNG4 ACTIVE MSOP-

TPS2041BDGNR ACTIVE MSOP-

TPS2041BDGNRG4 ACTIVE MSOP-

TPS2041BDR ACTIVE SOIC D 8 2500 Green (RoHS &

TPS2041BDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

TPS2042BD ACTIVE SOIC D 8 75 Green (RoHS &

TPS2042BDG4 ACTIVE SOIC D 8 75 Green (RoHS &

TPS2042BDGN ACTIVE MSOP-

TPS2042BDGNG4 ACTIVE MSOP-

TPS2042BDGNR ACTIVE MSOP-

TPS2042BDGNRG4 ACTIVE MSOP-

TPS2042BDR ACTIVE SOIC D 8 2500 Green (RoHS &

TPS2042BDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

TPS2043BD ACTIVE SOIC D 16 40 Green (RoHS &

TPS2043BDG4 ACTIVE SOIC D 16 40 Green (RoHS &

TPS2043BDR ACTIVE SOIC D 16 2500 Green (RoHS &

TPS2043BDRG4 ACTIVE SOIC D 16 2500 Green (RoHS &

(1)

Package

Type

Power

PAD

Power

PAD

Power

PAD

Power

PAD

Power

PAD

Power

PAD

Power

PAD

Power

PAD

Power

PAD

Package Drawing

DGN 8 80 Green (RoHS &

DGN 8 TBD Call TI Call TI

DGN 8 80 Green (RoHS &

DGN 8 2500 Green (RoHS &

DGN 8 80 Green (RoHS &

DGN 8 2500 Green (RoHS &

Pins Package

Qty

Eco Plan

no Sb/Br)

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-1-260C-UNLIM

27-Feb-2006

(3)

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

Orderable Device Status

(1)

Package

Type

Package Drawing

Pins Package

Qty

Eco Plan

TPS2044BD ACTIVE SOIC D 16 40 Green (RoHS &

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-1-260C-UNLIM

27-Feb-2006

no Sb/Br)

TPS2044BDG4 ACTIVE SOIC D 16 40 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS2044BDR ACTIVE SOIC D 16 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS2044BDRG4 ACTIVE SOIC D 16 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS2051BD ACTIVE SOIC D 8 75 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS2051BDG4 ACTIVE SOIC D 8 75 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS2051BDGN ACTIVE MSOP-

Power

DGN 8 80 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

PAD

TPS2051BDGNG4 ACTIVE MSOP-

Power

DGN 8 80 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

PAD

TPS2051BDGNR ACTIVE MSOP-

Power

DGN 8 2500 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

PAD

TPS2051BDGNRG4 ACTIVE MSOP-

Power

DGN 8 2500 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

PAD

TPS2051BDR ACTIVE SOIC D 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS2051BDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS2052BD ACTIVE SOIC D 8 75 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS2052BDG4 ACTIVE SOIC D 8 75 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS2052BDGN ACTIVE MSOP-

Power

DGN 8 80 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

PAD

TPS2052BDGNG4 ACTIVE MSOP-

Power

DGN 8 80 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

PAD

TPS2052BDGNR ACTIVE MSOP-

Power

DGN 8 2500 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

PAD

TPS2052BDGNRG4 ACTIVE MSOP-

Power

DGN 8 2500 Green (RoHS &

no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

PAD

TPS2052BDR ACTIVE SOIC D 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS2052BDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS2053BD ACTIVE SOIC D 16 75 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS2053BDR ACTIVE SOIC D 16 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS2053BDRG4 ACTIVE SOIC D 16 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

(3)

Addendum-Page 2

PACKAGE OPTION ADDENDUM

www.ti.com

Orderable Device Status

(1)

Package

Type

Package Drawing

Pins Package

Qty

Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

27-Feb-2006

(3)

no Sb/Br)

TPS2054BD ACTIVE SOIC D 16 40 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS2054BDR ACTIVE SOIC D 16 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS2054BDRG4 ACTIVE SOIC D 16 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 3

IMPORTANT NOTICE

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TEXAS INSTRUMENTS TPS2041B, TPS2042B, TPS2043B, TPS2044B, TPS2051B Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual