TEXAS INSTRUMENTS TPS2020, TPS2021, TPS2022, TPS2023, TPS2024 Technical data

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33-mΩ (5-V Input) High-Side MOSFET Switch

Short-Circuit and Thermal Protection

Overcurrent Logic Output

Operating Range . . . 2.7 V to 5.5 V

Logic-Level Enable Input

Typical Rise Time . . . 6.1 ms

Undervoltage Lockout

Maximum Standby Supply Current ...10 µA

No Drain-Source Back-Gate Diode

Available in 8-pin SOIC and PDIP Packages

Ambient Temperature Range, –40°C to 85°C

2-kV Human-Body-Model, 200-V Machine-Model ESD Protection

description

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

D OR P PACKAGE

(TOP VIEW)

GND

IN IN

1 2 3 4

OUT

6 5

The TPS202x family of power distribution switches is intended for applications where heavy capacitive loads and short circuits are likely to be encountered. These devices are 50-mΩ N-channel MOSFET high-side power switches. The switch is controlled by a logic enable compatible with 5-V logic and 3-V logic. Gate drive is provided by an internal charge pump designed to control the power-switch rise times and fall times to minimize current surges during switching. The charge pump requires no external components and allows operation from supplies as low as 2.7 V.

When the output load exceeds the current-limit threshold or a short is present, the TPS202x limits the output current to a safe level by switching into a constant-current mode, pulling the overcurrent (OC

) logic output low. When continuous heavy overloads and short circuits increase the power dissipation in the switch, causing the junction temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from a thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures the switch remains off until valid input voltage is present.

The TPS202x devices differ only in short-circuit current threshold. The TPS2020 limits at 0.3-A load, the TPS2021 at 0.9-A load, the TPS2022 at 1.5-A load, the TPS2023 at 2.2-A load, and the TPS2024 at 3-A load (see Available Options). The TPS202x is available in an 8-pin small-outline integrated-circuit (SOIC) package and in an 8-pin dual-in-line (DIP) package and operates over a junction temperature range of –40°C to 125°C.

GENERAL SWITCH CATALOG

33 mΩ, single

80 mΩ, single

TPS201xA

TPS202x

TPS203x

TPS2014 TPS2015 TPS2041 TPS2051 TPS2045 TPS2055

0.2 A – 2 A

600 mA 1 A 500 mA 500 mA 250 mA 250 mA

80 mΩ, dual

IN1 IN2

260 mΩ

1.3 Ω

OUT

TPS2042 TPS2052 TPS2046 TPS2056

TPS2100/1

IN1 500 mA IN2 10 mA

TPS2102/3/4/5

IN1 500 mA IN2 100 mA

500 mA 500 mA 250 mA 250 mA

80 mΩ, triple

TPS2043 TPS2053 TPS2047 TPS2057

500 mA 500 mA 250 mA 250 mA

80 mΩ, quad

TPS2044 TPS2054 TPS2048 TPS2058

500 mA 500 mA 250 mA 250 mA

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

MAXIMUM CONTINUOUS

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

AVAILABLE OPTIONS

RECOMMENDED

–40°C to 85°C Active low

†

The D package is available taped and reeled. Add an R suffix to device type (e.g., TPS2020DR)

ENABLE

LOAD CURRENT

TPS2020 functional block diagram

Charge

Pump

(A)

0.2 0.3 TPS2020D TPS2020P

0.6 0.9 TPS2021D TPS2021P 1 1.5 TPS2022D TPS2022P

1.5 2.2 TPS2023D TPS2023P 2 3 TPS2024D TPS2024P

Power Switch

TYPICAL SHORT-CIRCUIT

CURRENT LIMIT AT 25°C

(A)

PACKAGED DEVICES

SMALL OUTLINE

†

(D)

†

OUT

PLASTIC DIP

(P)

GND

†

Current Sense

UVLO

Driver

Thermal

Sense

Terminal Functions

TERMINAL

NAME

EN 4 I Enable input. Logic low turns on power switch. GND 1 I Ground IN 2, 3 I Input voltage OC 5 O Overcurrent. Logic output active low OUT 6, 7, 8 O Power-switch output

NO.

D OR P

I/O DESCRIPTION

Current

Limit

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

detailed description

power switch

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

The power switch is an N-channel MOSFET with a maximum on-state resistance of 50 mΩ (V Configured as a high-side switch, the power switch prevents current flow from OUT to IN and IN to OUT when disabled.

charge pump

An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires very little supply current.

driver

The driver controls the gate voltage of the power switch. T o limit large current surges and reduce the associated electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and fall times of the output voltage. The rise and fall times are typically in the 2-ms to 9-ms range.

enable (EN

overcurrent (OC)

current sense

)

The logic enable disables the power switch, the bias for the charge pump, driver, and other circuitry to reduce the supply current to less than 10 µA when a logic high is present on EN . A logic zero input on EN restores bias to the drive and control circuits and turns the power on. The enable input is compatible with both TTL and CMOS logic levels.

The OC open drain output is asserted (active low) when an overcurrent or overtemperature condition is encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed.

I(IN)

= 5 V).

A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry sends a control signal to the driver. The driver, in turn, reduces the gate voltage and drives the power FET into its saturation region, which switches the output into a constant current mode and holds the current constant while varying the voltage on the load.

thermal sense

An internal thermal-sense circuit shuts off the power switch when the junction temperature rises to approximately 140°C. Hysteresis is built into the thermal sense circuit. After the device has cooled approximately 20°C, the switch turns back on. The switch continues to cycle off and on until the fault is removed.

undervoltage lockout

A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V , a control signal turns off the power switch.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

Input voltage

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Input voltage range, V Output voltage range, V Input voltage range, V Continuous output current, I

Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating virtual junction temperature range, T Storage temperature range, T

Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . .

Electrostatic discharge (ESD) protection: Human body model 2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltages are with respect to GND.

PACKAGE

D 725 mW 5.8 mW/°C 464 mW 377 mW P 1175 mW 9.4 mW/°C 752 mW 611 mW

(see Note 1) –0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I(IN)

O(OUT)

I(EN)

(see Note 1) –0.3 V to V

O(OUT)

stg

Machine model 200V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Charged device model (CDM) 750 V. . . . . . . . . . . . . . . . . . . . . . . . .

DISSIPATION RATING TABLE

TA ≤ 25°C

POWER RATING

DERATING FACTOR

ABOVE TA = 25°C

TA = 70°C

POWER RATING

TA = 85°C

POWER RATING

+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I(IN)

–0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

recommended operating conditions

MIN MAX UNIT

Continuous output current, I

Operating virtual junction temperature, T

V V TPS2020 0 0.2 TPS2021 0 0.6 TPS2022 0 1 TPS2023 0 1.5 TPS2024 0 2

I(IN) I(EN)

2.7 5.5 V 0 5.5 V

–40 125 °C

†

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

DS(on)

Static drain-source on-state resistance

mΩ

trRise time, output

tfFall time, output

VILLow-level in ut voltage

25 C

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

electrical characteristics over recommended operating junction temperature range, V

= rated current, EN = 0 V (unless otherwise noted)

I(IN)

= 5.5 V,

power switch

PARAMETER

I(IN)

†

Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

CL = 1 µF, V

I(IN)

CL = 1 µF, V

I(IN)

CL = 1 µF, V

I(IN)

CL = 1 µF,

TEST CONDITIONS

= 5 V, TJ = 25°C, IO = 1.8 A 33 36 = 5 V, TJ = 85°C, IO = 1.8 A 38 46 = 5 V, TJ = 125°C, IO = 1.8 A 44 50 = 3.3 V, TJ = 25°C, IO = 1.8 A 37 41 = 3.3 V, TJ = 85°C, IO = 1.8 A 43 52 = 3.3 V, TJ = 125°C, IO = 1.8 A 51 61 = 5 V, TJ = 25°C, IO = 0.18 A 30 34 = 5 V, TJ = 85°C, IO = 0.18 A 35 41 = 5 V, TJ = 125°C, IO = 0.18 A 39 47 = 3.3 V, TJ = 25°C, IO = 0.18 A 33 37 = 3.3 V, TJ = 85°C, IO = 0.18 A 39 46 = 3.3 V, TJ = 125°C, IO = 0.18 A 44 56 = 5.5 V,

= 2.7 V,

= 5.5 V,

= 2.7 V,

TJ = 25°C, RL = 10 Ω

†

MIN TYP MAX UNIT

6.1

8.6

3.4

enable input (EN)

PARAMETER TEST CONDITIONS

High-level input voltage 2.7 V ≤ V

Input current EN= 0 V or EN = V

Turnon time CL = 100 µF, RL = 10 Ω 20

Turnoff time CL = 100 µF, RL = 10 Ω 40

off

4.5 V ≤ V

2.7 V ≤ V

≤ 5.5 V 2 V

I(IN)

≤ 5.5 V 0.8

I(IN)

≤ 4.5 V 0.5

I(IN)

MIN TYP MAX UNIT

–0.5 0.5 µA

current limit

PARAMETER

Short-circuit output current

†

Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

OUT connected to GND, Device enable into short circuit

TEST CONDITIONS

= 5.5 V,

†

TPS2020 0.22 0.3 0.4 TPS2021 0.66 0.9 1.1 TPS2022 1.1 1.5 1.8 TPS2023 1.65 2.2 2.7 TPS2024 2.2 3 3.8

MIN TYP MAX UNIT

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TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

Supply current, low-level output

No Load on OUT

Supply current, high-level output

No Load on OUT

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

electrical characteristics over recommended operating junction temperature range, V

= rated current, EN = 0 V (unless otherwise noted) (continued)

I(IN)

= 5.5 V,

supply current

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Leakage current OUT connected to ground EN = V

EN = V

= 0

TJ = 25°C 0.3 1

I(IN)

–40°C ≤ TJ ≤ 125°C 10 TJ = 25°C 58 75 –40°C ≤ TJ ≤ 125°C 75 100 –40°C ≤ TJ ≤ 125°C 10 µA

I(IN)

undervoltage lockout

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Low-level input voltage 2 2.5 V Hysteresis TJ = 25°C 100 mV

overcurrent (OC)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Output low voltage IO = 10 mA, V Off-state current

†

Specified by design, not production tested.

†

VO = 5 V, VO = 3.3 V 1 µA

OL(OC)

0.4 V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

PARAMETER MEASUREMENT INFORMATION

OUT

RL CL

TEST CIRCUIT

O(OUT)

I(EN)

50%

VOLTAGE WAVEFORMS

50%

90%

10%

O(OUT)

90%

10%

off

10%

Figure 1. Test Circuit and Voltage Waveforms

Table of Timing Diagrams

FIGURE

Turnon Delay and Rise TIme 2 Turnoff Delay and Fall Time 3 Turnon Delay and Rise TIme with 1-µF Load 4 Turnoff Delay and Rise TIme with 1-µF Load 5 Device Enabled into Short 6

TPS2020, TPS2021, TPS2022, TPS2023, and TPS2024, Ramped Load on Enabled Device TPS2024, Inrush Current 12

7.9-Ω Load Connected to an Enabled TPS2020 Device 13

3.7-Ω Load Connected to an Enabled TPS2020 Device 14

3.7-Ω Load Connected to an Enabled TPS2021 Device 15

2.6-Ω Load Connected to an Enabled TPS2021 Device 16

2.6-Ω Load Connected to an Enabled TPS2022 Device 17

1.2-Ω Load Connected to an Enabled TPS2022 Device 18

1.2-Ω Load Connected to an Enabled TPS2023 Device 19

0.9-Ω Load Connected to an Enabled TPS2023 Device 20

0.9-Ω Load Connected to an Enabled TPS2024 Device 21

0.5-Ω Load Connected to an Enabled TPS2024 Device 22

7, 8, 9,

10, 11

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TPS2020, TPS2021, TPS2022, TPS2023, TPS2024 POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

PARAMETER MEASUREMENT INFORMATION

(5 V/div)

I(EN)

(5 V/div)

= 5 V

I(IN)

RL = 27 Ω TA = 25°C

O(OUT)

I(EN)

O(OUT)

468101214161820

t – Time – ms

O(OUT)

(2 V/div)

VIN = 5 V RL = 27 Ω TA = 25°C

Figure 2. Turnon Delay and Rise Time

(5 V/div)

I(EN)

O(OUT)

(2 V/div)

I(IN)

CL = 1 µF RL = 27 Ω TA = 25°C

= 5 V

O(OUT)

2 4 6 8 10 12 14 16 18 20

O(OUT)

t – Time – ms

(2 V/div)

Figure 3. Turnoff Delay and Fall Time

(5 V/div)

I(EN)

= 5 V

I(IN)

CL = 1 µF RL = 27 Ω TA = 25°C

O(OUT)

(2 V/div)

4 6 81012141618 20

t – Time – ms

Figure 4. Turnon Delay and Rise Time

Figure 5. Turnoff Delay and Fall Time

With 1-µF Load

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

468101214161820

t – Time – ms

With 1-µF Load

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

PARAMETER MEASUREMENT INFORMATION

(5 V/div)

O(OC)

I(EN)

= 5 V

I(IN)

TA = 25°C

I(EN)

(5 V/div)

TPS2024

O(OC)

= 5 V

I(IN)

TA = 25°C

O(OUT)

O(OC)

O(OUT)

TPS2023 TPS2022

TPS2021 TPS2020

(1 A/div)

O(OUT)

2345678910

t – Time – ms

Figure 6. Device Enabled Into Short

(5 V/div)

O(OC)

I(IN)

TA = 25°C

O(OUT)

(1 A/div)

= 5 V

O(OUT)

O(OC)

O(OUT)

20 40 60 80 100 120 140 160 180 200

t – Time – ms

O(OUT)

(500 mA/div)

Figure 7. TPS2020, Ramped Load on

Enabled Device

(5 V/div)

O(OC)

= 5 V

I(IN)

TA = 25°C

O(OUT)

(1 A/div)

20 40 60 80 100 120 140 160 180 200

t – Time – ms

Figure 8. TPS2021, Ramped Load on Enabled

Device

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

20 40 60 80 100 120 140 160 180 200

t – Time – ms

Figure 9. TPS2022, Ramped Load on

Enabled Device

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

PARAMETER MEASUREMENT INFORMATION

(5 V/div)

O(OC)

(5 V/div)

O(OC)

O(OUT)

20 40 60 80 100 120 140 160 180 200

O(OUT)

(1 A/div)

t – Time – ms

Figure 10. TPS2023, Ramped Load on

Enabled Device

I(EN)

(5 V/div)

I(EN)

= 5 V

I(IN)

TA = 25°C

O(OC)

= 5 V

I(IN)

TA = 25°C

O(OUT)

20 40 60 80 100 120 140 160 180 200

O(OUT)

(1 A/div)

t – Time – ms

Figure 11. TPS2024, Ramped Load on Enabled

Device

(5 V/div)

O(OC)

I(IN)

470 µF

150 µF

47 µF

123 4567 8910

t – Time – ms

(500 mA/div)

I(IN)

RL = 10 Ω TA = 25°C

Figure 12. TPS2024, Inrush Current

O(OUT)

200 400 600 800 1000 12001400 1600 1800 200

O(OUT)

(200 mA/div)

t – Time – µs

= 5 V

I(IN)

RL = 7.9 Ω TA = 25°C

Figure 13. 7.9-Ω Load Connected to an Enabled

TPS2020 Device

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

O(OC)

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

PARAMETER MEASUREMENT INFORMATION

(5 V/div)

O(OC)

= 5 V

I(IN)

RL = 3.7 Ω TA = 25°C

O(OC)

(5 V/div)

= 5 V

I(IN)

RL = 3.7 Ω TA = 25°C

O(OUT)

50 100 150 200 250 300 350 400 450 500

t – Time – µs

O(OUT)

(500 mA/div)

Figure 14. 3.7-Ω Load Connected to an Enabled

TPS2020 Device

(5 V/div)

O(OC)

= 5 V

I(IN)

RL = 2.6 Ω TA = 25°C

O(OUT)

(1 A/div)

O(OUT)

200 400 600 800 1000 12001400 1600 1800 2000

O(OUT)

(1 A/div)

t – Time – µs

Figure 15. 3.7-Ω Load Connected to an Enabled

TPS2021 Device

O(OC)

O(OUT)

O(OC)

(1 A/div)

(5 V/div)

= 5 V

I(IN)

RL = 2.6 Ω TA = 25°C

O(OUT)

50 100 150 200 250 300 350 400 450 500

t – Time – µs

Figure 16. 2.6-Ω Load Connected to an Enabled

TPS2021 Device

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

O(OUT)

200 400 600 800 1000 12001400 1600 1800 2000

t – Time – µs

Figure 17. 2.6-Ω Load Connected to an Enabled

TPS2022 Device

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024 POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

PARAMETER MEASUREMENT INFORMATION

(5 V/div)

O(OC)

= 5 V

I(IN)

RL = 1.2 Ω TA = 25°C

O(OC)

(5 V/div)

O(OUT)

100 200 300 400 500 600 700 800 900 1000

t – Time – µs

O(OUT)

(1 A/div)

Figure 18. 1.2-Ω Load Connected to an Enabled

TPS2022 Device

(5 V/div)

O(OC)

= 5 V

I(IN)

RL = 0.9 Ω TA = 25°C

O(OUT)

(2 A/div)

O(OUT)

100 200 300 400 500 600 700 800 900 1000

O(OUT)

(2 A/div)

t – Time – µs

= 5 V

I(IN)

RL = 1.2 Ω TA = 25°C

Figure 19. 1.2-Ω Load Connected to an Enabled

TPS2023 Device

(5 V/div)

O(OC)

= 5 V

I(IN)

RL = 0.9 Ω TA = 25°C

O(OUT)

(5 A/div)

O(OUT)

100 200 300 400 500 600 700 800 900 1000

t – Time – µs

Figure 20. 0.9-Ω Load Connected to an Enabled

TPS2023 Device

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

O(OUT)

100 200 300 400 500 600 700 800 900 1000

t – Time – µs

Figure 21. 0.9-Ω Load Connected to an Enabled

TPS2024 Device

IOSShort-circuit current limit

Static drain-source on-state resistance

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

PARAMETER MEASUREMENT INFORMATION

(5 V/div)

O(OC)

= 5 V

I(IN)

RL = 0.5 Ω TA = 25°C

d(on)

d(off)

DS(on)

O(OUT)

50 100 150 200 250 300 350 400 450 500

t – Time – µs

O(OUT)

(5 A/div)

Figure 22. 0.5-Ω Load Connected to an Enabled

TPS2024 Device

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

Turnon delay time vs Output voltage 23 Turnoff delay time vs Input voltage 24 Rise time vs Load current 25 Fall time vs Load current 26 Supply current (enabled) vs Junction temperature 27 Supply current (disabled) vs Junction temperature 28 Supply current (enabled) vs Input voltage 29 Supply current (disabled) vs Input voltage 30

vs Input voltage 31 vs Junction temperature 32 vs Input voltage 33 vs Junction temperature 34 vs Input voltage 35 vs Junction temperature 36

Input voltage Undervoltage lockout 37

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024 POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

TYPICAL CHARACTERISTICS

TURNON DELAY TIME

7.5

6.5

5.5

– Turn-on Delay T ime – ms

4.5

d(on)

3.5

2.5 3 3.5 4 4.5

6.5 TA = 25°C

CL = 1 µF

OUTPUT VOLTAGE

TA = 25°C CL = 1 µF

VI – Input Voltage – V

Figure 23

RISE TIME

LOAD CURRENT

5 5.5 6

TURNOFF DELAY TIME

TA = 25°C CL = 1 µF

17.5

– Turn-off Delay T ime – ms

16.5

d(off)

2.5 3 3.5 4 4.5 VI – Input Voltage – V

3.5 TA = 25°C

CL = 1 µF

INPUT VOLTAGE

5 5.5 6

Figure 24

FALL TIME

LOAD CURRENT

– Rise Time – ms

5.5

0 0.5 1

IL – Load Current – A

Figure 25

3.25

– Fall Time – ms

2.75

1.5 2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2.5

0 0.5

1 1.5 2

IL – Load Current – A

Figure 26

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

TYPICAL CHARACTERISTICS

SUPPLY CURRENT (ENABLED)

JUNCTION TEMPERATURE

I(IN)

Supply Current (Enabled) – Aµ

I(IN)

–50 –25 0 25 50

TJ – Junction Temperature – °C

SUPPLY CURRENT (ENABLED)

= 5.5 V

= 5 V

Figure 27

INPUT VOLTAGE

TJ = 125°C

= 4 V

I(IN)

= 3.3 V

I(IN)

= 2.7 V

I(IN)

75 100 150

125

SUPPLY CURRENT (DISABLED)

JUNCTION TEMPERATURE

Supply Current (Disabled) – Aµ

–1

–50 –25 0 25 50

TJ – Junction Temperature – °C

SUPPLY CURRENT (DISABLED)

I(IN)

75 100 150

Figure 28

INPUT VOLTAGE

= 5.5 V

= 5 V

I(IN)

= 2.7 V

I(IN)

= 3.3 V

= 4 V

125

TJ = 85°C

Supply Current (Enabled) – Aµ

2.5 3 3.5 4 4.5

TJ = 0°C

TJ = –40°C

VI – Input Voltage – V

Figure 29

TJ = 25°C

5 5.5 6

Supply Current (Disabled) – Aµ

–1

TJ = 125°C

2.5 3 3.5 4 4.5

TJ = 85°C

TJ = 25°C

TJ = 0°C

TJ = –40°C

5 5.5 6

VI – Input Voltage – V

Figure 30

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SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

TYPICAL CHARACTERISTICS

SHORT-CIRCUIT CURRENT LIMIT

INPUT VOLTAGE

3.5

TA = 25°C

2.5

1.5

– Short-Circuit Current Limit – A

0.5

23 4

TPS2024

TPS2023

TPS2022

TPS2021

TPS2020

VI – Input Voltage – V

Figure 31

STATIC DRAIN-SOURCE ON-STATE RESISTANCE

Ω

INPUT VOLTAGE

IO = 0.18 A

SHORT-CIRCUIT CURRENT LIMIT

JUNCTION TEMPERATURE

3.5 TPS2024

2.5 TPS2023

1.5

– Short-Circuit Current Limit – A

0.5

–50 –25 0

TJ – Junction Temperature – °C

TPS2022

TPS2021 TPS2020

25 100

50 75

Figure 32

STATIC DRAIN-SOURCE ON-STATE RESISTANCE

Ω

JUNCTION TEMPERATURE

IO = 0.18 A

TJ = 125°C

TJ = 25°C

TJ = –40°C

– Static Drain-Source On-State Resistance – m

2.5 3 3.5

DS(on)

4.5 5

VI – Input Voltage – V

Figure 33

– Static Drain-Source On-State Resistance – m

5.5

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DS(on)

–50 –25 0

VI = 2.7 V

VI = 3.3 V

VI = 5.5 V

50 75 100

25 150

TJ – Junction Temperature – °C

Figure 34

125

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024

POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

TYPICAL CHARACTERISTICS

STATIC DRAIN-SOURCE ON-STATE RESISTANCE

Ω

IO = 1.8 A

– Static Drain-Source On-State Resistance – m

DS(on)

3 3.5

INPUT VOLTAGE

TJ = 125°C

TJ = 25°C

TJ = –40°C

4.5 5 5.5

VI – Input Voltage – V

Figure 35

UNDERVOLTAGE LOCKOUT

2.5

STATIC DRAIN-SOURCE ON-STATE RESISTANCE

Ω

– Static Drain-Source On-State Resistance – m

DS(on)

–50 –25 0

JUNCTION TEMPERATURE

IO = 1.8 A

VI = 3.3 V

VI = 4 V

VI = 5.5 V

50 75 100

25 150

TJ – Junction Temperature – °C

125

Figure 36

2.4

Start Threshold

2.3

2.2

– Input Voltage – V

2.1

–50 0 50 100

Stop Threshold

TJ – Temperature – °C

Figure 37

150

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APPLICATION INFORMATION

TPS2024

0.1 µF

2,3

GND

OUT

6,7,8

0.1 µF 22 µF

Load

Power Supply

2.7 V to 5.5 V

10 kΩ

Figure 38. Typical Application

power-supply considerations

A 0.01-µF to 0.1-µF ceramic bypass capacitor between IN and GND, close to the device, is recommended. Placing a high-value electrolytic capacitor on the output and input pins is recommended when the output load is heavy. This precaution reduces power supply transients that may cause ringing on the input. Additionally, bypassing the output with a 0.01-µF to 0.1-µF ceramic capacitor improves the immunity of the device to short-circuit transients.

overcurrent

A sense FET checks for overcurrent conditions. Unlike current-sense resistors, sense FET s do not increase the series resistance of the current path. When an overcurrent condition is detected, the device maintains a constant output current and reduces the output voltage accordingly . Complete shutdown occurs only if the fault is present long enough to activate thermal limiting.

Three possible overload conditions can occur. In the first condition, the output has been shorted before the device is enabled or before V

has been applied (see Figure 6). The TPS202x senses the short and

I(IN)

immediately switches into a constant-current output. In the second condition, the excessive load occurs while the device is enabled. At the instant the excessive load

occurs, very high currents may flow for a short time before the current-limit circuit can react (see Figures 13–22). After the current-limit circuit has tripped (reached the overcurrent trip threshhold) the device switches into constant-current mode.

In the third condition, the load has been gradually increased beyond the recommended operating current. The current is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device is exceeded (see Figures 7–11). The TPS202x is capable of delivering current up to the current-limit threshold without damaging the device. Once the threshold has been reached, the device switches into its constant-current mode.

OC response

The OC open-drain output is asserted (active low) when an overcurrent or overtemperature condition is encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed. Connecting a heavy capacitive load to an enabled device can cause momentary false overcurrent reporting from the inrush current flowing through the device, charging the downstream capacitor. An RC filter can be connected to the OC the inrush current flow through the device during hot-plug events by providing a low impedance energy source, thereby reducing erroneous overcurrent reporting.

pin to reduce false overcurrent reporting. Using low-ESR electrolytic capacitors on the output lowers

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POWER-DISTRIBUTION SWITCHES

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APPLICATION INFORMATION

GND IN IN

TPS202x

OUT OUT OUT

V+

pullup

GND IN IN

TPS202x

OUT OUT OUT

V+

pullup

filter

Figure 39. Typical Circuit for OC Pin and RC Filter for Damping Inrush OC Responses

power dissipation and junction temperature

The low on-resistance on the n-channel MOSFET allows small surface-mount packages, such as SOIC, to pass large currents. The thermal resistances of these packages are high compared to those of power packages; it is good design practice to check power dissipation and junction temperature. The first step is to find r the input voltage and operating temperature. As an initial estimate, use the highest operating ambient temperature of interest and read r

DS(on

)

Finally, calculate the junction temperature:

)

from Figures 33–36. Next, calculate the power dissipation using:

DS(on)

Where:

= Ambient Temperature °C

= Thermal resistance SOIC = 172°C/W, PDIP = 106°C/W

θJA

Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees, repeat the calculation, using the calculated value as the new estimate. Two or three iterations are generally sufficient to get an acceptable answer.

thermal protection

Thermal protection prevents damage to the IC when heavy-overload or short-circuit faults are present for extended periods of time. The faults force the TPS202x into constant current mode, which causes the voltage across the high-side switch to increase; under short-circuit conditions, the voltage across the switch is equal to the input voltage. The increased dissipation causes the junction temperature to rise to high levels. The protection circuit senses the junction temperature of the switch and shuts it off. Hysteresis is built into the thermal sense circuit, and after the device has cooled approximately 20 degrees, the switch turns back on. The switch continues to cycle in this manner until the load fault or input power is removed.

undervoltage lockout (UVLO)

An undervoltage lockout ensures that the power switch is in the off state at powerup. Whenever the input voltage falls below approximately 2 V, the power switch will be quickly turned off. This facilitates the design of hot-insertion systems where it is not possible to turn off the power switch before input power is removed. The UVLO will also keep the switch from being turned on until the power supply has reached at least 2 V, even if the switch is enabled. Upon reinsertion, the power switch will be turned on, with a controlled rise time to reduce EMI and voltage overshoots.

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SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

APPLICATION INFORMATION

generic hot-plug applications (see Figure 40)

In many applications it may be necessary to remove modules or pc boards while the main unit is still operating. These are considered hot-plug applications. Such implementations require the control of current surges seen by the main power supply and the card being inserted. The most effective way to control these surges is to limit and slowly ramp the current and voltage being applied to the card, similar to the way in which a power supply normally turns on. Because of the controlled rise times and fall times of the TPS202x series, these devices can be used to provide a softer start-up to devices being hot-plugged into a powered system. The UVLO feature of the TPS202x also ensures the switch will be off after the card has been removed, and the switch will be off during the next insertion. The UVLO feature guarantees a soft start with a controlled rise time for every insertion of the card or module.

PC Board

Power

Supply

2.7 V to 5.5 V

1000 µF Optimum

0.1 µF

TPS2024

GND IN IN

OUT OUT OUT

Block of Circuitry

Overcurrent Response

Figure 40. Typical Hot-Plug Implementation

By placing the TPS202x between the VCC input and the rest of the circuitry , the input power will reach this device first after insertion. The typical rise time of the switch is approximately 9 ms, providing a slow voltage ramp at the output of the device. This implementation controls system surge currents and provides a hot-plugging mechanism for any device.

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POWER-DISTRIBUTION SWITCHES

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MECHANICAL DATA

D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PIN SHOWN

0.050 (1,27)

0.069 (1,75) MAX

0.020 (0,51)

0.014 (0,35) 8

0.010 (0,25)

0.004 (0,10)

DIM

0.157 (4,00)

0.150 (3,81)

PINS **

0.010 (0,25)

0.244 (6,20)

0.228 (5,80)

Seating Plane

0.004 (0,10)

0.008 (0,20) NOM

0°–8°

Gage Plane

0.010 (0,25)

0.044 (1,12)

0.016 (0,40)

A MAX

A MIN

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). D. Falls within JEDEC MS-012

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0.197

(5,00)

0.189

(4,80)

0.344

(8,75)

0.337

(8,55)

0.394

(10,00)

0.386

(9,80)

4040047/D 10/96

TPS2020, TPS2021, TPS2022, TPS2023, TPS2024 POWER-DISTRIBUTION SWITCHES

SLVS175A – DECEMBER 1998 – REVISED NOVEMBER 1999

MECHANICAL DATA

P (R-PDIP-T8) PLASTIC DUAL-IN-LINE PACKAGE

0.400 (10,60)

0.355 (9,02)

0.260 (6,60)

0.240 (6,10)

0.070 (1,78) MAX

0.020 (0,51) MIN

0.200 (5,08) MAX

0.125 (3,18) MIN

0.100 (2,54)

0.021 (0,53)

0.015 (0,38)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. Falls within JEDEC MS-001

0.010 (0,25)

0.310 (7,87)

0.290 (7,37)

Seating Plane

0°–15°

0.010 (0,25) NOM

4040082/B 03/95

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IMPORTANT NOTICE

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TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO BE FULLY AT THE CUSTOMER’S RISK.

In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards.

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TEXAS INSTRUMENTS TPS2020, TPS2021, TPS2022, TPS2023, TPS2024 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual