TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Low Power Consumption
D
Wide Common-Mode and Differential
Voltage Ranges
D
Low Input Bias and Offset Currents
D
Output Short-Circuit Protection
D
Low Total Harmonic
Distortion . . . 0.003% Typ
D
High Input Impedance...JFET-Input Stage
D
Latch-Up-Free Operation
D
High Slew Rate...13 V/µs Typ
D
Common-Mode Input Voltage Range
Includes V
CC+
description
The TL08x JFET-input operational amplifier family is designed to offer a wider selection than any previously
developed operational amplifier family. Each of these JFET-input operational amplifiers incorporates
well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature
high slew rates, low input bias and offset currents, and low offset voltage temperature coefficient. Offset
adjustment and external compensation options are available within the TL08x family.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from –40°C to 85°C. The Q-suffix devices are characterized for operation from –40°C to 125°C.
The M-suffix devices are characterized for operation over the full military temperature range of –55°C to 125°C.
symbols
+
–
+
–
OFFSET N1
IN+
IN–
OUT
IN+
IN–
OUT
TL082 (EACH AMPLIFIER)
TL084 (EACH AMPLIFIER)
TL081
OFFSET N2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
NC – No internal connection
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OUT
1IN–
1IN+
V
CC+
2IN+
2IN–
2OUT
4OUT
4IN–
4IN+
V
CC–
3IN+
3IN–
3OUT
TL084, TL084A, TL084B
D, J, N, PW, OR W PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
4IN+
NC
V
CC
–
NC
3IN+
1IN+
NC
V
CC+
NC
2IN+
TL084M . . . FK PACKAGE
(TOP VIEW)
1IN –
1OUT
NC
3OUT
3IN –
4OUT
4IN –
2IN –
2OUT
NC
3212019
910111213
4
5
6
7
8
18
17
16
15
14
NC
V
CC+
NC
OUT
NC
NC
IN–
NC
IN+
NC
TL081M . . . FK PACKAGE
(TOP VIEW)
NC
OFFSET N1
NC
OFFSET N2
NC
NC
NC
NC
NC
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
NC
2OUT
NC
2IN–
NC
NC
1IN–
NC
1IN+
NC
TL082M . . . FK PACKAGE
(TOP VIEW)
NC
1OUT
NC
2IN +
NC
NC
NC
NC
1
2
3
4
8
7
6
5
OFFSET N1
IN–
IN+
V
CC–
NC
V
CC+
OUT
OFFSET N2
TL081, TL081A, TL081B
D, JG, P, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
1OUT
1IN–
1IN+
V
CC–
V
CC+
2OUT
2IN–
2IN+
TL082, TL082A, TL082B
D, JG, P, OR PW PACKAGE
(TOP VIEW)
V
CC –
V
CC+
V
CC –
1
2
3
4
5
10
9
8
7
6
NC
OFFSET N1
IN–
IN+
V
CC–
NC
NC
V
CC+
OUT
OFFSET N2
TL081M
U PACKAGE
(TOP VIEW)
1
2
3
4
5
10
9
8
7
6
NC
1OUT
1IN–
1IN+
V
CC–
NC
V
CC+
2OUT
2IN–
2IN+
TL082M
U PACKAGE
(TOP VIEW)
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
• 3
AVAILABLE OPTIONS
PACKAGED DEVICES
T
A
VIOmax
AT 25°C
SMALL
OUTLINE
(D008)
SMALL
OUTLINE
(D014)
CHIP
CARRIER
(FK)
CERAMIC
DIP
(J)
CERAMIC
DIP
(JG)
PLASTIC
DIP
(N)
PLASTIC
DIP
(P)
TSSOP
(PW)
FLAT
PACK
(U)
FLAT
PACK
(W)
CHIP
FORM
(Y)
15 mV
6 mV
3 mV
TL081CD
TL081ACD
TL081BCD
— — — — —
TL081CP
TL081ACP
TL081BCP
TL081CPW
— — —
0°C
to
70°C
15 mV
6 mV
3 mV
TL082CD
TL082ACD
TL082BCD
— — — — —
TL082CP
TL082ACP
TL082BCP
TL082CPW
— —
TL082Y
15 mV
6 mV
3 mV
—
TL084CD
TL084ACD
TL084BCD
— — —
TL084CN
TL084ACN
TL084BCN
—
TL084CPW
— —
TL084Y
–40°C
to
85°C
6 mV
6 mV
6 mV
TL081ID
TL082ID
TL084ID
TL084ID
— — —
TL084IN
TL081IP
TL082IP
— — — —
–40°C
to
125°C
9 mV
—
TL084QD
— — — — — — — — —
–55°C
to
125°C
6 mV
6 mV
9 mV
— —
TL081MFK
TL082MFK
TL084MFK
TL084MJ
TL081MJG
TL082MJG
— — —
TL081MU
TL082MU
TL084MW
—
The D package is available taped and reeled. Add R suffix to the device type (e.g., TL081CDR).
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
schematic (each amplifier)
C1
V
CC+
IN+
V
CC–
OFFSET N1
1080 Ω
1080 Ω
IN–
TL081 Only
64 Ω
128 Ω
64 Ω
OUT
Component values shown are nominal.
OFFSET N2
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL082Y chip information
These chips, when properly assembled, display characteristics similar to the TL082. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive
epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJmax = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (4) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
+
–
1OUT
1IN+
1IN–
V
CC+
(8)
(6)
(3)
(2)
(5)
(1)
–
+
(7)
2IN+
2IN–
2OUT
(4)
V
CC–
61
61
(7) (6) (5)
(4)(8)
(3)(2)(1)
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL084Y chip information
These chips, when properly assembled, display characteristics similar to the TL084. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive
epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJmax = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (11) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
+
–
1OUT
1IN+
1IN–
V
CC+
(4)
(6)
(3)
(2)
(5)
(1)
–
+
(7)
2IN+
2IN–
2OUT
(11)
V
CC–
+
–
3OUT
3IN+
3IN–
(13)
(10)
(9)
(12)
(8)
–
+
(14)
4OUT
4IN+
4IN–
105
62
(13) (12) (11) (10) (9)
(8)
(7)
(6)(4)(3)
(2)
(1)
(14)
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
TL08_C
TL08_AC
TL08_BC
TL08_I TL084Q TL08_M UNIT
Supply voltage, V
CC+
(see Note 1) 18 18 18 18 V
Supply voltage VCC– (see Note 1) –18 –18 –18 –18 V
Differential input voltage, VID (see Note 2) ± 30 ± 30 ±30 ± 30 V
Input voltage, VI (see Notes 1 and 3) ±15 ±15 ±15 ±15 V
Duration of output short circuit (see Note 4) unlimited unlimited unlimited unlimited
Continuous total power dissipation See Dissipation Rating Table
Operating free-air temperature range, T
A
0 to 70 – 40 to 85 – 40 to 125 – 55 to 125 °C
Storage temperature range, T
stg
– 65 to 150 – 65 to 150 – 65 to 150 – 65 to 150 °C
Case temperature for 60 seconds, T
C
FK package 260 °C
Lead temperature 1,6 mm (1/16 inch) from case for 60
seconds
J or JG package 300 °C
Lead temperature 1,6 mm (1/16 inch) from case for 10
seconds
D, N, P, or
PW package
260 260 260 °C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V
CC+
and V
CC–
.
2. Differential voltages are at IN+ with respect to IN–.
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the
dissipation rating is not exceeded.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING
FACTOR
DERATE
ABOVE T
A
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
TA = 125°C
POWER RATING
D (8 pin) 680 mW 5.8 mW/°C 32°C 460 mW 373 mW N/A
D (14 pin) 680 mW 7.6 mW/°C60°C 604 mW 490 mW 186 mW
FK 680 mW 11.0 mW/°C88°C 680 mW 680 mW 273 mW
J 680 mW 11.0 mW/°C88°C 680 mW 680 mW 273 mW
JG 680 mW 8.4 mW/°C69°C 672 mW 546 mW 210 mW
N 680 mW 9.2 mW/°C76°C 680 mW 597 mW N/A
P 680 mW 8.0 mW/°C65°C 640 mW 520 mW N/A
PW (8 pin) 525 mW 4.2 mW/°C25°C 336 mW N/A N/A
PW (14 pin) 700 mW 5.6 mW/°C25°C 448 mW N/A N/A
U 675 mW 5.4 mW/°C25°C 432 mW 351 mW 135 mW
W 680 mW 8.0 mW/°C 65°C 640 mW 520 mW 200 mW
Template Release Date: 7–11–94
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
•
electrical characteristics, V
CC±
= ±15 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
T
A
†
TL081C
TL082C
TL084C
TL081AC
TL082AC
TL084AC
TLO81BC
TL082BC
TL084BC
TL081I
TL082I
TL084I
UNIT
MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX
p
25°C 3 15 3 6 2 3 3 6
VIOInput offset voltage
V
O
=
0
R
S
= 50
Ω
Full range 20 7.5 5 9
mV
α
VIO
T emperature
coefficient of input
offset voltage
VO = 0 RS = 50 Ω Full range 18 18 18 18 µV/°C
25°C 5 200 5 100 5 100 5 100 pA
I
IO
I
nput offset curren
t
‡
V
O
=
0
Full range 2 2 2 10 nA
25°C 30 400 30 200 30 200 30 200 pA
I
IB
I
nput bias curren
t
‡
V
O
=
0
Full range 10 7 7 20 nA
V
ICR
Common-mode input
voltage range
25°C ±11
–12
to
15
±11
–12
to
15
±11
–12
to
15
±11
–12
to
15
V
RL = 10 kΩ 25°C ±12 ±13.5 ±12 ±13.5 ±12 ±13.5 ±12 ± 13.5
V
OM
Maximum peak
p
RL ≥ 10 kΩ
±12 ±12 ±12 ±12
V
out ut voltage swing
RL ≥ 2 kΩ
Full range
±10 ±12 ±10 ±12 ±10 ±12 ±10 ±12
Large-signal
VO = ±10 V, RL ≥ 2 kΩ 25°C 25 200 50 200 50 200 50 200
A
VD
diff
erential voltage
amplification
VO = ±10 V,
RL ≥ 2 kΩ Full range 15 25 25 25
V/mV
B
1
Unity-gain bandwidth 25°C 3 3 3 3 MHz
r
i
Input resistance 25°C 10
12
10
12
10
12
10
12
Ω
Common-mode VIC = V
ICR
min,
°
CMRR
rejection ratio VO = 0, RS = 50 Ω
25°C7086758675867586
dB
Supply voltage
VCC = ±15 V to ± 9 V,
°
k
SVR
rejection ratio
(∆V
CC±
/∆VIO)
VO = 0, RS = 50 Ω
25°C7086808680868086
dB
I
CC
Supply current
(per amplifier)
VO = 0, No load 25°C 1.4 2.8 1.4 2.8 1.4 2.8 1.4 2.8 mA
VO1/VO2Crosstalk attenuation AVD = 100 25°C 120 120 120 120 dB
†
All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified. Full range for TA is 0°C to 70°C for TL08_C, TL08_AC,
TL08_BC and –40°C to 85°C for TL08_I.
‡
Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure 17. Pulse techniques must be used
that maintain the junction temperature as close to the ambient temperature as possible.
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics, V
CC ±
= ±15 V (unless otherwise noted)
TL081M, TL082M TL084Q, TL084M
PARAMETER
TEST CONDITIONS
†
T
A
MIN TYP MAX MIN TYP MAX
UNIT
p
25°C 3 6 3 9
VIOInput offsetvoltage
V
O
= 0,
R
S
= 50
Ω
Full range 9 15
mV
α
VIO
Temperature
coefficient of input
offset voltage
VO = 0 RS = 50 Ω Full range 18 18 µV/°C
25°C 5 100 5 100 pA
I
IO
I
nput offset curren
t
‡
V
O
=
0
125°C 20 20 nA
25°C 30 200 30 200 pA
I
IB
I
nput bias curren
t
‡
V
O
=
0
125°C 50 50 nA
V
ICR
Common-mode input
voltage range
25°C ±11
±12
to
15
±11
± 12
to
15
V
RL = 10 kΩ 25°C ±12 ±13.5 ±12 ±13.5
V
OM
Maximum peak
p
RL ≥ 10 kΩ
±12 ±12
V
out ut voltage swing
RL ≥ 2 kΩ
Full range
±10 ±12 ±10 ±12
Large-signal
VO = ±10 V , RL ≥ 2 kΩ 25°C 25 200 25 200
A
VD
diff
erential voltage
amplification
VO = ±10 V ,
RL ≥ 2 kΩ Full range 15 15
V/mV
B
1
Unity-gain bandwidth 25°C 3 3 MHz
r
i
Input resistance 25°C 10
12
10
12
Ω
CMRR
Common-mode
rejection ratio
VIC = V
ICR
min,
VO = 0, RS = 50 Ω
25°C 80 86 80 86 dB
k
SVR
Supply voltage
rejection ratio
(∆V
CC±
/∆VIO)
VCC = ±15 V to ±9 V,
VO = 0, RS = 50 Ω
25°C 80 86 80 86 dB
I
CC
Supply current
(per amplifier)
VO = 0, No load 25°C 1.4 2.8 1.4 2.8 mA
VO1/VO2Crosstalk attenuation AVD = 100 25°C 120 120 dB
†
All characteristics are measured under open-loop conditions with zero common-mode input voltage unless otherwise specified.
‡
Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in
Figure 17. Pulse techniques must be used that maintain the junction temperatures as close to the ambient temperature as is possible.
operating characteristics, V
CC±
= ±15 V, T
A
= 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX
UNIT
VI = 10 V, RL = 2 kΩ, CL = 100 pF, See Figure 1 8
∗
13
SR Slew rate at unity gain
VI = 10 V,
RL = 2 kΩ, CL = 100 pF,
∗
V/µs
TA = – 55°C to 125°C,
See Figure 1
5
∗
t
r
Rise time
p
0.05 µs
Overshoot factor
V
I
=
20 mV
,
R
L
=
2 kΩ
,
C
L
=
100 pF
,
See Figure 1
20%
Equivalent input noise
f = 1 kHz 18 nV/√Hz
V
n
Equivalent in ut noise
voltage
R
S
= 20
Ω
f = 10 Hz to 10 kHz 4 µV
I
n
Equivalent input noise
current
RS = 20 Ω, f = 1 kHz 0.01 pA/√Hz
THD Total harmonic distortion
VIrms = 6 V,
f = 1 kHz
AVD = 1, RS ≤ 1 kΩ, RL ≥ 2 kΩ,
0.003%
∗On products compliant to MIL-PRF-38535, this parameter is not production tested.
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics, V
CC±
= ±15 V, TA = 25°C (unless otherwise noted)
TL082Y, TL084Y
PARAMETER
TEST CONDITIONS
†
MIN TYP MAX
UNIT
V
IO
Input offset voltage
VO = 0,
RS = 50 Ω 3 15 mV
α
VIO
Temperature coefficient of input offset voltage VO = 0, RS = 50 Ω 18 µV/°C
I
IO
Input offset current
‡
VO = 0, 5 200 pA
I
IB
Input bias current
‡
VO = 0, 30 400 pA
V
ICR
Common-mode input voltage range ±11
–12
to
15
V
V
OM
Maximum peak output voltage swing RL = 10 kΩ, ±12 ±13.5 V
A
VD
Large-signal differential voltage amplification VO = ±10 V , RL ≥ 2 kΩ 25 200 V/mV
B
1
Unity-gain bandwidth 3 MHz
r
i
Input resistance 10
12
Ω
V
= V
min, V
= 0,
70 86
CMRR
Common-mode rejection ratio
IC ICR
,
RS = 50 Ω
O
,
70 86
dB
pp
V
= ±15 V to ± 9 V,
70 86
k
SVR
Suppl
y v
oltage rejection ratio (∆V
CC±
/∆VIO)
CC
,
VO = 0, RS = 50 Ω
70 86
dB
I
CC
Supply current (per amplifier) VO = 0, No load 1.4 2.8 mA
VO1/VO2Crosstalk attenuation AVD = 100 120 dB
†
All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified.
‡
Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in
Figure 17. Pulse techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.
operating characteristics, V
CC±
= ±15 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX
UNIT
SR Slew rate at unity gain VI = 10 V, RL = 2 kΩ, CL = 100 pF, See Figure 1 8 13 V/µs
t
r
Rise time
p
0.05 µs
Overshoot factor
V
I
= 20 mV,
R
L
= 2 kΩ,
C
L
=
100 pF
,
See Figure 1
20%
p
f = 1 kHz 18 nV/√Hz
VnEquivalent input noise voltage
R
S
= 20
Ω
f = 10 Hz to 10 kHz 4 µV
I
n
Equivalent input noise current RS = 20 Ω, f = 1 kHz 0.01 pA/√Hz
THD Total harmonic distortion
VIrms = 6 V,
f = 1 kHz
AVD = 1, RS ≤ 1 kΩ, RL ≥ 2 kΩ,
0.003%
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Figure 1
V
I
CL = 100 pF
RL = 2 kΩ
+
–
OUT
Figure 2
V
I
10 kΩ
1 kΩ
R
L
CL = 100 pF
+
–
OUT
Figure 3
100 kΩ
C2
C1N1500 pF
+
–
OUT
IN–
Figure 4
TL081
N2
N1
100 kΩ
1.5 kΩ
V
CC–
+
–
OUT
IN–
IN+
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
vs Frequenc
y
5, 6, 7
p
p
vs Frequency
vs Free-air temperature
5, 6, 7
8
VOMMaximum peak output voltage
vs Load resistance 9
vs Supply voltage 10
p
vs Free-air temperature 11
A
VD
Large-signal differential voltage amplification
vs Frequency 12
VD
Differential voltage amplification vs Frequency with feed-forward compensation 13
P
D
Total power dissipation vs Free-air temperature 14
pp
vs Free-air temperature 15
ICCSupply current
vs Supply voltage 16
I
IB
Input bias current vs Free-air temperature 17
Large-signal pulse response vs Time 18
V
O
Output voltage vs Elapsed time 19
CMRR Common-mode rejection ratio vs Free-air temperature 20
V
n
Equivalent input noise voltage vs Frequency 21
THD Total harmonic distortion vs Frequency 22
Figure 5
±15
±12.5
±10
±7.5
±5
±2.5
0
f – Frequency – Hz
100 1 k 10 k 100 k 1 M 10 M
RL = 10 kΩ
TA = 25°C
See Figure 2
V
CC±
= ±15 V
V
CC±
= ±10 V
V
CC±
= ±5 V
– Maximum Peak Output Voltage – V
MAXIMUM PEAK OUTPUT VOLTAGE
vs
FREQUENCY
V
OM
Figure 6
MAXIMUM PEAK OUTPUT VOLTAGE
vs
FREQUENCY
V
CC±
= ±5 V
V
CC±
= ±10 V
V
CC±
= ±15 V
RL = 2 kΩ
TA = 25°C
±15
±12.5
±10
±7.5
±5
±2.5
0
f – Frequency – Hz
100 1 k 10 k 1 M
10 M
See Figure 2
100 k
– Maximum Peak Output Voltage – V
V
OM
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
†
Figure 7
0
±2.5
±5
±7.5
±10
±12.5
±15
10 k 40 k 100 k 400 k 1 M 4 M 10 M
V
CC±
= ±15 V
RL = 2 kΩ
See Figure 2
TA = –55°C
TA = 25°C
TA = 125°C
f – Frequency – Hz
MAXIMUM PEAK OUTPUT VOLTAGE
vs
FREQUENCY
– Maximum Peak Output Voltage – V
V
OM
Figure 8
±12.5
±10
±7.5
±5
±2.5
MAXIMUM PEAK OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
– 75 – 50 – 25 0 25 50 75 100 125
±15
0
RL = 10 kΩ
RL = 2 kΩ
V
CC±
= ±15 V
See Figure 2
– Maximum Peak Output Voltage – V
V
OM
TA – Free-Air Temperature – °C
Figure 9
0.1
0
RL – Load Resistance – kΩ
10
±15
±2.5
±5
±7.5
±10
±12.5
V
CC±
= ±15 V
TA = 25°C
See Figure 2
0.2 0.4 0.7 1 2 4 7
MAXIMUM PEAK OUTPUT VOLTAGE
vs
LOAD RESISTANCE
– Maximum Peak Output Voltage – V
V
OM
Figure 10
0
0
|V
CC±
| – Supply Voltage – V
16
±15
2 4 6 8 10 12 14
±2.5
±5
±7.5
±10
±12.5
RL = 10 kΩ
TA = 25°C
MAXIMUM PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
– Maximum Peak Output Voltage – V
V
OM
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
†
700
70
7
–75
1
TA – Free-Air Temperature – °C
125
1000
–50 –25 0 25 50 75 100
2
4
10
20
40
100
200
400
V
CC±
= ±15 V
VO = ±10 V
RL = 2 kΩ
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
– Large-Signal Differential
A
VD
Voltage Amplification – V/mV
Figure 11
180°
135°
90°
45°
0°
Phase Shift
(right scale)
TA = 25°C
RL = 10 kΩ
V
CC±
= ±5 V to ±15 V
Differential Voltage
Amplification
(left scale)
10
5
10
4
10
3
10
2
10
1
1 M100 k10 k1 k10010
10
6
10 M
f – Frequency – Hz
1
1
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREQUENCY
Phase Shift
– Large-Signal Differential
A
VD
Voltage Amplification – V/mV
Figure 12
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
†
Figure 13
See Figure 3
TA = 25°C
C2 = 3 pF
V
CC±
= ±15 V
10
5
10
4
10
3
10
2
10
1 M100 k10 k1 k
10
6
10 M
f – Frequency With Feed-Forward Compensation – Hz
1
100
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREQUENCY WITH FEED-FORWARD COMPENSATION
– Differential Voltage Amplification – V/mVA
VD
Figure 14
–75
0
– Total Power Dissipation – mW
TA – Free-Air Temperature – °C
125
250
–50 –25 0 25 50 75 100
25
50
75
100
125
150
175
200
225
V
CC±
= ±15 V
No Signal
No Load
TL084, TL085
TL082, TL083
TL081
TOTAL POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
P
D
Figure 15
– Supply Current – mA
–75
0
TA – Free-Air Temperature – °C
125
2.0
–50 –25 0 25 50 75 100
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
V
CC±
= ±15 V
No Signal
No Load
SUPPLY CURRENT PER AMPLIFIER
vs
FREE-AIR TEMPERATURE
I
CC ±
Figure 16
0
0
|V
CC±
| – Supply Voltage – V
16
2.0
2 4 6 8 10 12 14
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
TA = 25°C
No Signal
No Load
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
– Supply Current – mAI
CC ±
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
†
Figure 17
– 50
0.01
– Input Bias Current – nA
TA – Free-Air Temperature – °C
125
100
– 25 0 25 50 75 100
0.1
1
10
V
CC±
= ± 15 V
INPUT BIAS CURRENT
vs
FREE-AIR TEMPERATURE
I
IB
Figure 18
V
CC±
= ±15 V
RL = 2 kΩ
CL = 100 pF
TA = 25°C
Output
4
2
0
– 2
– 4
32.521.510.50
6
3.5
t – Time – µs
Input and Output Voltages – V
– 6
VOLTAGE-FOLLOWER
LARGE-SIGNAL PULSE RESPONSE
Input
Figure 19
– 4
– Output Voltage – mV
t – Elapsed Time – µs
1.2
28
0 0.2 0.4 0.6 0.8 1.0
0
4
8
12
16
20
24
OUTPUT VOLTAGE
vs
ELAPSED TIME
V
O
V
CC±
= ±15 V
RL = 2 kΩ
CL = 100 pF
TA = 25°C
See Figure 1
Figure 20
RL = 10 kΩ
V
CC±
= ±15 V
88
87
86
85
84
1007550250– 25– 50
89
125
TA – Free-Air Temperature – °C
CMRR – Common-Mode Rejection Ratio – dB
83
– 75
COMMON-MODE REJECTION RATIO
vs
FREE-AIR TEMPERATURE
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
†
Figure 21
10
0
– Equilvalent Input Noise Voltage –
f – Frequency – Hz
100 k
50
10
20
30
40
V
CC±
= ±15 V
AVD = 10
RS = 20 Ω
TA = 25°C
40 100 400 1 k 4 k 10 k 40 k
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
V
n
nV/ Hz
Figure 22
0.001
THD – Total Harmonic Distortion – %
1
V
CC±
= ±15 V
AVD = 1
V
I(RMS)
= 6 V
TA = 25°C
40 k10 k4 k1 k400 100 k
f – Frequency – Hz
10
0.004
0.01
0.04
0.1
0.4
TOTAL HARMONIC DISTORTION
vs
FREQUENCY
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
APPLICATION INFORMATION
Figure 23
+
–
–15 V
15 V
Output
1 kΩ
9.1 kΩ
3.3 kΩ
CF = 3.3 µF
RF = 100 kΩ
3.3 kΩ
TL081
f =
2π RF C
F
1
Figure 24
+
–
R1
C1 C2
R3
C3
V
CC–
V
CC+
TL081
OutputInput
R2
R1 = R2 = 2(R3) = 1.5 MΩ
fo =
2π R1 C1
1
= 1 kHz
C1 = C2 = = 110 pF
C3
2
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
Input
–
+
+
–
TL084 Output C
Output BTL084
–
+
V
CC+
Output ATL084
–
+
V
CC+
TL084
V
CC+
100 kΩ
100 µF
1 µF
1 MΩ
100 kΩ
100 kΩ 100 kΩ
V
CC+
V
CC+
Figure 25. Audio-Distribution Amplifier
+
–
+
–
88.4 kΩ
18 pF
V
CC+
V
CC–
18 pF
18 pF
88.4 kΩ
88.4 kΩ
1N4148
1N4148
V
CC–
V
CC+
1 kΩ
– 15 V
6 cos ωt
15 V
18 kΩ
(see Note A)
1 kΩ
6 sin ωt
1/2
TL082
1/2
TL082
18 kΩ
(see Note A)
NOTE A: These resistor values may be adjusted for a symmetrical output.
Figure 26. 100-KHz Quadrature Oscillator
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
1/41/4
Output BOutput A
+
–
1.5 kΩ V
CC–
43 kΩ
220 pF
43 kΩ
V
CC+
30 kΩ
V
CC+
43 kΩ
V
CC–
+
–
16 kΩ
43 kΩ
Input
220 pF 220 pF
16 kΩ
+
–
V
CC–
V
CC+
30 kΩ
V
CC+
43 kΩ
220 pF
43 kΩ
V
CC–
+
–
1.5 kΩ
1/4
TL084
TL084
1/4
TL084
TL084
2 kHz/div
Second-Order Bandpass Filter
fo = 100 kHz, Q = 30, GAIN = 4
2 kHz/div
Cascaded Bandpass Filter
fo = 100 kHz, Q = 69, GAIN = 16
Output A
Output
B
Figure 27. Positive-Feedback Bandpass Filter
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
4040047/D 10/96
0.228 (5,80)
0.244 (6,20)
0.069 (1,75) MAX
0.010 (0,25)
0.004 (0,10)
1
14
0.014 (0,35)
0.020 (0,51)
A
0.157 (4,00)
0.150 (3,81)
7
8
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.010 (0,25)
PINS **
0.008 (0,20) NOM
A MIN
A MAX
DIM
Gage Plane
0.189
(4,80)
(5,00)
0.197
8
(8,55)
(8,75)
0.337
14
0.344
(9,80)
16
0.394
(10,00)
0.386
0.004 (0,10)
M
0.010 (0,25)
0.050 (1,27)
0°–8°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER
4040140/D 10/96
28 TERMINAL SHOWN
B
0.358
(9,09)
MAX
(11,63)
0.560
(14,22)
0.560
0.458
0.858
(21,8)
1.063
(27,0)
(14,22)
A
NO. OF
MINMAX
0.358
0.660
0.761
0.458
0.342
(8,69)
MIN
(11,23)
(16,26)
0.640
0.739
0.442
(9,09)
(11,63)
(16,76)
0.962
1.165
(23,83)
0.938
(28,99)
1.141
(24,43)
(29,59)
(19,32)(18,78)
**
20
28
52
44
68
84
0.020 (0,51)
TERMINALS
0.080 (2,03)
0.064 (1,63)
(7,80)
0.307
(10,31)
0.406
(12,58)
0.495
(12,58)
0.495
(21,6)
0.850
(26,6)
1.047
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.035 (0,89)
0.010 (0,25)
121314151618 17
11
10
8
9
7
5
432
0.020 (0,51)
0.010 (0,25)
6
12826 27
19
21
B SQ
A SQ
22
23
24
25
20
0.055 (1,40)
0.045 (1,14)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
J (R-GDIP-T**) CERAMIC DUAL-IN-LINE PACKAGE
1
20
0.290
(7,87)
0.310
0.975
(24,77)
(23,62)
0.930
(7,37)
0.245
(6,22)
(7,62)
0.300
181614
PINS **
0.290
(7,87)
0.310
0.785
(19,94)
(19,18)
0.755
(7,37)
0.310
(7,87)
(7,37)
0.290
0.755
(19,18)
(19,94)
0.785
0.245
(6,22)
(7,62)
0.300A0.300
(7,62)
(6,22)
0.245
A MIN
A MAX
B MAX
B MIN
C MIN
C MAX
DIM
0.310
(7,87)
(7,37)
0.290
(23,10)
0.910
0.300
(7,62)
(6,22)
0.245
0°–15°
Seating Plane
0.014 (0,36)
0.008 (0,20)
4040083/D 08/98
C
8
7
0.020 (0,51) MIN
B
0.070 (1,78)
0.100 (2,54)
0.065 (1,65)
0.045 (1,14)
14 PIN SHOWN
14
0.015 (0,38)
0.023 (0,58)
0.100 (2,54)
0.200 (5,08) MAX
0.130 (3,30) MIN
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only.
E. Falls within MIL STD 1835 GDIP1-T14, GDIP1-T16, GDIP1-T18, GDIP1-T20, and GDIP1-T22.
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE PACKAGE
0.310 (7,87)
0.290 (7,37)
0.014 (0,36)
0.008 (0,20)
Seating Plane
4040107/C 08/96
5
4
0.065 (1,65)
0.045 (1,14)
8
1
0.020 (0,51) MIN
0.400 (10,20)
0.355 (9,00)
0.015 (0,38)
0.023 (0,58)
0.063 (1,60)
0.015 (0,38)
0.200 (5,08) MAX
0.130 (3,30) MIN
0.245 (6,22)
0.280 (7,11)
0.100 (2,54)
0°–15°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only.
E. Falls within MIL-STD-1835 GDIP1-T8
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
N (R-PDIP-T**) PLASTIC DUAL-IN-LINE PACKAGE
20
0.975
(24,77)
0.940
(23,88)
18
0.920
0.850
14
0.775
0.745
(19,69)
(18,92)
16
0.775
(19,69)
(18,92)
0.745
A MIN
DIM
A MAX
PINS **
0.310 (7,87)
0.290 (7,37)
(23.37)
(21.59)
Seating Plane
0.010 (0,25) NOM
14/18 PIN ONL Y
4040049/C 08/95
9
8
0.070 (1,78) MAX
A
0.035 (0,89) MAX
0.020 (0,51) MIN
16
1
0.015 (0,38)
0.021 (0,53)
0.200 (5,08) MAX
0.125 (3,18) MIN
0.240 (6,10)
0.260 (6,60)
M
0.010 (0,25)
0.100 (2,54)
0°–15°
16 PIN SHOWN
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001 (20 pin package is shorter then MS-001.)
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
P (R-PDIP-T8) PLASTIC DUAL-IN-LINE PACKAGE
4040082/B 03/95
0.310 (7,87)
0.290 (7,37)
0.010 (0,25) NOM
0.400 (10,60)
0.355 (9,02)
58
41
0.020 (0,51) MIN
0.070 (1,78) MAX
0.240 (6,10)
0.260 (6,60)
0.200 (5,08) MAX
0.125 (3,18) MIN
0.015 (0,38)
0.021 (0,53)
Seating Plane
M
0.010 (0,25)
0.100 (2,54)
0°–15°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
4040064/E 08/96
14 PIN SHOWN
Seating Plane
1,20 MAX
1
A
7
14
0,19
4,50
4,30
8
6,20
6,60
0,30
0,75
0,50
0,25
Gage Plane
0,15 NOM
0,65
M
0,10
0°–8°
0,10
PINS **
A MIN
A MAX
DIM
2,90
3,10
8
4,90
5,10
14
6,60
6,404,90
5,10
16
7,70
20
7,90
24
9,60
9,80
28
0,15
0,05
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
U (S-GDFP-F10) CERAMIC DUAL FLATPACK
4040179/B 03/95
1.000 (25,40)
0.080 (2,03)
0.250 (6,35)
0.250 (6,35)
0.019 (0,48)
0.025 (0,64)
0.300 (7,62)
0.045 (1,14)
0.006 (0,15)
0.050 (1,27)
0.015 (0,38)
0.005 (0,13)
0.026 (0,66)
0.004 (0,10)
0.246 (6,10)
0.750 (19,05)
1
10
5
6
0.250 (6,35)
0.350 (8,89)0.350 (8,89)
0.250 (6,35)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only.
E. Falls within MIL STD 1835 GDFP1-F10 and JEDEC MO-092AA
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
28
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
W (R-GDFP-F14) CERAMIC DUAL FLATPACK
0.360 (9,14)
0.240 (6,10)
87
141
0.735 (18,67)
0.235 (5,97)
0.004 (0,10)
0.026 (0,66)
0.015 (0,38)
0.015 (0,38)
0.045 (1,14)
0.335 (8,51)
0.007 (0,18)
0.045 (1,14)
Base and Seating Plane
0.025 (0,64)
0.019 (0,48)
0.390 (9,91)
0.260 (6,60)
0.080 (2,03)
1.000 (25,40)
4040180-2/B 03/95
0.360 (9,14)
0.240 (6,10)
0.280 (7,11)
0.255 (6,48)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only.
E. Falls within MIL STD 1835 GDFP1-F14 and JEDEC MO-092AB
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