•Available in Standard SOIC, MSOP
PowerPAD™, JG, or FK Package
•Evaluation Module Available
DESCRIPTION
The THS4031 and THS4032 are ultralow-voltage
noise, high-speed voltage feedback amplifiers that
are ideal for applications requiring low voltage noise,
including communications and imaging. The single
amplifier THS4031 and the dual amplifier THS4032
offer very good ac performance with 100-MHz
bandwidth (G = 2), 100-V/ms slew rate, and 60-ns
settling time (0.1%). The THS4031 and THS4032 are
unity gain stable with 275-MHz bandwidth. These
amplifiers have a high drive capability of 90 mA and
draw only 8.5-mA supply current per channel. With
–90 dBc of total harmonic distortion (THD) at f = 1
MHz and a very low noise of 1.6 nV/√Hz, the
THS4031 and THS4032 are ideally suited for
applications requiring low distortion and low noise
such as buffering analog-to-digital converters.
SLOS224G –JULY 1999–REVISED MARCH 2010
100-MHz LOW-NOISE HIGH-SPEED AMPLIFIERS
Check for Samples: THS4031, THS4032
DEVICEDESCRIPTION
THS4051/270-MHz High-Speed Amplifiers
THS4081/2175-MHz Low Power High-Speed Amplifiers
space
1
2PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
V
n
I
n
1
10100 1 k
− Voltage Noise −
10
f − Frequency − Hz
VOLTAGE NOISE AND CURRENT NOISE
vs
FREQUENCY
20
10 k100 k
V
n
nV/ Hz
VCC = ± 15 V AND ± 5 V
TA = 25°C
− Current Noise −I
n
pA/ Hz
THS4031
THS4032
SLOS224G –JULY 1999–REVISED MARCH 2010
查询"THS4031M"供应商
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
www.ti.com
AVAILABLE OPTIONS
PACKAGED DEVICES
T
A
0°C to 70°C
–40°C to 85°C
–55°C to 125°C1———THS4031MJGTHS4031MFK—
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) The D and DGN packages are available taped and reeled. Add an R suffix to the device type (that is, THS4031CDGNR).
(3) The PowerPAD™ on the underside of the DGN package is electrically isolated from all other pins and active circuitry. Connection to the
PCB ground plane is recommended, although not required, as this copper plane is typically the largest copper plane on the PCB.
Over operating free-air temperature range (unless otherwise noted).
V
CC
V
I
I
O
V
IO
T
A
T
J
T
stg
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may
result in reduced reliability and/or lifetime of the device. Does not apply to the JG package or FK package.
Supply voltage, V
CC+
to V
Input voltage±V
Output current150mA
Differential input voltage±4V
Continuous total power dissipationSee Dissipation Ratings Table
C-suffix0 to 70
Operating free-air
temperature
I-suffix–40 to 85°C
M-suffix–55 to 125
Maximum junction temperature, (any condition)150°C
Maximum junction temperature, continuous operation, long term reliability
Storage temperature–65 to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds300°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds, JG package300°C
Case temperature for 60 seconds, FK package260°C
DISSIPATION RATINGS TABLE
q
PACKAGE
D167
(2)
DGN
(1) This data was taken using the JEDEC standard Low-K test PCB. For the JEDEC Proposed High-K test PCB, the qJAis 95°C/W with a
(2) This data was taken using 2 oz. trace and copper pad that is soldered directly to a 3-in. × 3-in. PC. For further information, refer to
(1) Full range = 0°C to 70°C for THS403xC and –40°C to 85°C for THS403xI suffix.
(2) Full power bandwidth = slew rate / [√2 pV
(3) Slew rate is measured from an output level range of 25% to 75%.
VCC= ±5 V or ±15 V, V
f = 1 MHz, Gain = 2, TA= 25°C
VCC= ±5 V or ±15 V,
TA= 25°C
VCC= ±5 V or ±15 V,
TA= 25°C
Gain = 2,NTSC and PAL,
O(pp)
= 2 V,
40 IRE modulation,±100 IRE ramp,
Differential phase error°
TA= 25°CRL= 150 Ω
RL= 150 Ω–81
RL= 1 kΩ–96
VCC= ±15 V0.015%
VCC= ±5 V0.02%
VCC= ±15 V0.025
VCC= ±5 V0.03
DC PERFORMANCE
VCC= ±15 V, RL= 1 kΩ, VO= ±10 V
Open loop gaindB
VCC= ±5 V, RL= 1 kΩ, VO= ±2.5 V
V
I
I
Input offset voltageVCC= ±5 V or ±15 VmV
OS
Input bias currentVCC= ±5 V or ±15 VmA
IB
Input offset currentVCC= ±5 V or ±15 VnA
OS
TA= 25°C9398
TA= full range92
TA= 25°C9295
TA= full range91
TA= 25°C0.52
TA= full range3
TA= 25°C36
TA= full range8
TA= 25°C30250
TA= full range400
Offset voltage driftVCC= ±5 V or ±15 VTA= full range2mV/°C
Input offset current driftVCC= ±5 V or ±15 VTA= full range0.2nA/°C
(1) Full range = 0°C to 70°C for THS403xC and –40°C to 85°C for THS403xI suffix.
(2) This parameter is not tested.
(3) Full power bandwidth = slew rate / [√2 pV
0.1% settling timevs Output voltage step size25
Small signal frequency response with varying feedback resistanceGain = 1, VCC= ±15V, RL= 1kΩ26
Frequency response with varying output voltage swingGain = 1, VCC= ±15V, RL= 1kΩ27
Small signal frequency response with varying feedback resistanceGain = 1, VCC= ±15V, RL= 150kΩ28
Frequency response with varying output voltage swingGain = 1, VCC= ±15V, RL= 150kΩ29
Small signal frequency response with varying feedback resistanceGain = 1, VCC= ±5V, RL= 1kΩ30
Frequency response with varying output voltage swingGain = 1, VCC= ±5V, RL= 1kΩ31
Small signal frequency response with varying feedback resistanceGain = 1, VCC= ±5V, RL= 150kΩ32
Frequency response with varying output voltage swingGain = 1, VCC= ±5V, RL= 150kΩ33
Small signal frequency response with varying feedback resistanceGain = 2, VCC= ±5V, RL= 150kΩ34
Small signal frequency response with varying feedback resistanceGain = 2, VCC= ±5V, RL= 150kΩ35
Small signal frequency response with varying feedback resistanceGain = –1, VCC= ±15V, RL= 150kΩ36
Frequency response with varying output voltage swingGain = –1, VCC= ±5V, RL= 150kΩ37
Small signal frequency responseGain = 5, VCC= ±15V, ±5V38
Output amplitudevs Frequency, Gain = 2, VS= ±15V39
Output amplitudevs Frequency, Gain = 2, VS= ±5V40
Output amplitudevs Frequency, Gain = –1, VS= ±15V41
Output amplitudevs Frequency, Gain = –1, VS= ±5V42
Differential phasevs Number of 150Ω loads43, 44
Differential gainvs Number of 150Ω loads45, 46
1-V step responsevs Time47, 48
4-V step responsevs Time49
20-V step responsevs Time50