Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK) and
Flatpacks (W), and Standard Plastic (N) and
Ceramic (J) DIPS
description
The ’ACT32 are quadruple 2-input positive-OR
gates. The devices perform the Boolean function
Y = A + B or Y = A • B in positive logic.
The SN54ACT32 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74ACT32 is characterized for
operation from –40°C to 85°C.
FUNCTION TABLE
(EACH GATE)
INPUTS
AB
HXH
XHH
LLL
OUTPUT
Y
SN54ACT32 ...J OR W PACKAGE
SN74ACT32 . . . D, DB, N, OR PW PACKAGE
SN54ACT32 . . . FK PACKAGE
1Y
NC
2A
NC
2B
NC – No internal connection
1A
1B
1Y
2A
2B
2Y
GND
3 2 1 20 19
4
5
6
7
8
9 10 11 12 13
(TOP VIEW)
1
14
2
13
3
12
4
11
5
10
6
7
(TOP VIEW)
1B1ANC
2Y
NC
GND
V
CC
4B
4A
4Y
3B
3A
9
3Y
8
CC
V
4B
18
4A
17
NC
16
4Y
15
NC
14
3B
3Y
3A
logic symbol
1A
1B
2A
2B
3A
3B
4A
4B
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, N, PW, and W packages.
EPIC is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
†
1
2
4
5
9
10
12
13
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
≥ 1
3
6
8
11
logic diagram (positive logic)
1Y
2Y
3Y
4Y
A
B
Y
Copyright 1996, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
SN54ACT32, SN74ACT32
UNIT
QUADRUPLE 2-INPUT POSITIVE-OR GATES
SCAS530A – AUGUST 1995 – REVISED MA Y 1996
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, VI (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum power dissipation at TA = 55°C (in still air) (see Note 2):D package 1.25 W. . . . . . . . . . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils,
except for the N package, which has a trace length of zero.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER
TEST CONDITIONS
V
UNIT
I
A
V
I
mA
V
I
A
V
I
mA
V
PARAMETER
UNIT
A or B
Y
ns
SN54ACT32, SN74ACT32
QUADRUPLE 2-INPUT POSITIVE-OR GATES
SCAS530A – AUGUST 1995 – REVISED MA Y 1996
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
CC
= –50 µ
OH
OH
OL
I
I
I
CC
‡
n
I
CC
C
†
‡
i
Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
= –24
OH
IOH = –50 mA
IOH = –75 mA
= 50 µ
OL
= 24
OL
IOL = 50 mA
IOL = 75 mA
VI = VCC or GND5.5 V±0.1±1±1µA
VI = VCC or GND,IO = 05.5 V24020µA
One input at 3.4 V ,
Other inputs at VCC or GND
VI = VCC or GND5 V2.6pF
†
†
†
†
4.5 V4.44.44.4
5.5 V5.45.45.4
4.5 V3.863.73.76
5.5 V4.864.74.76
5.5 V3.86
5.5 V3.85
4.5 V0.0010.10.10.1
5.5 V0.0010.10.10.1
5.5 V0.360.50.44
5.5 V0.360.50.44
5.5 V1.65
5.5 V1.65
5.5 V0.61.61.5mA
TA = 25°CSN54ACT32SN74ACT32
MINTYPMAXMINMAXMINMAX
switching characteristics over recommended operating free-air temperature range,
V
= 5 V " 0.5 V (unless otherwise noted) (see Figure 1)
CC
FROMTO
(INPUT)(OUTPUT)
t
PLH
t
PHL
operating characteristics, V
PARAMETERTEST CONDITIONSTYPUNIT
C
pd
Power dissipation capacitanceCL = 50 pF, f = 1 MHz40pF
CC
= 5 V, T
= 25°C
A
TA = 25°CSN54ACT32SN74ACT32
MINTYPMAXMINMAXMINMAX
16.59110
16.59110
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤2.5 ns, tf ≤ 2.5 ns.
C. The outputs are measured one at a time with one input transition per measurement.
Open
500 Ω
500 Ω
LOAD CIRCUIT
Figure 1. Load Circuit and Voltage Waveforms
S1
2 × V
Open
CC
Input
(see Note B)
In-Phase
Output
Out-of-Phase
Output
1.5 V1.5 V
t
PLH
50% V
t
PHL
50% V
VOLTAGE WAVEFORMS
CC
CC
t
PHL
50% V
t
PLH
50% V
CC
CC
3 V
0 V
V
V
V
V
OH
OL
OH
OL
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICA TIONS USING SEMICONDUCT OR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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