Texas Instruments SN74ACT245DBR, SN74ACT245DW, SN74ACT245N, SN74ACT245PWLE, SN74ACT245PWR Datasheet

OPERATION

SN54ACT245, SN74ACT245

OCTAL BUS TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCAS452D – SEPTEMBER 1994 – REVISED JANUARY 2000

D

Inputs Are TTL-Voltage Compatible

D

EPIC

 (Enhanced-Performance Implanted

CMOS) 1-mm Process

D

Package Options Include Plastic
Small-Outline (DW) Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK) and
Flatpacks (W), and Standard Plastic (N) and
Ceramic (J) DIPs

description

These octal bus transceivers are designed for
asynchronous two-way communication between
data buses. The control-function implementation
minimizes external timing requirements.

When the output-enable (OE) is low, the device
passes noninverted data from the A bus to the B
bus or from the B bus to the A bus, depending
upon the logic level at the direction-control (DIR)
input. A high on
buses are effectively isolated.

The SN54ACT245 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74ACT245 is characterized for
operation from –40°C to 85°C.

OE disables the device so that the

SN54ACT245 ...J OR W PACKAGE

SN74ACT245 . . . DB, DW, N, OR PW P ACKAGE

SN54ACT245 . . . FK PACKAGE

A3
A4
A5
A6
A7

DIR

A1
A2
A3
A4
A5
A6
A7
A8

GND

3 2 1 20 19

4
5
6
7
8

9 10 11 12 13

(TOP VIEW)

1

20

2

19

3

18

4

17

5

16

6

15

7

14

8

13

9

12

10

11

(TOP VIEW)

A2A1DIR

A8

V

B8

CC

B7

V
OE
B1
B2
B3
B4
B5
B6
B7
B8

OE

18
17
16
15
14

B6

CC

B1
B2
B3
B4
B5

GND

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

FUNCTION TABLE

(each transceiver)

INPUTS

OE DIR

L L B data to A bus
L H A data to B bus

H X Isolation

Copyright  2000, Texas Instruments Incorporated

On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

1

SN54ACT245, SN74ACT245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS

SCAS452D – SEPTEMBER 1994 – REVISED JANUARY 2000

logic symbol

19

OE

1

DIR

2

A1

3

A2

4

A3

5

A4

6

A5

7

A6

8

A7

9

A8

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.

†

G3
3EN1[BA]

3EN2[AB]

1

logic diagram (positive logic)

1

DIR

19

18

B1

2

17
16
15
14
13
12
11

B2
B3
B4
B5
B6
B7
B8

A1

2

18

To Seven Other Channels

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI (see Note 1) –0.5 V to V
Output voltage range, V
Input clamp current, I
Output clamp current, I
Continuous output current, I

(see Note 1) –0.5 V to V

O

(V

< 0 or VI > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

IK

I

(V

OK

< 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

(V

= 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

O

Continuous current through VCC or GND ±200 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θ

(see Note 2): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

JA

DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

‡

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51.

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

CC
CC

+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

OE

B1

‡

2

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UNIT

PARAMETER

TEST CONDITIONS

V

UNIT

I

50

A

VOHI

mA

V

I

A

VOLI

mA

V

SN54ACT245, SN74ACT245

OCTAL BUS TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCAS452D – SEPTEMBER 1994 – REVISED JANUARY 2000

recommended operating conditions (see Note 3)

SN54ACT245 SN74ACT245

MIN MAX MIN MAX

V
V
V
V
V
I

OH

I

OL

Dt/D

T

NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report

electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)

I

OZ

I

I

I

CC

D

C
C

†

Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms.

‡

For I/O ports, the parameter IOZ includes the input leakage current.

§

This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.

Supply voltage 4.5 5.5 4.5 5.5 V

CC

High-level input voltage 2 2 V

IH

Low-level input voltage 0.8 0.8 V

IL

Input voltage 0 V

I

Output voltage 0 V

O

High-level output current –24 –24 mA
Low-level output current 24 24 mA

v Input transition rise or fall rate 0 8 0 8 ns/V

Operating free-air temperature –55 125 –40 85 °C

A

Implications of Slow or Floating CMOS Inputs

m

= –

OH

= –24

OH

IOH = –50 mA
IOH = –75 mA

= 50

OL

= 24

OL

IOL = 50 mA

IOL = 75 mA
A or B ports‡VO = VCC or GND 5.5 V ±0.5 ±10 ±5
OE or DIR VI = VCC or GND 5.5 V ±0.1 ±1 ±1

VI = VCC or GND, IO = 0 5.5 V 4 80 40

I

i
io

CC

§

One input at 3.4 V ,

Other inputs at GND or V

VI = VCC or GND 5 V 4.5 pF

VO = VCC or GND 5 V 15 pF

†
†

m

†
†

, literature number SCBA004.

CC

4.5 V 4.4 4.49 4.4 4.4

5.5 V 5.4 5.49 5.4 5.4

4.5 V 3.88 3.7 3.76

5.5 V 4.86 4.7 4.76

5.5 V 3.85

5.5 V 3.85

4.5 V 0.001 0.1 0.1 0.1

5.5 V 0.001 0.1 0.1 0.1

4.5 V 0.36 0.5 0.44

5.5 V 0.36 0.5 0.44

5.5 V 1.65

5.5 V 1.65

CC

5.5 V 0.6 1.6 1.5 mA

TA = 25°C SN54ACT245 SN74ACT245

MIN TYP MAX MIN MAX MIN MAX

CC
CC

0 V
0 V

CC
CC

V
V

m

A

m

A

m

A

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3

SN54ACT245, SN74ACT245

PARAMETER

UNIT

A or B

B or A

ns

OE

A or B

ns

OE

A or B

ns

OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS

SCAS452D – SEPTEMBER 1994 – REVISED JANUARY 2000

switching characteristics over recommended operating free-air temperature range,
V

= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)

CC

TA = 25°C SN54ACT245 SN74ACT245

MIN TYP MAX MIN MAX MIN MAX

1 4 7.5 1 9 1.5 8
1 4 8 1 10 1 9
1 5 10 1 12 1.5 11
1 5.5 10 1 13 1.5 12
1 5.5 10 1 12 1 11
1 5 10 1 12 1.5 11

t

PLH

t

PHL

t

PZH

t

PZL

t

PHZ

t

PLZ

FROM TO

(INPUT) (OUTPUT)

operating characteristics, V

C

Power dissipation capacitance CL = 50 pF, f = 1 MHz 45 pF

pd

= 5 V, T

CC

PARAMETER TEST CONDITIONS TYP UNIT

PARAMETER MEASUREMENT INFORMATION

From Output

Under Test

CL = 50 pF

(see Note A)

LOAD CIRCUIT

Input

t

PLH

Output

NOTES: A. CL includes probe and jig capacitance.

1.5 V 1.5 V

VOLTAGE WAVEFORMS

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one input transition per measurement.

500 Ω

500 Ω

50% V

S1

CC

2 × V

Open

t

PHL

50% V

= 25°C

A

CC

3 V

0 V

V

OH

CC

V

OL

Output

Control

(low-level

enabling)

Output

Waveform 1

S1 at 2 × V

(see Note B)

Output

Waveform 2

S1 at Open

(see Note B)

CC

TEST S1

t

PLH/tPHL

t

PLZ/tPZL

t

PHZ/tPZH

1.5 V 1.5 V

t

PZL

50% V

t

PZH

50% V

VOLTAGE WAVEFORMS

Open

2 × V

Open

CC

CC

CC

t

PLZ

VOL + 0.3 V

t

PHZ

VOH – 0.3 V

3 V

0 V

≈V

V

OL

V

OH

≈0 V

CC

Figure 1. Load Circuit and Voltage Waveforms

4

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Copyright  2000, Texas Instruments Incorporated