TEXAS INSTRUMENTS CY74FCT16827T Technical data

1CY74FCT162827T
Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered.
CY74FCT16827T
CY74FCT162827T
SCCS064 - August 1994 - Revised March 2000
• FCT-E speed at 3.2 ns
• Power-off disable outputs permits live insertion
• Edge-rate control circuitry for significantly improved noise characteristics
• Typical output skew < 250 ps
• ESD > 2000V
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages
• Industrial temperature range of 40˚C to +85˚C
•V
= 5V ± 10%
CC
CY74FCT16827T Features:
• 64 mA sink current, 32 mA source current
• Typical V TA = 25˚C
(ground bounce) <1.0V at VCC = 5V,
OLP
CY74FCT162827T Features:
• Balanced 24 mA output drivers
• Reduced system switching noise
• Typical V
Functional Description
The CY74FCT16827T 20-bit buffer/line driver and the CY74FCT162827T 20-bit buffer/line driver provide high-performance bus interf ace b uff ering for wide data/address pathsor busescarrying parity .Thesepartscanbeusedas a single 20-bit buffer or two 10-bit buff ers . Each 10-bit buffer has a pair of NANDed a power-off disable f eature to allo w for liv e insertion of boards.
The CY74FCT16827T is ideally suited for driving high-capacitance loads and low-impedance backplanes.
The CY74FCT162827T has 24-mA balanced output drivers
20-Bit Buffers/Line Drivers
(ground bounce) <0.6V at VCC = 5V,
TA= 25˚C
OLP
OEforincreasedflexibility. The outputs are designed with
with current-limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162827T is ideal for driving transmission lines.
Logic Block Diagrams Pin Configuration
1OE1 1OE2
1A1
2OE1 2OE2
2A1
TO 9 OTHER CHANNELS
TO 9 OTHER CHANNELS
1Y1
FCT16827-1
2Y1
FCT16827-2
1OE1
1Y1 1Y2
GND
1Y3 1Y4
V
1Y5 1Y6 1Y7
GND
1Y8 1Y9
1Y10
2Y1 2Y2 2Y3
GND
2Y4 2Y5 2Y6
V
2Y7 2Y8
GND
2Y9 2Y10
2OE1
CC
CC
SSOP/TSSOP
Top View
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
56 55 54 53 52 51 50 49 48 47
46 45 44 43 42 41 40 39 38 37 36 35 34 33
32 31
30 29
1OE2 1A1 1A2
GND
1A3 1A4
V
CC 1A5 1A6 1A7
GND
1A8 1A9 1A10
2A1 2A2 2A3
GND
2A4 2A5 2A6
V
CC 2A7 2A8
GND
2A9 2A10 2OE2
FCT16827-3
Copyright © 2000, Texas Instruments Incorporated
CY74FCT16827T
CY74FCT162827T
Pin Description
Name Description
OE Output Enable Inputs (Active LOW) A Data Inputs Y Three-State Outputs
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature............................... 55°C to +125°C
Ambient Temperature with
Power Applied.......................................... 55°C to +125°C
[2, 3]
DC Input Voltage .................................................−0.5V to +7.0V
Function Table
OE
1
L L L L L L H H
[1]
Inputs Outputs
OE
2
A Y
DC Output Voltage..............................................−0.5V to +7.0V
DC Output Current
(Maximum Sink Current/Pin)...........................−60 to +120 mA
Power Dissipation..........................................................1.0W
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
H X X Z X H X Z
Operating Range
Ambient
Range
Temperature V
Industrial 40°C to +85°C 5V ± 10%
Electrical Characteristics Over the Operating Range
Parameter Description Test Conditions Min. Typ.
V V V V I
IH
I
IL
I
OZH
I
OZL
I
OS
I
O
I
OFF
IH IL H IK
Input HIGH Voltage 2.0 V Input LOW Voltage 0.8 V Input Hysteresis
[5]
Input Clamp Diode Voltage VCC=Min., IIN=18 mA 0.7 1.2 V Input HIGH Current VCC=Max., VI=V
CC
Input LOW Current VCC=Max., VI=GND ±1 µA High Impedance Output
Current (Three-State Output pins) High Impedance Output
Current (Three-State Output pins) Short Circuit Current Output Drive Current
[6] [6]
Power-Off Disable VCC=0V, V
VCC=Max., V
VCC=Max., V
VCC=Max., V VCC=Max., V
OUT
=2.7V ±1 µA
OUT
=0.5V ±1 µA
OUT
=GND 80 140 200 mA
OUT
=2.5V 50 180 mA
OUT
[7]
4.5V
CC
[4]
Max. Unit
100 mV
±1 µA
±1 µA
Output Drive Characteristics for CY74FCT16827T
Parameter Description Test Conditions Min. Typ.
V
OH
Output HIGH Voltage VCC=Min., IOH=3 mA 2.5 3.5 V
VCC=Min., IOH=15 mA 2.4 3.5 VCC=Min., IOH=32 mA 2.0 3.0
V
OL
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care.Z = HIGH Impedance.
2. Operation beyond the limits set forth may impair the useful life of the device. Unless noted, these limits are over the operating free-air temperature range.
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
4. Typical values are at V
5. This parameter is specified but not tested.
6. Not more than one output should be shorted at a time. Duration ofshort should notexceedone second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heatingandmoreaccuratelyreflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, I
7. Tested at +25˚C.
Output LOW Voltage VCC=Min., IOL=64 mA 0.2 0.55 V
= 5.0V, TA= +25˚C ambient.
CC
tests should be performed last.
OS
2
[4]
Max. Unit
CY74FCT16827T
CY74FCT162827T
Output Drive Characteristics for CY74FCT162827T
Parameter Description Test Conditions Min. Typ.
I
ODL
I
ODH
V V
OH OL
Output LOW Current Output HIGH Current Output HIGH Voltage VCC=Min., IOH=24 mA 2.4 3.3 V Output LOW Voltage VCC=Min., IOL=24 mA 0.3 0.55 V
[6]
[6]
VCC=5V, VIN=VIH or VIL, V VCC=5V, VIN=VIH or VIL, V
=1.5V 60 115 150 mA
OUT
=1.5V 60 115 150 mA
OUT
[4]
Max. Unit
Capacitance
[5]
(TA = +25˚C, f = 1.0 MHz)
Parameter Description Test Conditions Typ.
C C
IN OUT
Input Capacitance VIN = 0V 4.5 6.0 pF Output Capacitance V
= 0V 5.5 8.0 pF
OUT
Power Supply Characteristics
Parameter Description Test Conditions Min. Typ.
I
CC
I
CC
I
CCD
I
C
Notes:
8. Per TTL driven input (V
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. I
C
IC=ICC+ICCDHNT+I I
CC
I D N I
CCD
f
0
f
1
N All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the I
Quiescent Power Supply
VCC=Max. VIN<0.2V,
Current Quiescent Power Supply
VCC=Max. VIN=3.4V
Current (TTL inputs HIGH) Dynamic Power Supply
Current
[9]
VCC=Max., One Input Toggling, 50% Duty Cycle, Outputs Open, OE1=OE2=GND,
Total Power Supply Current
[10]
VCC=Max., f
=10 MHz,
1
50% Duty Cycle, Outputs Open, One Bit Toggling, OE1=OE2=GND
VCC=Max., f
=2.5 MHz,
1
50% Duty Cycle, Outputs Open, Twenty Bits Toggling, OE1=OE2=GND
=3.4V); all other inputs at VCC or GND.
IN
=I
QUIESCENT
= Quiescent Current with CMOS input levels = Power Supply Current for a TTL HIGH input (VIN=3.4V)
CC
= Duty Cycle for TTL inputs HIGH
H
= Number of TTL inputs at D
T
= Dynamic Current caused by an input transition pair (HLH or LHL) = Clock frequency for registered devices, otherwise zero = Input signal frequency = Number of inputs changing at f
1
+ I
INPUTS
CCD(f0
+ I
DYNAMIC
/2 + f1N1)
H
1
formula. These limits are specified but not tested.
CC
V
IN>VCC
0.2V
[8]
VIN=VCC or V
=GND
IN
VIN=VCC or V
=GND
IN
VIN=3.4V or V
=GND
IN
VIN=VCC or V
=GND
IN
VIN=3.4V or V
=GND
IN
5 500 µA
0.5 1.5 mA
60 100 µA/MHz
0.6 1.5 mA
0.9 2.3
3.0 5.5
8.0 20.5
[4]
Max. Unit
[4]
Max. Unit
[11]
[11]
3
CY74FCT16827T
CY74FCT162827T
Switching Characteristics Over the Operating Range
[12]
CY74FCT16827AT
CY74FCT162827AT CY74FCT162827BT
=500
L
=500
L
=500
L
=500
L
=500
L
=500
L
=500
L
=500
L
=500
L
=500
L
=500
L
=500
L
[13]
Min. Max. Min. Max. Unit Fig. No.
1.5 8.0 1.5 5.0 ns 1, 3
1.5 15.0 1.5 13.0
1.5 12.0 1.5 8.0 ns 1, 7, 8
1.5 23.0 1.5 15.0
1.5 9.0 1.5 6.0 ns 1, 7, 8
1.5 10.0 1.5 7.0
0.5 0.5 ns
CY74FCT16827CT
CY74FCT162827CT
[12]
Min. Max. Min. Max. Unit Fig. No.
1.5 4.2 1.5 3.2 ns 1, 3
1.5 10.0 1.5 7.0
1.5 5.6 1.5 4.8 ns 1, 7, 8
1.5 14.0 1.5 9.0
1.5 5.7 1.5 4.0 ns 1, 7, 8
1.5 6.0 1.5 4.0
0.5 0.5 ns
CY74FCT16827ET
CY74FCT162827ET
Parameter Description Condition
t
PLH
t
PHL
Propagation Delay A to Y
CL=50 pF R
CL=300 pF
R
t
PZH
t
PZL
Output Enable Time OE to Y
CL=50 pF R
CL=300 pF
R
t
PHZ
t
PLZ
Output Disable Time OE to Y
CL=5 pF
R CL=50 pF
R
t
SK(O)
Output Skew
[14]
Parameter Description Condition
t
PLH
t
PHL
Propagation Delay A to Y
CL=50 pF R
CL=300 pF
R
t
PZH
t
PZL
Output Enable Time OE to Y
CL=50 pF R
CL=300 pF
R
t
PHZ
t
PLZ
Output Disable Time OE to Y
CL=5 pF
R CL=50 pF
R
t
SK(O)
Notes:
12. Minimum limits are specified but not tested on Propagation Delays.
13. See “Parameter Measurement Information” in the General Information section.
14. Skew between any two outputs of the same package switching in the same direction. This parameter is ensured by design.
Output Skew
[14]
[13]
[13]
4
CY74FCT16827T
CY74FCT162827T
Ordering Information CY74FCT16827
Speed
(ns) Ordering Code
3.2 CY74FCT16827ETPACT Z56 56-Lead (240-Mil) TSSOP Industrial CY74FCT16827ETPVC/PVCT O56 56-Lead (300-Mil) SSOP
4.2 CY74FCT16827CTPACT Z56 56-Lead (240-Mil) TSSOP Industrial CY74FCT16827CTPVC/PVCT O56 56-Lead (300-Mil) SSOP
8.0 CY74FCT16827ATPVC/PVCT Z56 56-Lead (240-Mil) TSSOP Industrial
Document #: 3800393–C
Ordering Information CY74FCT162827
Speed
(ns) Ordering Code
3.2 74FCT162827ETPACT Z56 56-Lead (240-Mil) TSSOP Industrial CY74FCT162827ETPVC O56 56-Lead (300-Mil) SSOP 74FCT162827ETPVCT O56 56-Lead (300-Mil) SSOP
4.2 74FCT162827CTPACT Z56 56-Lead (240-Mil) TSSOP Industrial CY74FCT162827CTPVC Z56 56-Lead (240-Mil) TSSOP 74FCT162827CTPVCT Z56 56-Lead (240-Mil) TSSOP
5.0 CY74FCT162827BTPVC O56 56-Lead (300-Mil) SSOP Industrial 74FCT162827BTPVCT O56 56-Lead (300-Mil) SSOP
8.0 CY74FCT162827ATPVC O56 56-Lead (300-Mil) SSOP Industrial 74FCT162827ATPVCT O56 56-Lead (300-Mil) SSOP
Package
Name Package Type
Package
Name Package Type
Operating
Range
Operating
Range
5
Package Diagrams
CY74FCT16827T
CY74FCT162827T
56-Lead Shrunk Small Outline Package O56
56-Lead Thin Shrunk Small Outline Package
Z56
6
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Copyright 2000, Texas Instruments Incorporated
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