TEXAS INSTRUMENTS CDC204 Technical data
查询CDC204供应商
CDC204
HEX INVERTER/CLOCK DRIVER
SCAS098E – OCTOBER 1989– REVISED OCTOBER 1998
D
CDC204 Replaces 74AC11204
D
Low-Skew Propagation Delay
Specifications for Clock-Driver Applications
D
CMOS-Compatible Inputs and Outputs
D
Flow-Through Architecture Optimizes
PCB Layout
D
Center-Pin VCC and GND Pin
Configurations Minimize High-Speed
Switching Noise
D
EPIC
(Enhanced-Performance Implanted
CMOS) 1-µm Process
D
500-mA Typical Latch-Up Immunity at
125°C
D
Package Options Include Plastic
Small-Outline Package (DW))
DW PACKAGE
(TOP VIEW)
1Y
1
2Y
2
3Y
3
GND
GND
GND
GND
4
5
6
7
8
4Y
9
5Y
10
6Y
NC – No internal connection
20
19
18
17
16
15
14
13
12
11
1A
2A
3A
NC
V
V
NC
4A
5A
6A
CC
CC
description
The CDC204 contains six independent inverters. The device performs the Boolean function Y = A. It is designed
specifically for applications requiring low skew between switching outputs.
The CDC204 is characterized for operation from T
FUNCTION TABLE
INPUT
= 25°C to 70°C.
A
OUTPUT
A
H L
L H
Y
logic symbol
20
1A
19
2A
18
3A
13
4A
12
5A
11
6A
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
†
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
10
logic diagram (positive logic)
1
1Y
2
2Y
3
3Y
8
4Y
9
5Y
6Y
1A
2A
3A
4A
5A
6A
20
19
18
13
12
11
Copyright 1998, Texas Instruments Incorporated
10
1
1Y
2
2Y
3
3Y
8
4Y
9
5Y
6Y
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
CDC204
VIHHigh-level input voltage
V
VILLow-level input voltage
V
IOHHigh-level output current
mA
IOLLow-level output current
mA
HEX INVERTER/CLOCK DRIVER
SCAS098E – OCTOBER 1989– REVISED OCTOBER 1998
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
Output voltage range, V
Input clamp current, I
Output clamp current, I
Continuous output current, I
Continuous current through V
Maximum power dissipation at T
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils.
For more information, refer to the
Data Book
, literature number SCBD002B.
(see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
(see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
(VI < 0 or VI > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
(VO < 0 or VO > VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OK
(VO = 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
or GND ±150 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
= 55°C (in still air) (see Note 2) 1.6 W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
Package Thermal Considerations
application note in the 1994
ABT Advanced BiCMOS T echnology
recommended operating conditions
MIN NOM MAX UNIT
V
CC
V
I
∆t/∆v Input transition rise or fall rate 0 10 ns/V
f
clock
T
A
Supply voltage 4.75 5 5.25 V
p
p
Input voltage 0 V
p
p
Input clock frequency 80 MHz
Operating free-air temperature 25 70 °C
VCC = 4.75 V 3.3
VCC = 5.25 V 3.7
VCC = 4.75 V 1.4
VCC = 5.25 V 1.6
CC
VCC = 4.75 V –24
VCC = 5.25 V –24
VCC = 4.75 V 24
VCC = 5.25 V 24
V
†
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
V
V
I
A
V
V
V
V
I
24 mA
V
5.25 V
V
V
I
A
V
5.25 V
V
4.75 V
I
mA
V
V
IIInput current
V
V
GND
V
V
A
ICCSupply current
ICC
,
A
A
Y
ns
CDC204
HEX INVERTER/CLOCK DRIVER
SCAS098E – OCTOBER 1989– REVISED OCTOBER 1998
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS
= 4.75
CC
= –50 µ
OH
= 5.25
CC
V
High-level voltage output
OH
= –
OH
IOH = –75 mA‡, VCC = 5.25 V Full range 3.6
= 50 µ
OL
V
Low-level voltage output
OL
= 24
OL
IOL = 75 mA‡, VCC = 5.25 V Full range 1.65
p
pp
C
Input capacitance VI = VCC or GND, VCC = 5 V 25°C 4 pF
i
†
Full range is TA = 25°C to 70°C.
‡
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
=
I
V
= V
IO = 0
or
CC
or GND,
= 4.75
CC
=
CC
= 4.75
CC
=
CC
=
CC
= 5.25
CC
= 5.25
CC
VCC = 5.25 V,
†
T
A
25°C 4.65
Full range 4.65
25°C 5.15
Full range 5.15
25°C 4.19
Full range 4.05
25°C 4.68
Full range 4.55
25°C 0.1
Full range 0.1
25°C 0.1
Full range 0.1
25°C 0.36
Full range 0.44
25°C 0.36
Full range 0.44
25°C ±0.1
Full range ±1
25°C 4
Full range 40
MIN TYP MAX UNIT
V
V
µ
µ
switching characteristics over recommended operating free-air temperature range,
= 5 V ± 0.25 V (see Note 3 and Figures 1 and 2)
V
CC
PARAMETER
t
Propagation delay time, low-to-high level (see Figure 1)
PLH
t
Proagation delay time, high-to-low level (see Figure 1)
PHL
t
Output skew time (see Figure 2) A Y 1 ns
sk(o)
NOTE 3: All specifications are valid only for all outputs switching simultaneously and in phase.
FROM
(INPUT)
TO
(OUTPUT)
MIN MAX UNIT
3.7 5.7
2.9 5.7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
Loading...