Texas Instruments 74ACT11374DBLE, 74ACT11374NT, 74ACT11374DWR, 74ACT11374DW Datasheet

74ACT11374

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP

WITH 3-STATE OUTPUTS

SCAS217A – JULY 1987 – REVISED APRIL 1996

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Eight D-Type Flip-Flops in a Single Package

3-State Bus Driving True Outputs

Full Parallel Access for Loading

Inputs Are TTL-Voltage Compatible

Flow-Through Architecture Optimizes PCB Layout

Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise

EPIC

(Enhanced-Performance Implanted

CMOS) 1-mm Process

500-mA Typical Latch-Up Immunity at 125°C

Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-mil DIPs (NT)

description

This 8-bit flip-flop features 3-state outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops of the 74ACT1 1374 are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

An output-enable (OE

) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly . The high-impedance third state provides the capability to drive bus lines in a bus-organized system without need for interface or pullup components.

does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state. The 74ACT11374 is characterized for operation from –40°C to 85°C.

FUNCTION TABLE

(each flip-flop)

INPUTS

OUTPUT

OE CLK D

L ↑ H H L ↑ LL L LX Q

L HX Q

L ↓ XQ

H X X Z

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

1 2 3 4 5 6 7 8 9 10 11 12

24 23 22 21 20 19 18 17 16 15 14 13

1Q 2Q 3Q

4Q GND GND GND GND

OE 1D 2D 3D 4D V

5D 6D 7D 8D CLK

DB, DW, OR NT PACKAGE

(TOP VIEW)

74ACT11374 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

SCAS217A – JULY 1987 – REVISED APRIL 1996

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic symbol

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

CLK

logic diagram (positive logic)

CLK

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