Supermicro X11SPL-F User Manual

X11SPL-F
USER'S MANUAL
Revision 1.0b
The information in this user’s manual has been carefully reviewed and is believed to be accurate. The manufacturer assumes no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates.
Please Note: For the most up-to-date version of this manual, please see our website at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual at any time and without notice. This product, including software and documentation, is the property of Supermicro and/ or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except as expressly permitted by the terms of said license.
IN NO EVENT WILL Super Micro Computer, Inc. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the manufacturer’s instruction manual, may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely to cause harmful interference, in which case you will be required to correct the interference at your own expense.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”.
WARNING: Handling of lead solder materials used in this product may expose you to lead, a chemical known to the State of California to cause birth defects and other reproductive harm.
The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical
systems whose failure to perform be reasonably expected to result in signicant injury or loss of life or catastrophic
property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products for use in such ultra-hazardous applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and proceedings of any kind arising out of or related to such ultra-hazardous use or sale.
Manual Revision 1.0b
Release Date: April 04, 2018
Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this
document. Information in this document is subject to change without notice. Other products and companies referred
to herein are trademarks or registered trademarks of their respective companies or mark holders.
Copyright © 2018 by Super Micro Computer, Inc. All rights reserved.
Printed in the United States of America
Preface
Preface
About This Manual
This manual is written for system integrators, IT technicians and knowledgeable end users. It provides information for the installation and use of the X11SPL-F motherboard.
About This Motherboard
The Supermicro X11SPL-F motherboard supports an Intel® Xeon 81xx/61xx/51xx/41xx/31xx series (Socket P0-LGA 3647) processor with up to 28 cores and a thermal design power (TDP) of up to165W. Built with the Intel PCH C621 chipset, the motherboard supports 6-channel, 8-DIMM DDR4 ECC RDIMM/LRDIMM memory with speeds of up to 2666MHz. It features such technologies as the Intel Virtualization Technology for Directed I/O for improved security and system reliability. The X11SPL-F includes PCI-Express 3.0 slots, SATA 3.0 ports, dual 1G Base-T LAN support, and an M.2 slot (Type 2280 and 22110). This motherboard is ideal for I/O intensive application and video surveillance. Please note that this motherboard is intended to be installed and serviced by professional technicians only. For processor/memory updates, please refer to our website at http://www.supermicro.com/products/.
Conventions Used in the Manual
Special attention should be given to the following symbols for proper installation and to prevent
damage done to the components or injury to yourself:
Warning! Indicates important information given to prevent equipment/property damage
or personal injury.
Warning! Indicates high voltage may be encountered while performing a procedure.
Important: Important information given to ensure proper system installation or to
relay safety precautions.
Note: Additional Information given to differentiate various models or provides infor­mation for proper system setup.
3
Super X11SPL-F User's Manual
Contacting Supermicro
Headquarters
Address: Super Micro Computer, Inc.
980 Rock Ave.
San Jose, CA 95131 U.S.A.
Tel: +1 (408) 503-8000
Fax: +1 (408) 503-8008
Email: marketing@supermicro.com (General Information)
support@supermicro.com (Technical Support)
Website: www.supermicro.com
Europe
Address: Super Micro Computer B.V.
Het Sterrenbeeld 28, 5215 ML
's-Hertogenbosch, The Netherlands
Tel: +31 (0) 73-6400390
Fax: +31 (0) 73-6416525
Email: sales@supermicro.nl (General Information)
support@supermicro.nl (Technical Support)
rma@supermicro.nl (Customer Support)
Website: www.supermicro.nl
Asia-Pacic
Address: Super Micro Computer, Inc.
3F, No. 150, Jian 1st Rd.
Zhonghe Dist., New Taipei City 235
Taiwan (R.O.C)
Tel: +886-(2) 8226-3990
Fax: +886-(2) 8226-3992
Email: support@supermicro.com.tw
Website: www.supermicro.com.tw
4
Preface
Table of Contents
Chapter 1 Introduction
1.1 Checklist ...............................................................................................................................8
Quick Reference ...............................................................................................................11
Quick Reference Table ......................................................................................................12
Motherboard Features .......................................................................................................14
1.2 Processor and Chipset Overview .......................................................................................18
1.3 Special Features ................................................................................................................18
Recovery from AC Power Loss .........................................................................................18
1.4 System Health Monitoring ..................................................................................................19
Onboard Voltage Monitors ................................................................................................19
Fan Status Monitor with Firmware Control .......................................................................19
Environmental Temperature Control .................................................................................19
System Resource Alert......................................................................................................19
1.5 ACPI Features ....................................................................................................................19
1.6 Power Supply .....................................................................................................................20
1.7 Serial Port ...........................................................................................................................20
Chapter 2 Installation
2.1 Static-Sensitive Devices .....................................................................................................21
Precautions .......................................................................................................................21
Unpacking .........................................................................................................................21
2.2 Processor and Heatsink Installation ...................................................................................22
The Intel Xeon 81xx/61xx/51xx/41xx/31xx Series Processor ...........................................22
Overview of the Processor Carrier Assembly ...................................................................23
Overview of the CPU Socket ............................................................................................23
Overview of the Processor Heatsink Module ....................................................................24
Creating the Non-F Model Processor Carrier Assembly...................................................25
Assembling the Processor Heatsink Module ....................................................................26
Preparing the CPU Socket for Installation ........................................................................27
Installing the Processor Heatsink Module .........................................................................28
Removing the Processor Heatsink Module .......................................................................29
2.3 Motherboard Installation .....................................................................................................30
5
Super X11SPL-F User's Manual
Tools Needed ....................................................................................................................30
Location of Mounting Holes ..............................................................................................30
Installing the Motherboard.................................................................................................31
2.4 Memory Support and Installation .......................................................................................32
Memory Support ................................................................................................................32
General Guidelines for Optimizing Memory Performance ................................................33
DIMM Installation ..............................................................................................................34
DIMM Removal .................................................................................................................34
2.5 Rear I/O Ports ....................................................................................................................35
2.6 Front Control Panel ............................................................................................................40
2.7 Connectors .........................................................................................................................45
Power Connections ...........................................................................................................45
Headers .............................................................................................................................47
2.8 Jumper Settings .................................................................................................................56
How Jumpers Work ...........................................................................................................56
2.9 LED Indicators ....................................................................................................................59
Chapter 3 Troubleshooting
3.1 Troubleshooting Procedures ..............................................................................................62
Before Power On ..............................................................................................................62
No Power ..........................................................................................................................62
No Video ...........................................................................................................................63
System Boot Failure .......................................................................................................63
Memory Errors ..................................................................................................................63
Losing the System's Setup Conguration .........................................................................64
When the System Becomes Unstable ..............................................................................64
3.2 Technical Support Procedures ...........................................................................................66
3.3 Frequently Asked Questions ..............................................................................................67
3.4 Battery Removal and Installation .......................................................................................68
Battery Removal ................................................................................................................68
Proper Battery Disposal ....................................................................................................68
Battery Installation .............................................................................................................68
3.5 Returning Merchandise for Service ....................................................................................69
6
Preface
Chapter 4 BIOS
4.1 Introduction .........................................................................................................................70
4.2 Main Setup .........................................................................................................................71
4.3 Advanced Setup Congurations .........................................................................................73
4.4 Event Logs .......................................................................................................................100
4.5 IPMI ..................................................................................................................................102
4.6 Security .............................................................................................................................105
4.7 Boot .................................................................................................................................109
4.8 Save & Exit .......................................................................................................................112
Appendix A BIOS Codes
Appendix B Software Installation
B.1 Installing Software Programs ...........................................................................................11 6
B.2 SuperDoctor® 5 .................................................................................................................117
Appendix C Standardized Warning Statements
Battery Handling ..............................................................................................................118
Product Disposal .............................................................................................................120
Appendix D UEFI BIOS Recovery
7
Super X11SPL-F User's Manual
Chapter 1
Introduction
Congratulations on purchasing your computer motherboard from an industry leader. Supermicro motherboards are designed to provide you with the highest standards in quality and performance.
In additon to the motherboard, several important parts that are included in the retail box are listed below. If anything listed is damaged or missing, please contact your retailer.
1.1 Checklist
Main Parts List
Description Part Number Quantity
Supermicro Motherboard X11SPL-F 1
I/O Shield MCP-260-00109-0N 1
SATA Cables CBL-0044L 6
Quick Reference Guide MNL-1950-QRG 1
Important Links
For your system to work properly, please follow the links below to download all necessary drivers/utilities and the user’s manual for your server.
Supermicro product manuals: http://www.supermicro.com/support/manuals/
Product drivers and utilities: ftp://ftp.supermicro.com
Product safety info: http://www.supermicro.com/about/policies/safety_information.cfm
If you have any questions, please contact our support team at: support@supermicro.com
This manual may be periodically updated without notice. Please check the Supermicro website
for possible updates to the manual revision level.
8
Figure 1-1. X11SPL-F Motherboard Image
Chapter 1: Introduction
Note: All graphics shown in this manual were based upon the latest PCB revision available at the time of publication of the manual. The motherboard you received may or may not look exactly the same as the graphics shown in this manual.
9
Super X11SPL-F User's Manual
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
JL1
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
COM2
JPG1
JD1
USB10/11(3.0)
SP1 +
USB2/3
USB4/5
JOH1
I-SGPIO1
JBT1
JIPMB1
I-SATA0 I-SATA1
JSD2
JSD1
Figure 1-2. X11SPL-F Motherboard Layout
ASpeed
AST2500
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT2 PCI-E 3.0 X8
FANB
CPU SLOT4 PCI-E 3.0 X8(IN X16)
BIOS
LICENSE
Intel
C621
JPME2
JPL2
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT5 PCI-E 3.0 X8
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
(not drawn to scale)
UID-SW
UID-LED
CPU SLOT7 PCI-E 3.0 X8
BT1
JF1
ON
PWR UID
RST
FAIL 1
PS
USB12(3.0)
LED
NIC
JF1
2
NIC
PWRHDD
LEDLED
NMIX
FAN4
+
USB6/7
JTPM1
LEDPWR
VGA
DIMMC1
JNVI2C1
FAN3
DIMMA2
DIMMA1
DIMMB1
BAR CODE
MAC CODE
IPMI CODE
FAN2
USB8/9(3.0)
COM1
LAN1LAN2
JLAN1JLAN2
IPMI_LAN
USB0/1
DIMME1
DIMMD1
DIMMD2
DIMMF1
FAN5
CPU
JPWR1
JPWR2
JSTBY1
JPI2C1
FAN1
Note: Components not documented are for internal testing only.
10
Quick Reference
SLOT1
COM2
JWD1
JPG1
MH10
USB10/11 (3.0)
USB2/3
MH11
USB4/5
JOH1
JIPMB1
JRK1
S-SGPIO1 S-SGPIO2
I-SATA2 I-SATA3 I-SATA4 I-SATA5 I-SATA6
I-SATA7
JD1
SP1
JL1
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
I-SATA0
JWD1
JRK1
JL1
I-SATA1
SLOT2
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
COM2
JPG1
JD1
USB10/11(3.0)
SP1 +
USB2/3
USB4/5
JOH1
I-SGPIO1
JBT1
JIPMB1
I-SATA0 I-SATA1
JSD2
JSD1
JSD1
FANB
SLOT4
SLOT3
ASpeed
AST2500
LEDBMC
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT2 PCI-E 3.0 X8
BIOS
LICENSE
Intel
C621
FANB
JPME2
JSD2
JBT1
JPME2
FANA
M.2 PCI-E 3.0 X4
JPL2
SLOT6
SLOT7
SLOT5
JPL1
JPL2
JPL1
CPU SLOT4 PCI-E 3.0 X8(IN X16)
DESIGNED IN USA
LE3
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT5 PCI-E 3.0 X8
REV:1.01
X11SPL-F
MH10
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
BT1
JTPM1
BT1
JTPM1
USB6/7
USB12 (3.0)
UID-LED
UID-SW
VGA
UID-SW
UID-LED
CPU SLOT7 PCI-E 3.0 X8
JF1
ON
PWR UID
RST
FAIL 1
PS
USB12(3.0)
LED
NIC
2
+
NIC
PWRHDD
LEDLED
USB6/7
NMIX
LEDPWR
FAN4
JF1
JF1
FAN4
LEDPWR
VGA
JNVI2C1
FAN3
FAN3
FAN2
LAN2
DIMMA2
DIMMA1
DIMMB1
DIMMC1
BAR CODE
MAC CODE
IPMI CODE
FAN2
JNVI2C1
USB8/9 (3.0)
IPMI_LAN
USB0/1
LAN1
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
JPWR2
Chapter 1: Introduction
COM1
COM1
FAN5
FAN5
IPMI_LAN
USB0/1
DIMMF1
DIMME1
DIMMD1
DIMMD2
DIMMC1 DIMMB1
DIMMA1 DIMMA2
DIMMD2 DIMMD1
DIMME1 DIMMF1
CPU
JPWR2
JSTBY1
JPWR1
JSTBY1
FAN1
FAN1
JPWR1
JPI2C1
JPI2C1
Notes:
See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel con-
nections.
" " indicates the location of Pin 1.
Jumpers/LED indicators not indicated are used for testing only.
Use only the correct type of onboard CMOS battery as specied by the manufacturer. Do
not install the onboard battery upside down to avoid possible explosion.
11
Super X11SPL-F User's Manual
Quick Reference Table
Jumper Description Default Setting
JBT1 CMOS Clear Open (Normal)
JPG1 VGA Enable/Disable Pins 1-2 (Enabled)
JPL1 LAN1 Enable/Disable Pins 1-2 (Enabled)
JPL2 LAN2 Enable/Disable Pins 1-2 (Enabled)
JPME2 ME Manufacturing Mode Pins 1-2 (Normal)
JWD1 Watchdog Timer Pins 1-2 (Reset)
LED Description Status
LE3 M.2 LED Blinking Green: Device Working
LEDBMC BMC Heartbeat LED Blinking Green: BMC Normal
LEDPWR Onboard Power LED Solid Green: Power On
UID-LED Unit Identier (UID) LED Solid Blue: Unit Identied
Connector Description
BT1 Onboard Battery
COM1, COM2 COM Port, COM Header
FAN1 ~ FAN5, FANA/FANB CPU/System Fan Headers
IPMI_LAN Dedicated IPMI LAN Port
I-SATA0 ~ I-SATA7 Intel® PCH SATA 3.0 Ports (with RAID 0, 1, 5, 10)
I-SGPIO1, I-SGPIO2 Serial Link General Purpose I/O Connection Headers
JD1 Speaker/Power LED Indicator (Pins 1-3: Power LED, Pins 4-7: Speaker)
JF1 Front Control Panel Header
JIPMB1 4-pin BMC External I2C Header (for an IPMI Card)
JL1 Chassis Intrusion Header
JNVI2C1 NVMe I2C Header
JOH1 Overheat LED Indicator
JPI2C1 Power System Management Bus (SMB) I2C Header
JPWR1 8-pin 12V CPU Power Connector
JPWR2 24-pin ATX Power Connector
JRK1 Intel RAID Key Header
JSD1, JSD2 SATA DOM Power Connectors
JSTBY1 Standby Power Header
JTPM1 Trusted Platform Module/Port 80 Connector
LAN1, LAN2 Dual 1G Base-T Ports
M.2 M.2 PCI-E 3.0 x4 or SATA 3.0 Slot (Supports M-Key 2280 and 22110)
MH10, MH11 M.2 Mounting Holes
SLOT1 PCH PCI-E 3.0 x4 (in x8) Slot
Note: Table is continued on the next page.
12
Connector Description
SLOT2, SLOT3, SLOT5, SLOT7 CPU PCI-E 3.0 x8 Slot
SLOT4, SLOT6 CPU PCI-E 3.0 x8 (in x16) Slot
SP1 Internal Speaker/Buzzer
UID-SW Unit Identier (UID) Switch
USB0/1 Back Panel Universal Serial Bus (USB) 2.0 Ports
USB2/3, USB4/5, USB6/7 Front Accessible USB 2.0 Headers
USB8/9 Back Panel USB 3.0 Ports
USB10/11 Front Accessible USB 3.0 Header
USB12 USB 3.0 Type-A Header
VGA VGA Port
Chapter 1: Introduction
13
Super X11SPL-F User's Manual
Motherboard Features
Motherboard Features
CPU
Supports an Intel® Xeon 81xx/61xx/51xx/41xx/31xx series (Socket P0-LGA 3647) processor with up to 28 cores and a
thermal design power (TDP) of up to 165W
Note: The X11SPL-F motherboard does not support FPGA or Fabric processors.
Memory
Up to 256GB of RDIMM, 512GB of LRDIMM, and 1TB of 3DS LRDIMM DDR4 (288-pin) ECC memory with speeds of up
to 2666MHz in eight memory slots
Note: Memory speed support depends on the processors used in the system.
DIMM Size
Up to 128GB at 1.2V
Note: For the latest CPU/memory updates, please refer to our website at http://www.supermicro.com/products/
motherboard.
Chipset
Intel PCH C621
Expansion Slots
One (1) PCI-Express 3.0 x4 (in x8) Slot (PCH SLOT1)
Four (4) PCI-Express 3.0 x8 Slots (CPU SLOT2, SLOT3, SLOT5, SLOT7)
Two (2) PCI-Express 3.0 x8 (in x16) Slot (CPU SLOT4, SLOT6)
Network
Intel Ethernet Controller i210 + i210 for Dual 1G BASE-T Ports
One (1) Dedicated IPMI LAN located on the rear I/O panel
Baseboard Management Controller (BMC)
ASpeed AST2500 BMC
Graphics
Graphics controller via ASpeed AST2500 BMC
I/O Devices
Serial (COM) Port
One (1) serial port on the rear I/O panel (COM1)
One (1) front accessible serial port header (COM2)
SATA 3.0 • Eight (8) SATA 3.0 ports at 6Gb/s (I-SATA0 ~ I-SATA7 with RAID 0, 1, 5, 10)
Video (VGA) Port One (1) VGA connection on the rear I/O panel
Note: The table above is continued on the next page.
14
Chapter 1: Introduction
Motherboard Features
Peripheral Devices
Two (2) USB 2.0 ports on the rear I/O panel (USB0/1)
Two (2) USB 3.0 ports on the rear I/O panel (USB8/9)
Three (3) front accessible USB 2.0 headers with two (2) USB connections (USB2/3, USB4/5, USB6/7)
One (1) front accessible USB 3.0 header with two (2 ) USB connections (USB10/11)
One (1) USB 3.0 Type-A header (USB12)
BIOS
256Mb AMI BIOS
ACPI 6.0, Plug and Play (PnP), BIOS rescue hot-key, SPI dual/quad speed support, riser card auto detection support,
real time clock (RTC) wakeup, and SMBIOS 3.0 or later
Power Management
ACPI power management
Power button override mechanism
Power-on mode for AC power recovery
Wake-On LAN
Power supply monitoring
®
SPI Flash ROM
System Health Monitoring
Onboard voltage monitoring for +1.8V, +3.3V, +5V, +/-12V, +3.3V stdby, +5V stdby, VBAT, HT, memory, PCH temperature,
system temperature, and memory temperature
5 CPU switch phase voltage regulator
CPU thermal trip support
Platform Environment Conguration Interface (PECI)/TSI
Fan Control
Fan status monitoring via IPMI connections
Single cooling zone
Low-noise fan speed control
Seven (7) 4-pin fan headers
System Management
Trusted Platform Module (TPM) support
SuperDoctor® 5
Redundant power supply unit detection sensor
Chassis intrusion header and detection
Server Platform Service
LED Indicators
CPU/system overheat LED
Power/suspend-state indicator LED
Fan failed LED
UID/remote UID
HDD activity LED
LAN activity LED
Note: The table above is continued on the next page.
15
Super X11SPL-F User's Manual
Dimensions
12" (W) x 9.6" (L) ATX (304.8mm x 243.84mm)
Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and
heatsink cooling restrictions. For proper thermal management, please check the chas-
sis and heatsink specications for proper CPU TDP sizing.
Note 2: For IPMI conguration instructions, please refer to the Embedded IPMI Con­guration User's Guide available at http://www.supermicro.com/support/manuals/.
Note 3: It is strongly recommended that you change BMC log-in information upon ini­tial system power-on. The manufacture default username is ADMIN and the password
is ADMIN. For proper BMC conguration, please refer to http://www.supermicro.com/
products/info/les/IPMI/Best_Practices_BMC_Security.pdf.
Motherboard Features
16
SLOT 3
SLOT 4
SLOT 2
PCI-E X8
PCI-E X8
PCI-E X16
M.2 SSD
RJ45
RJ45
PCI-E X8 G3
PCI-E X8 G3
SLOT 1
#C-1
#B-1
#A-2
#A-1
DDRIV
2133/2666
PCI-E X8 G3
PCI-E X8
PCI-E X4 G3 (SATA X1)
LAN2
i210AT
LAN1
i210AT
Figure 1-3.
System Block Diagram
VCCP0 12v
VR13
5+1 PHASE
165W
VCCP0
SNB CORE
PCI-E X4 G3
PCI-E X1 G2
PCI-E X1 G2
DDR-IV
#3A
#3B
#1B #2B DMI3
#0~3 PCIe
#8~11
#7
#6
PECI:30
SOCKET ID:0
#2A
DMI3
Intel
PCH
(C621)
#1A
PCI-E X8 G3
#D-1
PCI-E X8 G3
SLOT 5
6.0 Gb/S
Chapter 1: Introduction
#F-1
#E-1
#D-2
DDRIV
2133/2666
PCI-E X8
SLOT 7
PCI-E X8
PCI-E X8 G3
#7
#6
#5
#4
#3
#2
#1
#0
SATA
PCI-E X16
SLOT 6
RJ45
DDR4
BMC Boot Flash
W83773G local and remote at SMBUS
LAN3
RTL8211FD-CG
SPI
VGA CONN
Temp Sensor
RGRMII
BMC
AST2500
COM1 Connector
RMII/NCSI
COM2 Header
PCI-E X1 G2
USB 2.0
ESPI
ESPI
Header
SPI(Reserved)
#5
#13 USB2.0
Switch
TPM HEADER
Debug Card
FRONT PANEL
USB2.0 #3,6 USB2.0 #4,5 USB2.0 #7,9
USB2.0 #0,1
SPI
SPI
BIOS
Front USB2.0 x 6
USB 2.0
USB 2.0
USB 3.0
SYSTEM POWER
FAN SPEED
Rear USB2.0 x 2
USB
Front USB3.0 x 2
USB
Type A USB3.0
USB
CTRL
USB
USB
Rear USB3.0 x 2
Note: This is a general block diagram and may not exactly represent the features on
your motherboard. See the previous pages for the actual specications of your moth­erboard.
17
Super X11SPL-F User's Manual
1.2 Processor and Chipset Overview
Built upon the functionality and capability of the Intel® Xeon 81xx/61xx/51xx/41xx/31xx series (Socket P0-LGA 3647) processor and the Intel PCH C621 chipset, the X11SPL-F motherboard
provides system performance, power efciency, and feature sets to address the needs of
next-generation computer users. This motherboard is the perfect solution for I/O intensive application and video surveillance.
The Intel PCH C621 chipset supports the following features:
DDR4 288-pin memory support
Intel Rapid Storage Technology Enterprise
ACPI Power Management
Digital Media Interface (DMI)
Management Engine (ME)
SMBus speeds of up to 400KHz for BMC connectivity
Improved I/O capabilities to high-storage-capacity congurations
SPI Enhancements
Intel® Node Manager 3.0 for advanced power monitoring, capping, and management for
BMC enhancement (see note below).
BMC supports remote management, virtualization, and the security package for enterprise
platforms
Note: Node Manager support depends on the power supply used in your system.
1.3 Special Features
Recovery from AC Power Loss
The Basic I/O System (BIOS) provides a setting that determines how the system will respond when AC power is lost and then restored to the system. You can choose for the system to remain powered off (in which case you must press the power switch to turn it back on), or for it to automatically return to the power-on state. See the Advanced BIOS Setup section for this setting. The default setting is Last State.
18
Chapter 1: Introduction
1.4 System Health Monitoring
Onboard Voltage Monitors
An onboard voltage monitor will scan the voltages of the onboard chipset, memory, CPU, and battery continuously. Once a voltage becomes unstable, a warning is given, or an error
message is sent to the screen. The user can adjust the voltage thresholds to dene the
sensitivity of the voltage monitor.
Fan Status Monitor with Firmware Control
The system health monitor embedded in the BMC chip can check the RPM status of the cooling fans. The CPU and chassis fans are controlled via lPMI.
Environmental Temperature Control
System Health sensors monitor temperatures and voltage settings of onboard processors and the system in real time via the IPMI interface. Whenever the temperature of the CPU or
the system exceeds a user-dened threshold, system/CPU cooling fans will be turned on to
prevent the CPU or the system from overheating.
Note: To avoid possible system overheating, please be sure to provide adequate air-
ow to your system.
System Resource Alert
This feature is available when used with SuperDoctor 5® in the Windows OS or in the Linux environment. SuperDoctor is used to notify the user of certain system events. For example,
you can congure SuperDoctor to provide you with warnings when the system temperature, CPU temperatures, voltages and fan speeds go beyond a predened range.
1.5 ACPI Features
ACPI stands for Advanced Conguration and Power Interface. The ACPI specication denes a exible and abstract hardware interface that provides a standard way to integrate power
management features throughout a computer system, including its hardware, operating system and application software. This enables the system to automatically turn on and off peripherals such as CD-ROMs, network cards, hard disk drives and printers.
In addition to enabling operating system-directed power management, ACPI also provides a generic system event mechanism for Plug and Play, and an operating system-independent
interface for conguration control. ACPI leverages the Plug and Play BIOS data structures,
while providing a processor architecture-independent implementation that is compatible with Windows 2012/2012R and 2016 operating systems.
19
Super X11SPL-F User's Manual
1.6 Power Supply
As with all computer products, a stable power source is necessary for proper and reliable operation. It is even more important for processors that have high CPU clock rates where noisy power transmission is present.
The X11SPL-F motherboard accommodates a 24-pin ATX power supply. Although most power
supplies generally meet the specications required by the CPU, some are inadequate. In
addition, one 12V 8-pin power connection is also required to ensure adequate power supply to the system.
Warning: To avoid damaging the power supply or the motherboard, be sure to use a power supply that contains a 24-pin and an 8-pin power connector. Be sure to connect the power supplies to the 24-pin power connector (JPWR2), and the 8-pin power con­nector (JPWR1) on the motherboard. Failure in doing so may void the manufacturer warranty on your power supply and motherboard.
It is strongly recommended that you use a high quality power supply that meets ATX power
supply Specication 2.02 or above. It must also be SSI compliant. (For more information,
please refer to the website at http://www.ssiforum.org/).
1.7 Serial Port
The X11SPL-F motherboard supports two serial communication connections. COM Ports 1 and 2 can be used for input/output. The UART provides legacy speeds with a baud rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which support high-speed serial communication devices.
20
Chapter 2: Installation
Chapter 2
Installation
2.1 Static-Sensitive Devices
Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid damaging your system board, it is important to handle it very carefully. The following measures are generally
sufcient to protect your equipment from ESD.
Precautions
Use a grounded wrist strap designed to prevent static discharge.
Touch a grounded metal object before removing the board from the antistatic bag.
Handle the motherboard by its edges only; do not touch its components, peripheral chips,
memory modules or gold contacts.
When handling chips or modules, avoid touching their pins.
Put the motherboard and peripherals back into their antistatic bags when not in use.
For grounding purposes, make sure your computer chassis provides excellent conductivity
between the power supply, the case, the mounting fasteners and the motherboard.
Use only the correct type of onboard CMOS battery. Do not install the onboard battery
upside down to avoid possible explosion.
Unpacking
The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking the motherboard, make sure that the person handling it is static protected.
21
Super X11SPL-F User's Manual
2.2 Processor and Heatsink Installation
The processor (CPU) and processor carrier should be assembled together rst to form
the processor carrier assembly. This will be attached to the heatsink to form the processor heatsink module (PHM) before being installed onto the CPU socket.
Notes:
Use ESD protection.
Unplug the AC power cord from all power supplies after shutting down the system.
Check that the plastic protective cover is on the CPU socket and none of the socket pins
are bent. If they are, contact your retailer.
When handling the processor, avoid touching or placing direct pressure on the LGA lands
(gold contacts). Improper installation or socket misalignment can cause serious damage to the processor or CPU socket, which may require manufacturer repairs.
Thermal grease is pre-applied on a new heatsink. No additional thermal grease is needed.
Refer to the Supermicro website for updates on processor support.
All graphics in this manual are for illustrations only. Your components may look different.
The Intel Xeon 81xx/61xx/51xx/41xx/31xx Series Processor
Non-Fabric Model
22
Chapter 2: Installation
Overview of the Processor Carrier Assembly
The processor carrier assembly contains the Intel Xeon Non-Fabric (Non-F) processor and a processor carrier.
1. Non-F Processor
2. Processor Carrier
Overview of the CPU Socket
The CPU socket is protected by a plastic protective cover.
1. Plastic Protective Cover
2. CPU Socket
23
Super X11SPL-F User's Manual
Overview of the Processor Heatsink Module
The Processor Heatsink Module (PHM) contains a heatsink, a processor carrier, and the Intel Xeon Non-Fabric (Non-F) processor.
1. Heatsink with Thermal Grease
2. Processor Carrier
3. Non-F Processor
Processor Heatsink Module
Bottom View
24
Chapter 2: Installation
Creating the Non-F Model Processor Carrier Assembly
To install a Non-F model processor into the processor carrier, follow the steps below:
1. Hold the processor with the LGA lands (gold contacts) facing up. Locate the small, gold triangle in the corner of the processor and the corresponding hollowed triangle on the processor carrier. These triangles indicate pin 1. See the images below.
2. Using the triangles as a guide, carefully align and place Point A of the processor into
Point A of the carrier. Then gently ex the other side of the carrier for the processor to t
into Point B.
3. Examine all corners to ensure that the processor is rmly attached to the carrier.
CPU (Upside Down) with CPU LGA Lands up
Align Point A of the CPU and Point A of the Processor Carrier
Align CPU Pin 1
B
Align Point B of the CPU and Point B of the Processor Carrier
A
Pin 1
B
A
Processor Carrier (Upside Down)
Allow carrier to latch onto CPU
B
A
Allow carrier to latch onto CPU
Processor Carrier Assembly (Non-F Model)
Pin 1
25
Super X11SPL-F User's Manual
Assembling the Processor Heatsink Module
After creating the processor carrier assembly for the Non-F model processor, mount it onto the heatsink to create the processor heatsink module (PHM):
1. Note the label on top of the heatsink, which marks the heatsink mounting holes as 1, 2, 3, and 4. If this is a new heatsink, the thermal grease has been pre-applied on the underside. Otherwise, apply the proper amount of thermal grease.
2. Turn the heatsink over with the thermal grease facing up. Hold the processor carrier assembly so the processor's gold contacts are facing up, then align the triangle on the assembly with hole 1 of the heatsink. Press the processor carrier assembly down. The plastic clips of the assembly will lock outside of holes 1 and 2, while the remaining clips will snap into their corresponding holes.
3. Examine all corners to ensure that the plastic clips on the processor carrier assembly
are rmly attached to the heatsink.
Triangle on the CPU
Triangle on the Processor Carrier
Plastic clips 1 and 2 lock outside the heatsink’s mounting holes
Non-Fabric Processor Carrier Assembly
(Upside Down)
Heatsink
(Upside Down)
2
2
1
1
Remaining plastic clips snap
into the other corner holes
2
of the heatsink
1
26
Chapter 2: Installation
Preparing the CPU Socket for Installation
This motherboard comes with a plastic protective cover installed on the CPU socket. Remove it from the socket to install the Processor Heatsink Module (PHM). Gently pull up one corner of the plastic protective cover to remove it.
CPU Socket with Plastic Protective Cover
Remove the plastic protective
cover from the CPU socket.
Do not touch or bend
the socket pins.
Socket Pins
27
Super X11SPL-F User's Manual
Installing the Processor Heatsink Module
After assembling the Processor Heatsink Module (PHM), install the PHM onto the CPU socket:
1. Align hole 1 of the heatsink with the printed triangle on the CPU socket. See the left image below.
2. Make sure all four holes of the heatsink are aligned with the socket before gently placing the heatsink on top.
3. With a T30 Torx-bit screwdriver, gradually tighten screws #1 - #4 to ensure even pressure. The order of the screws is shown on the label on top of the heatsink. To avoid damaging the processor or socket, do not use a force greater than 12 lbf-in when tightening the screws.
4. Examine all corners to ensure that the PHM is rmly attached to the socket.
Oval C
Oval D
Small Guide Post
Large Guide Post
Printed Triangle
Mounting the Processor Heatsink Module onto the CPU socket (on the motherboard)
#1
Use a torque of 12 lbf-in
T30 Torx Screwdriver
#4
#2
#3
Tighten the screws in the sequence of 1, 2, 3, 4
28
Chapter 2: Installation
Removing the Processor Heatsink Module
Before removing the processor heatsink module (PHM) from the motherboard, unplug the AC power cord from all power supplies after shutting down the system. Then follow the steps below:
1. Use a T30 Torx-bit screwdriver to loosen the four screws in a backwards sequence of #4, #3, #2, and #1.
2. Gently lift the PHM upwards to remove it from the socket.
#1
Remove the screws in
the sequence of 4, 3, 2, 1
#4
#2
#3
Printed Triangle on Motherboard
CPU Socket
After removing the screws,
lift the Processor Heatsink Module off the CPU socket.
29
Super X11SPL-F User's Manual
2.3 Motherboard Installation
All motherboards have standard mounting holes to t different types of chassis. Make sure
that the locations of all the mounting holes for both the motherboard and the chassis match. Although a chassis may have both plastic and metal mounting fasteners, metal ones are highly recommended because they ground the motherboard to the chassis. Make sure that the metal standoffs click in or are screwed in tightly.
Tools Needed
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
Screwdriver
COM2
JWD1
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
JRK1
JIPMB1
JL1
Phillips
(1)
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
SP1 +
JOH1
JBT1
I-SATA0 I-SATA1
JSD2
JSD1
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT2 PCI-E 3.0 X8
BIOS
LICENSE
Intel C621
FANB
JPME2
Phillips Screws
JPL2
JPL1
CPU SLOT4 PCI-E 3.0 X8(IN X16)
DESIGNED IN USA
REV:1.01
FANA
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT5 PCI-E 3.0 X8
X11SPL-F
MH10
MH11
BT1
M.2 PCI-E 3.0 X4
JTPM1
LE3
(9)
UID-SW
UID-LED
VGA
CPU SLOT7 PCI-E 3.0 X8
JF1
ON
PWR UID
RST
FAIL 1
PS
USB12(3.0)
LED
NIC
JF1
2
NIC
PWRHDD
LEDLED
NMIX
FAN4
+
USB6/7
LEDPWR
DIMMC1
JNVI2C1
FAN3
DIMMA2
DIMMA1
DIMMB1
BAR CODE
MAC CODE
IPMI CODE
FAN2
Standoffs (9) Only if Needed
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
IPMI_LAN
USB0/1
DIMMD2
DIMMF1
DIMME1
DIMMD1
JPWR2
COM1
FAN1
JPWR1
JSTBY1
FAN5
JPI2C1
Location of Mounting Holes
Note: 1) To avoid damaging the motherboard and its components, please do not use
a force greater than 8 lbf-in on each mounting screw during motherboard installation.
2) Some components are very close to the mounting holes. Please take precaution­ary measures to avoid damaging these components when installing the motherboard to the chassis.
30
Chapter 2: Installation
Installing the Motherboard
1. Install the I/O shield into the back of the chassis, if applicable.
2. Locate the mounting holes on the motherboard. See the previous page for the location.
3. Locate the matching mounting holes on the chassis. Align the mounting holes on the motherboard against the mounting holes on the chassis.
4. Install standoffs in the chassis as needed.
5. Install the motherboard into the chassis carefully to avoid damaging other motherboard components.
6. Using the Phillips screwdriver, insert a Phillips head #6 screw into a mounting hole on the motherboard and its matching mounting hole on the chassis.
7. Repeat Step 5 to insert #6 screws into all mounting holes.
8. Make sure that the motherboard is securely placed in the chassis.
Note: Images displayed are for illustration only. Your chassis or components might look different from those shown in this manual.
31
Super X11SPL-F User's Manual
2.4 Memory Support and Installation
Note: Check the Supermicro website for recommended memory modules.
Important: Exercise extreme care when installing or removing DIMM modules to pre-
vent any possible damage.
Memory Support
The X11SPL-F supports up to 256GB of RDIMM, 512GB of LRDIMM, and 1TB of 3DS LRDMIMM DDR4 (288-pin) ECC memory with speeds of up to 2666MHz in eight memory slots. Refer to the tables below for the recommended DIMM population order and additional memory information.
1 CPU, 8-DIMM Slots
Number of DIMMs Memory Population Sequence
1 DIMMA1
2 DIMMA1 / DIMMD1
3 DIMMC1 / DIMMB1 / DIMMA1
4 DIMMB1 / DIMMA1 / DIMMD1 / DIMME1
(Unbalanced: Not Recommended)
5
6 DIMMC1 / DIMMB1 / DIMMA1 / DIMMD1 / DIMME1 / DIMMF1
7
(Unbalanced: Not Recommended)
8 DIMMC1 / DIMMB1 / DIMMA1 / DIMMA2 / DIMMD2 / DIMMD1 / DIMME1 / DIMMF1
DIMMC1 / DIMMB1 / DIMMA1 / DIMMA2 / DIMMD1 / DIMME1 / DIMMF1
DIMMC1 / DIMMB1 / DIMMA1 / DIMMD1 / DIMME1
DIMM Capacity
DIMM Type
RDIMM SRx4 8GB 16GB
RDIMM SRx8 4GB 8GB
RDIMM DRx8 8GB 16GB
RDIMM DRx4 16GB 32GB
RDIMM 3DS
LRDIMM QRx4 32GB 64GB
LRDIMM 3DS
Ranks Per DIMM
and Data Width
QRx4 N/A 2H-64GB
8Rx4 N/A 4H-128GB
QRx4 N/A 2H-64GB
8Rx4 N/A 4H-128GB
(GB)
DRAM Density 1DPC 1DPC 2DPC
4GB 8GB 1.2V 1.2V 1.2V
32
Speed (MT/s), Voltage (V),
Slot Per Channel (SPC),
and DIMM Per Channel (DPC)
1 Slot Per
Channel
2666 2666 2666
2 Slots Per Channel
Chapter 2: Installation
General Guidelines for Optimizing Memory Performance
The blue slots must be populated rst.
Only populate DIMMA2 and DIMMD2 if the extra memory support is needed.
Always use DDR4 memory of the same type, size and speed.
Mixed DIMM speeds can be installed. However, all DIMMs will run at the speed of the
slowest DIMM.
The motherboard will support odd-numbered modules (one or three modules installed).
However, to achieve the best memory performance, a balanced memory population is recommended.
UID-SW
JWD1
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
COM2
JPG1
ASpeed
AST2500
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT2 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
JPL2
JPL1
CPU SLOT5 PCI-E 3.0 X8
DESIGNED IN USA
REV:1.01
X11SPL-F
UID-LED
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT7 PCI-E 3.0 X8
VGA
DIMMA1
DIMMB1
DIMMC1
DIMMA2
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
IPMI_LAN
USB0/1
DIMMD2
DIMMF1
DIMME1
DIMMD1
COM1
FAN5
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JRK1
JL1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
SP1
+
JOH1
JIPMB1
JSD1
JBT1
I-SATA0 I-SATA1
JSD2
FANB
BIOS
LICENSE
Intel
C621
JPME2
MH10
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
DIMMC1
DIMMB1
BT1
+
USB6/7
JTPM1
LEDPWR
DIMMA1
DIMMA2
JF1
ON
PWR UID
RST
FAIL 1
PS
USB12(3.0)
LED
NIC
2
NIC
PWRHDD
LEDLED
NMIX
JF1
FAN4
JNVI2C1
FAN3
BAR CODE
MAC CODE
IPMI CODE
FAN2
DIMMD2
DIMMD1
DIMME1
JPWR2
DIMMF1
FAN1
JPWR1
JSTBY1
JPI2C1
33
Super X11SPL-F User's Manual
DIMM Installation
1. Insert the desired number of DIMMs into the memory slots based on the Recommended Memory Population Guide table on pg. 32.
2. Push the release tabs outwards on both ends of the DIMM slot to unlock it.
3. Align the key of the DIMM module with the receptive point on the memory slot.
4. Align the notches on both ends of the module against the receptive points on the ends of the slot.
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
COM2
JWD1
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
JRK1
JL1
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
SP1 +
JOH1
JBT1
JIPMB1
I-SATA0 I-SATA1
JSD2
FANB
JSD1
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
DESIGNED IN USA
REV:1.01
X11SPL-F
BIOS
LICENSE
Intel
C621
M.2 PCI-E 3.0 X4
LE3
JPME2
FANA
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT5 PCI-E 3.0 X8
MH10
MH11
BT1
USB6/7
JTPM1
UID-SW
UID-LED
CPU SLOT7 PCI-E 3.0 X8
JF1
ON
PWR UID
RST
FAIL 1
PS
USB12(3.0)
LED
NIC
2
+
NIC
PWRHDD
LEDLED
NMIX
FAN4
LEDPWR
JF1
VGA
LAN1LAN2
JLAN1JLAN2
DIMMA2
DIMMA1
DIMMB1
DIMMC1
CPU
BAR CODE
MAC CODE
IPMI CODE
JNVI2C1
FAN3
FAN2
USB8/9(3.0)
IPMI_LAN
USB0/1
DIMMD2
DIMMD1
DIMME1
DIMMF1
JPWR2
COM1
FAN5
JPWR1
JSTBY1
JPI2C1
FAN1
5. Press the notches on both ends of the module straight down into the slot until the module snaps into place.
6. Press the release tabs to the lock positions to secure the DIMM module into the slot.
DIMM Removal
Press both release tabs on the ends of the DIMM module to unlock it. Once the DIMM module is loosened, remove it from the memory slot.
Notches
Release Tabs
Press both notches
straight down into
the memory slot.
34
Chapter 2: Installation
2.5 Rear I/O Ports
See Figure 2-1 below for the locations and descriptions of the various I/O ports on the rear of the motherboard.
UID-SW
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
PCH SLOT1 PCI-E 3.0 X4(IN X8)
COM2
JPG1
JD1
USB10/11(3.0)
SP1 +
USB2/3
USB4/5
JOH1
I-SGPIO1
JIPMB1
JL1
JSD1
AST2500
LEDBMC
CPU SLOT2 PCI-E 3.0 X8
JBT1
I-SATA0 I-SATA1
JSD2
FANB
ASpeed
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
BIOS
LICENSE
Intel
C621
JPME2
JPL2
JPL1
CPU SLOT5 PCI-E 3.0 X8
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
UID-LED
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT7 PCI-E 3.0 X8
BT1
JF1
ON
PWR UID
RST
FAIL 1
PS
USB12(3.0)
LED
NIC
2
+
NIC
PWRHDD
LEDLED
USB6/7
NMIX
JTPM1
LEDPWR
FAN4
JF1
VGA
JNVI2C1
FAN3
DIMMA1
DIMMB1
DIMMC1
BAR CODE
MAC CODE
IPMI CODE
DIMMA2
FAN2
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
IPMI_LAN
CPU
USB0/1
DIMMD1
DIMMD2
DIMMF1
DIMME1
JPWR2
COM1
FAN1
JPWR1
JSTBY1
FAN5
JPI2C1
Figure 2-1. I/O Port Locations and Denitions
2
5
1
3
9876
4
# Description # Description
1 COM Port 1 6 USB8 (3.0)
2 Dedicated IPMI LAN 7 LAN1
3 USB1 8 LAN2
4 USB0 9 VGA Port
5 USB9 (3.0) 10 UID Switch
10
35
Super X11SPL-F User's Manual
COM Ports
Two COM connections (COM1, COM2) are located on the motherboard. COM1 is located on the I/O back panel. COM2 is located next to PCI-E Slot 1.
COM Port
Pin Denitions
Pin# Denition Pin# Denition
1 DCD 6 DSR
2 RXD 7 RTS
3 TXD 8 CTS
4 DTR 9 RI
5 Ground 10 N/A
VGA Port
A video (VGA) port is located next to LAN2 on the I/O back panel. Refer to the board layout below for the location.
USB0/1
DIMMD2
DIMMF1
DIMME1
DIMMD1
JPWR2
1
COM1
FAN1
JPWR1
JSTBY1
1. COM1
FAN5
2. COM2
3. VGA Port
JPI2C1
2
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
JL1
COM2
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
SP1
+
JBT1
JSD2
LICENSE
Intel
C621
FANB
JOH1
JIPMB1
I-SATA0 I-SATA1
JSD1
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
BIOS
JPME2
CPU SLOT5 PCI-E 3.0 X8
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
UID-SW
UID-LED
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT7 PCI-E 3.0 X8
BT1
JTPM1
+
USB6/7
LEDPWR
ON
PWR UID
RST
FAIL 1
PS
USB12(3.0)
LED
NIC
2
NIC
PWRHDD
LEDLED
NMIX
JF1
JF1
3
VGA
DIMMA2
DIMMA1
DIMMB1
DIMMC1
BAR CODE
MAC CODE
IPMI CODE
JNVI2C1
FAN3
FAN2
FAN4
USB8/9(3.0)
LAN1LAN2
IPMI_LAN
JLAN1JLAN2
CPU
36
Chapter 2: Installation
LAN Ports
Two Gigabit Ethernet ports (LAN1, LAN2) are located on the I/O back panel. In addition, a dedicated IPMI LAN is located above the USB0/1 ports on the back panel. All of these ports accept RJ45 cables. Please refer to the LED Indicator section for LAN LED information.
LAN Port
Pin Denition
Pin# Denition Pin# Denition
9 TD1+ 13 YEL+
10 TD1- 14 YEL-
7 TD2+
8 TD2-
5 TD3+ 11 GRN+/ORG-
6 TD3- 12 GRN-/ORG+
3 TD4+ 15 CG1
4 TD4- 16 CG2
2 VCC 1 GND
IPMI LAN
Pin Denition
Pin# Denition Pin# Denition
11 TX1- 20 YEL+
10 TX1+ 19 YEL-
13 TX2-
12 TX2+ 22 ORG-/GRN+
15 TX3- 21 ORG+/GRN-
14 TX3+
17 TX4- 23 SGND
16 TX4+ 24 SGND
9 VCC 25 SGND
18 GND 26 SGND
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
JL1
COM2
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
SP1
+
JBT1
JSD2
LICENSE
Intel
C621
FANB
JOH1
JIPMB1
I-SATA0 I-SATA1
JSD1
JPL2
JPL1
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
BIOS
JPME2
CPU SLOT5 PCI-E 3.0 X8
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
UID-SW
UID-LED
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT7 PCI-E 3.0 X8
BT1
JTPM1
+
USB6/7
LEDPWR
ON
PWR UID
RST
FAIL 1 PS
USB12(3.0)
LED
NIC 2
NIC
PWRHDD
LEDLED
NMIX
JF1
JF1
FAN4
VGA
DIMMA1
DIMMB1
DIMMC1
BAR CODE
MAC CODE
IPMI CODE
JNVI2C1
FAN3
FAN2
1
2 3
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
DIMMA2
CPU
37
IPMI_LAN
USB0/1
DIMMD1
DIMMD2
DIMMF1
DIMME1
JPWR2
COM1
FAN1
JPWR1
JSTBY1
1. LAN1
FAN5
2. LAN2
3. IPMI LAN
JPI2C1
Super X11SPL-F User's Manual
JSD1
JF1
Universal Serial Bus (USB) Ports
There are two USB 2.0 ports (USB0/1) and two USB 3.0 ports (USB8/9) located on the I/O back panel. The motherboard also has three front accessible USB 2.0 headers (USB2/3, USB4/5, and USB6/7) and one front accessible USB 3.0 header (USB10/11). The USB12 header is USB 3.0 Type-A. The onboard headers can be used to provide front side USB access with a cable (not included).
Back Panel USB 0/1 (2.0)
Pin Denitions
Pin# Denition Pin# Denition
1 +5V 5 +5V
2 USB_N 6 USB_N
3 USB_P 7 USB_P
4 Ground 8 Ground
Back Panel USB 8/9 (3.0)
Pin Denitions
Pin# Denition Pin# Denition
A1 VBUS B1 Power
A2 D- B2 USB_N
A3 D+ B3 USB_P
A4 GND B4 GND
A5 Stda_SSRX- B5 USB3_RN
A6 Stda_SSRX+ B6 USB3_RP
A7 GND B7 GND
A8 Stda_SSTX- B8 USB3_TN
A9 Stda_SSTX+ B9 USB3_TP
6
2
3
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
JL1
COM2
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
SP1
+
JOH1
JBT1
JIPMB1
I-SATA0 I-SATA1
JSD2
FANB
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
DESIGNED IN USA
REV:1.01
X11SPL-F
BIOS
LICENSE
Intel
C621
M.2 PCI-E 3.0 X4
LE3
JPME2
FANA
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT5 PCI-E 3.0 X8
MH10
MH11
BT1
4
JTPM1
UID-SW
UID-LED
CPU SLOT7 PCI-E 3.0 X8
JF1
ON
PWR UID
RST
FAIL 1
PS
USB12(3.0)
LED
NIC
2
+
NIC
PWRHDD
LEDLED
USB6/7
NMIX
7
FAN4
LEDPWR
Front Panel USB 2/3, 4/5, and 6/7 (2.0)
Pin Denitions
Pin# Denition Pin# Denition
1 +5V 2 +5V
3 USB_N 4 USB_N
5 USB_P 6 USB_P
7 Ground 8 Ground
9 Key 10 NC
Front Panel USB 10/11 (3.0)
Pin Denitions
Pin# Denition Pin# Denition
1
VBUS 19 Power
2
Stda_SSRX- 18 USB3_RN
3
Stda_SSRX+ 17 USB3_RP
4
GND 16 GND
5
Stda_SSTX- 15 USB3_TN
6
Stda_SSTX+ 14 USB3_TP
7
GND 13 GND
8
D- 12 USB_N
9
D+ 11 USB_P
10 GND X
15
IPMI_LAN
USB0/1
DIMMD2
DIMME1
DIMMD1
DIMMF1
COM1
FAN5
Pin# Denition Pin# Denition
1 VBUS 5 SSRX-
2 USB_N 6 SSRX+
3 USB_P 7 GND
VGA
DIMMA2
DIMMA1
DIMMB1
DIMMC1
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
Type A USB 12 (3.0)
Pin Denitions
4 Ground 8 SSTX-
9 SSTX+
1. USB0/1
2. USB2/3
3. USB4/5
BAR CODE
JNVI2C1
FAN3
MAC CODE
IPMI CODE
FAN2
JPWR2
JPWR1
JSTBY1
JPI2C1
FAN1
4. USB6/7
5. USB8/9
6. USB10/11
7. USB12
38
Chapter 2: Installation
Unit Identier Switch/Rear LED Indicator
A Unit Identier (UID) Switch (UID-SW) and a rear LED Indicator (UID-LED) are located on
the I/O back panel. When the user presses the UID switch, the UID LED indicator will be turned on. Press the UID switch again to turn off the UID LED. The UID indicator provides
easy identication of a system unit that may be in need of service.
Note: UID can also be triggered via IPMI on the motherboard. For more information on IPMI, please refer to the IPMI User's Guide posted on our website at http://www. supermicro.com.
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
JL1
COM2
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
SP1
+
JBT1
JSD2
LICENSE
Intel
C621
FANB
JOH1
JIPMB1
I-SATA0 I-SATA1
JSD1
UID Switch
Pin Denitions
Pin# Denitions
1 Button In
2 Ground
3 Ground
4 Ground
5 Ground
JPL2
JPL1
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
BIOS
JPME2
CPU SLOT5 PCI-E 3.0 X8
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
12
UID-SW
UID-LED
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT7 PCI-E 3.0 X8
BT1
JTPM1
+
USB6/7
LEDPWR
ON
PWR UID
RST
FAIL 1 PS
USB12(3.0)
LED
NIC 2
NIC
PWRHDD
LEDLED
NMIX
JF1
JF1
FAN4
UID LED
Status
Color/State Status
Blue: OnUnit Identied
1. UID Switch
FAN5
2. UID LED
JPI2C1
IPMI_LAN
USB0/1
DIMMD1
DIMMD2
DIMMF1
DIMME1
JPWR2
COM1
JPWR1
JSTBY1
FAN1
VGA
DIMMA2
DIMMA1
DIMMB1
DIMMC1
BAR CODE
MAC CODE
IPMI CODE
JNVI2C1
FAN3
FAN2
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
39
Super X11SPL-F User's Manual
2.6 Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally located on a
control panel at the front of the chassis. These connectors are designed specically for use with Supermicro chassis. See the gure below for the descriptions of the front control panel
buttons and LED indicators.
UID-SW
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
PCH SLOT1 PCI-E 3.0 X4(IN X8)
COM2
JPG1
JD1
USB10/11(3.0)
SP1 +
USB2/3
USB4/5
JOH1
I-SGPIO1
JIPMB1
JL1
JSD1
ASpeed
AST2500
LEDBMC
CPU SLOT2 PCI-E 3.0 X8
JBT1
I-SATA0 I-SATA1
JSD2
FANB
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
BIOS
LICENSE
Intel
C621
JPME2
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
UID-LED
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT5 PCI-E 3.0 X8
CPU SLOT7 PCI-E 3.0 X8
BT1
USB12(3.0)
+
USB6/7
JTPM1
LEDPWR
VGA
DIMMA2
DIMMA1
DIMMB1
DIMMC1
JF1
ON
PWR UID
RST
FAIL 1
PS
LED
NIC
2
NIC
PWRHDD
LEDLED
NMIX
JF1
FAN4
JNVI2C1
FAN3
BAR CODE
MAC CODE
IPMI CODE
FAN2
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
IPMI_LAN
USB0/1
DIMMD1
DIMMD2
DIMMF1
DIMME1
JPWR2
COM1
FAN1
JPWR1
JSTBY1
FAN5
JPI2C1
Figure 2-2. JF1 Header Pins
1 2
PWR
Reset
Power Button
Reset Button
3.3V
UID LED
3.3V Stby
3.3V Stby
3.3V Stby
3.3V
X
NMI
19
20
40
Ground
Ground
Power Fail LED
OH/Fan Fail LED
NIC2 Active LED
NIC1 Active LED
HDD LED
PWR LED
X
Ground
Chapter 2: Installation
Power Button
The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both
pins will power on/off the system. This button can also be congured to function as a suspend
button (with a setting in the BIOS - see Chapter 4). To turn off the power when the system is in suspend mode, press the button for 4 seconds or longer. Refer to the table below for
pin denitions.
Power Button
Pin Denitions (JF1)
Pins Denition
1 Signal
2 Ground
Reset Button
The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to a hardware reset
switch on the computer case to reset the system. Refer to the table below for pin denitions.
Reset Button
Pin Denitions (JF1)
Pins Denition
3 Reset
4 Ground
1 2
PWR
1
Reset
2
Power Button
Reset Button
3.3V
UID LED
3.3V Stby
3.3V Stby
3.3V Stby
Ground
Ground
Power Fail LED
OH/Fan Fail LED
NIC2 Active LED
NIC1 Active LED
HDD LED
1. PWR Button
2. Reset Button
3.3V
NMI
PWR LED
X
19
20
X
Ground
41
Super X11SPL-F User's Manual
Power Fail LED
The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table below
for pin denitions.
Power Fail LED
Pin Denitions (JF1)
Pin# Denition
5 3.3V
6 PWR Supply Fail
Overheat (OH)/Fan Fail
Connect an LED cable to pins 7 and 8 of the Front Control Panel to use the Overheat/Fan Fail LED connections. The LED on pin 8 provides warnings of overheat or fan failure. Refer
to the tables below for pin denitions.
PWR
Reset
Power Button
Reset Button
3.3V
UID LED
3.3V Stby
3.3V Stby
1 2
OH/Fan Fail Indicator
State Denition
Off Normal
On Overheat
Flashing Fan Fail
Ground
Ground
Power Fail LED
OH/Fan Fail LED
NIC2 Active LED
NIC1 Active LED
Status
1.Power Fail LED
2. OH/Fan Fail LED
1
2
3.3V Stby
3.3V
NMI
HDD LED
PWR LED
X
19
20
X
Ground
42
Chapter 2: Installation
NIC1/NIC2 (LAN1/LAN2)
The Network Interface Controller (NIC) LED connection for LAN port 1 is located on pins 11 and 12 of JF1, and LAN port 2 is on pins 9 and 10. Attach the NIC LED cables here to
display network activity. Refer to the table below for pin denitions.
LAN1/LAN2 LED
Pin Denitions (JF1)
Pin# Denition
9 3.3V Stby
10 NIC 2 Activity LED
11 3.3V Stby
12 NIC 1 Activity LED
HDD LED
The HDD LED connection is located on pins 13 and 14 of JF1. Attach a cable to pin 14 to
show hard drive activity status. Refer to the table below for pin denitions.
PWR
Reset
Power Button
Reset Button
3.3V
UID LED
3.3V Stby
3.3V Stby
3.3V Stby
1 2
Pin Denitions (JF1)
Pins Denition
13 3.3V Stdby
14 HDD Active
Ground
Ground
Power Fail LED
OH/Fan Fail LED
NIC2 Active LED
NIC1 Active LED
HDD LED
HDD LED
1. NIC2 LED
2. NIC1 LED
3. HDD LED
1
2
3
3.3V
NMI
PWR LED
X
19
20
X
Ground
43
Super X11SPL-F User's Manual
Power LED
The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table below
for pin denitions.
Power LED
Pin Denitions (JF1)
Pins Denition
15 3.3V
16 PWR LED
NMI Button
The non-maskable interrupt (NMI) button header is located on pins 19 and 20 of JF1. Refer
to the table below for pin denitions.
NMI Button
Pin Denitions (JF1)
Pins Denition
19 Control
20 Ground
PWR
Reset
Power Button
Reset Button
3.3V
UID LED
3.3V Stby
3.3V Stby
3.3V Stby
3.3V
NMI
2
1 2
Ground
Ground
Power Fail LED
OH/Fan Fail LED
NIC2 Active LED
NIC1 Active LED
HDD LED
PWR LED
X
19
20
X
Ground
1
1. PWR LED
2. NMI
44
Chapter 2: Installation
2.7 Connectors
Power Connections
ATX Power Supply Connector
The 24-pin power supply connector (JPWR2) meets the ATX SSI EPS 12V specication.
You must also connect the 8-pin (JPWR1) processor power connector to the power supply.
ATX Power 24-pin Connector
Pin Denitions
Pin# Denition Pin# Denition
13 +3.3V 1 +3.3V
14 -12V 2 +3.3V
15 Ground 3 Ground
16 PS_ON 4 +5V
17 Ground 5 Ground
18 Ground 6 +5V
19 Ground 7 Ground
20 Res (NC) 8 PWR_OK
21 +5V 9 5VSB
22 +5V 10 +12V
23 +5V 11 +12V
24 Ground 12 +3.3V
Required Connection
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
JL1
COM2
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
SP1 +
I-SATA0 I-SATA1
JBT1
JSD2
LICENSE
Intel
C621
FANB
JOH1
JIPMB1
JSD1
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
BIOS
JPME2
CPU SLOT5 PCI-E 3.0 X8
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
UID-SW
UID-LED
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT7 PCI-E 3.0 X8
BT1
JTPM1
+
USB6/7
LEDPWR
ON
FAIL 1
USB12(3.0)
LED
2
LEDLED
JF1
JF1
PWR UID
RST
PS
NIC
NIC
PWRHDD
NMIX
1. 24-Pin ATX PWR
FAN5
JPI2C1
IPMI_LAN
USB0/1
DIMMD2
1
DIMME1
DIMMD1
JPWR2
COM1
DIMMF1
JPWR1
JSTBY1
FAN1
VGA
DIMMA2
DIMMA1
DIMMB1
DIMMC1
BAR CODE
MAC CODE
IPMI CODE
JNVI2C1
FAN3
FAN2
FAN4
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
45
Super X11SPL-F User's Manual
8-Pin Power Connector
JPWR1 is an 8-pin 12V DC power input for the CPU that must be connected to the power
supply. Refer to the table below for pin denitions..
8-pin Power
Pin Denitions
Pin# Denition
1 - 4 Ground
5 - 8 P12V (12V Power)
Required Connection
Important: To provide adequate power supply to the motherboard, be sure to connect
the 24-pin ATX PWR and the 8-pin PWR connectors to the power supply. Failure to do so may void the manufacturer warranty on your power supply and motherboard.
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
JL1
COM2
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
SP1 +
JOH1
JIPMB1
JSD1
LICENSE
JBT1
I-SATA0 I-SATA1
Intel
C621
JSD2
FANB
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
BIOS
JPME2
CPU SLOT5 PCI-E 3.0 X8
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
UID-SW
UID-LED
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT7 PCI-E 3.0 X8
BT1
JTPM1
+
USB6/7
LEDPWR
ON
PWR UID
RST
FAIL 1
PS
USB12(3.0)
LED
NIC
2
NIC
PWRHDD
LEDLED
NMIX
JF1
JF1
1. 8-Pin PWR
FAN5
1
JPI2C1
IPMI_LAN
USB0/1
DIMMD2
DIMMF1
DIMME1
DIMMD1
JPWR2
COM1
JPWR1
JSTBY1
FAN1
VGA
DIMMA2
DIMMA1
DIMMB1
DIMMC1
BAR CODE
MAC CODE
IPMI CODE
JNVI2C1
FAN3
FAN2
FAN4
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
46
Chapter 2: Installation
Headers
Fan Headers
There are seven 4-pin fan headers (FAN1~FAN5, FANA/FANB) on the motherboard. All these 4-pin fan headers are backwards compatible with the traditional 3-pin fans. However, fan speed control is available for 4-pin fans only by Thermal Management via the IPMI 2.0
interface. Refer to the table below for pin denitions.
Fan Header
Pin Denitions
Pin# Denition
1 Ground (Black)
2 2.5A/+12V (Red)
3 Tachometer
4 PWM_Control
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
JL1
COM2
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
SP1 +
I-SATA0 I-SATA1
JBT1
JSD2
LICENSE
Intel
C621
FANB
JOH1
JIPMB1
JSD1
7
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
BIOS
JPME2
CPU SLOT5 PCI-E 3.0 X8
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
6
UID-SW
UID-LED
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT7 PCI-E 3.0 X8
BT1
JTPM1
+
USB6/7
LEDPWR
ON
PWR UID
RST
FAIL 1
PS
USB12(3.0)
LED
NIC
2
NIC
PWRHDD
LEDLED
NMIX
JF1
JF1
FAN5
1. FAN1
2. FAN2
3. FAN3
4. FAN4
IPMI_LAN
USB0/1
DIMMD1
DIMMD2
DIMMF1
DIMME1
COM1
5
VGA
DIMMA2
DIMMA1
DIMMB1
DIMMC1
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
5. FAN5
6. FANA
7. FANB
BAR CODE
MAC CODE
IPMI CODE
JNVI2C1
FAN3
FAN2
FAN4
JPWR2
FAN1
JPWR1
JSTBY1
JPI2C1
1
234
47
Super X11SPL-F User's Manual
SGPIO Headers
There are two Serial Link General Purpose Input/Output (I-SGPIO1, I-SGPIO2) headers located on the motherboard. I-SGPIO is for SATA use. Refer to the table below for pin
denitions.
SGPIO Header
Pin Denitions
Pin# Denition Pin# Denition
1 NC 2 NC
3 Ground 4 Data
5 Load 6 Ground
7 Clock 8 NC
NC = No Connection
Disk-On-Module Power Connectors
Two power connectors for SATA DOM (Disk-On-Module) devices are located at JSD1/JSD2. Connect appropriate cables here to provide power support for your Serial Link DOM devices.
I-SGPIO2
2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
JL1
COM2
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
SP1 +
JOH1
JIPMB1
1
JSD1
LICENSE
JBT1
I-SATA0 I-SATA1
Intel
C621
JSD2
4
FANB
3
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
BIOS
JPME2
CPU SLOT5 PCI-E 3.0 X8
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
UID-SW
UID-LED
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT7 PCI-E 3.0 X8
BT1
JTPM1
+
USB6/7
LEDPWR
ON
PWR UID
RST
FAIL 1
PS
USB12(3.0)
LED
NIC
2
NIC
PWRHDD
LEDLED
NMIX
JF1
JF1
DOM Power
Pin Denitions
Pin# Denition
1 5V
2 Ground
3 Ground
VGA
DIMMA2
DIMMA1
DIMMB1
DIMMC1
BAR CODE
MAC CODE
IPMI CODE
JNVI2C1
FAN3
FAN2
FAN4
IPMI_LAN
USB0/1
DIMMD1
DIMMD2
DIMMF1
DIMME1
JPWR2
COM1
JPWR1
JSTBY1
FAN1
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
1. I-SGPIO1
FAN5
2. I-SGPIO2
3. JSD1 (DOM PWR)
4. JSD2 (DOM PWR)
JPI2C1
48
Chapter 2: Installation
TPM/Port 80 Header
A Trusted Platform Module (TPM)/Port 80 header is located at JTPM1 to provide TPM support and Port 80 connection. Use this header to enhance system performance and data security.
Refer to the table below for pin denitions. Please go to the following link for more information
on the TPM: http://www.supermicro.com/manuals/other/TPM.pdf.
Trusted Platform Module Header
Pin Denitions
Pin# Denition Pin# Denition
1 +3.3V 2 SPI_CS#
3 RESET# 4 SPI_MISO
5 SPI_CLK 6 GND
7 SPI_MOSI 8 NC
9 +3.3V Stdby 10 SPI_IRQ#
M.2 Slot
M.2 is formerly known as Next Generation Form Factor (NGFF). The M.2 slot is designed for internal mounting devices. The X11SPL-F motherboard deploys an M key dedicated for SSD devices with the ulitmate performance capability in a PCI-Express 3.0 x4 interface for native PCI-E SSD support. It can also support SATA devices.
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
JL1
COM2
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
SP1 +
JOH1
JIPMB1
JSD1
LICENSE
JBT1
I-SATA0 I-SATA1
Intel
C621
JSD2
FANB
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
BIOS
CPU SLOT5 PCI-E 3.0 X8
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
MH11
2
M.2 PCI-E 3.0 X4
LE3
JPME2
FANA
UID-SW
UID-LED
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT7 PCI-E 3.0 X8
BT1
JTPM1
+
USB6/7
LEDPWR
USB12(3.0)
1
JF1
ON
PWR UID
RST
FAIL 1
PS
LED
NIC
2
NIC
PWRHDD
LEDLED
NMIX
JF1
1. TPM Header
FAN5
2. M.2 Slot
JPI2C1
IPMI_LAN
USB0/1
DIMMD1
DIMMD2
DIMMF1
DIMME1
JPWR2
COM1
JPWR1
JSTBY1
FAN1
VGA
DIMMA2
DIMMA1
DIMMB1
DIMMC1
BAR CODE
MAC CODE
IPMI CODE
JNVI2C1
FAN3
FAN2
FAN4
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
49
Super X11SPL-F User's Manual
Standby Power
The Standby Power header is located at JSTBY1 on the motherboard. You must have a card with a Standby Power connector and a cable to use this feature. Refer to the table below
for pin denitions.
Standby Power
Pin Denitions
Pin# Denition
1 +5V Standby
2 Ground
3 No Connection
Internal Speaker/Buzzer
The Internal Speaker/Buzzer (SP1) is used to provide audible indications for various beep
codes. Refer to the table below for pin denitions.
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
JL1
COM2
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
SP1
2
+
JOH1
JIPMB1
JSD1
LICENSE
JBT1
I-SATA0 I-SATA1
Intel
C621
JSD2
FANB
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
BIOS
JPME2
CPU SLOT5 PCI-E 3.0 X8
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
Internal Buzzer
Pin Denitions
Pin# Denition
1 Pos (+) Beep In
2 Neg (-) Alarm Speaker
UID-SW
UID-LED
VGA
DIMMA2
DIMMA1
DIMMB1
BAR CODE
MAC CODE
IPMI CODE
FAN2
LAN1LAN2
JLAN1JLAN2
CPU
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT7 PCI-E 3.0 X8
BT1
JTPM1
+
USB6/7
LEDPWR
ON
PWR UID
RST
FAIL 1
PS
USB12(3.0)
LED
NIC
2
NIC
PWRHDD
LEDLED
NMIX
JF1
JF1
DIMMC1
JNVI2C1
FAN3
FAN4
USB8/9(3.0)
IPMI_LAN
USB0/1
DIMMD2
DIMMF1
DIMME1
DIMMD1
JPWR2
COM1
FAN1
JPWR1
JSTBY1
1. Standby Power
FAN5
2. Internal Speaker
JPI2C1
1
50
Chapter 2: Installation
Power SMB (I2C) Header
The Power System Management Bus (I2C) connector (JPI2C1) monitors the power supply,
fan, and system temperatures. Refer to the table below for pin denitions.
Power SMB Header
Pin Denitions
Pin# Denition
1 Clock
2 Data
3 PMBUS_Alert
4 Ground
5 +3.3V
4-pin BMC External I2C Header
A System Management Bus header for IPMI 2.0 is located at JIPMB1. Connect the appropriate cable here to use the IPMB I2C connection on your system. Refer to the table below for pin
denitions.
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
2
JL1
COM2
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
SP1
+
JOH1
JIPMB1
JSD1
LICENSE
JBT1
I-SATA0 I-SATA1
Intel
C621
JSD2
FANB
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
BIOS
JPME2
CPU SLOT5 PCI-E 3.0 X8
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
UID-SW
UID-LED
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT7 PCI-E 3.0 X8
BT1
JTPM1
+
USB6/7
LEDPWR
ON
PWR UID
RST
FAIL 1
PS
USB12(3.0)
LED
NIC
2
NIC
PWRHDD
LEDLED
NMIX
JF1
JF1
External I2C Header
Pin Denitions
Pin# Denition
1 Data
2 Ground
3 Clock
4 No Connection
VGA
DIMMA2
DIMMA1
DIMMB1
DIMMC1
BAR CODE
MAC CODE
IPMI CODE
JNVI2C1
FAN3
FAN2
FAN4
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
IPMI_LAN
USB0/1
DIMMD1
DIMMD2
DIMMF1
DIMME1
JPWR2
COM1
FAN1
JPWR1
JSTBY1
1. Power SMB Header
FAN5
2. BMC External Header
JPI2C1
1
51
Super X11SPL-F User's Manual
Chassis Intrusion
A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable from the chassis to inform you of a chassis intrusion when the chassis is opened. Refer to
the table below for pin denitions.
Chassis Intrusion
Pin Denitions
Pin# Denition
1 Intrusion Input
2 Ground
NVMe I2C Header
Connector JNVI2C1 is a management header for the Supermicro AOC NVMe PCI-E peripheral cards. Please connect the I2C cable to this connector.
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
1
JWD1
JRK1
JL1
COM2
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
SP1 +
JOH1
JIPMB1
JSD1
LICENSE
JBT1
I-SATA0 I-SATA1
Intel
C621
JSD2
FANB
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
BIOS
JPME2
CPU SLOT5 PCI-E 3.0 X8
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
UID-SW
UID-LED
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT7 PCI-E 3.0 X8
BT1
JTPM1
+
USB6/7
LEDPWR
ON
PWR UID
RST
FAIL 1
PS
USB12(3.0)
LED
NIC
2
NIC
PWRHDD
LEDLED
NMIX
JF1
JF1
1. Chassis Intrusion
FAN5
2. NVMe I2C Header
JPI2C1
IPMI_LAN
USB0/1
DIMMD1
DIMMD2
DIMMF1
DIMME1
JPWR2
COM1
JPWR1
JSTBY1
FAN1
VGA
DIMMA2
DIMMA1
DIMMB1
DIMMC1
BAR CODE
MAC CODE
IPMI CODE
JNVI2C1
2
FAN3
FAN2
FAN4
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
52
Chapter 2: Installation
Power LED/Speaker
Pins 1-3 of JD1 are used for power LED indication, and pins 4-7 are for the speaker. Please note that the speaker connector pins (4-7) are used with an external speaker. If you wish to use the onboard speaker, you should close pins 6-7 with a cap. Refer to the tables below
for pin denitions.
PWR LED Connector
Pin Denitions
Pin# Signal
1 JD1_PIN1
2 FP_PWR_LED
3 FP_PWR_LED
Speaker Connector
Pin Denitions
Pin# Signal
4 P5V
5 Key
6 R_SPKPIN_N
7 R_SPKPIN
Overheat/Fan Fail LED Header
The JOH1 header is used to connect an LED indicator to provide warnings of chassis overheating and fan failure. This LED will blink when a fan failure occurs. Refer to the tables
below for pin denitions.
Overheat LED header
Status
State Denition
Solid Overheat
Blinking Fan Fail
Pin# Signal
1
2 OH Active
Overheat LED
Pin Denitions
Pull high to +3.3V
power through 330-ohm
resistor
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
UID-SW
UID-LED
ON
RST
FAIL 1
USB12(3.0)
LED
2
LEDLED
NMIX
JF1
VGA
DIMMA2
DIMMA1
DIMMB1
DIMMC1
JF1
PWR UID
PS
BAR CODE
NIC
NIC
MAC CODE
PWRHDD
IPMI CODE
JNVI2C1
FAN3
FAN2
FAN4
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
JOH1
JIPMB1
SP1
JSD1
+
I-SATA0 I-SATA1
CPU SLOT2 PCI-E 3.0 X8
2
JBT1
JSD2
FANB
COM2
JWD1
JPG1
JD1
1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
JRK1
JL1
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
JPME2
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
BIOS
LICENSE
Intel
C621
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT5 PCI-E 3.0 X8
CPU SLOT7 PCI-E 3.0 X8
BT1
+
USB6/7
JTPM1
LEDPWR
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
IPMI_LAN
USB0/1
DIMMD1
DIMMD2
DIMMF1
DIMME1
JPWR2
COM1
JPWR1
FAN1
1. Power LED/Speaker Header
FAN5
2. Overheat/Fan Fail LED Header
JSTBY1
JPI2C1
53
Super X11SPL-F User's Manual
SATA Ports
The X11SPL-F has eight SATA 3.0 ports (I-SATA0 ~ I-SATA7) supported by the Intel PCH C621 chipset. These SATA ports support RAID 0, 1, 5, and 10. SATA ports provide serial-link signal connections, which are faster than the connections of Parallel ATA. Refer to the table
below for pin denitions.
Note: Supermicro SuperDOMs are yellow SATADOM connectors with power pins built in and do not require separate external power cables. These connectors are backwards compatible with non-Supermicro SATADOMS that require an external power supply.
SATA 3.0 Port
Pin Denitions
Pin# Signal
1 Ground
2 SATA_TXP
3 SATA_TXN
4 Ground
5 SATA_RXN
6 SATA_RXP
7 Ground
UID-SW
UID-LED
VGA
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
JOH1
JIPMB1
JSD1
SP1 +
JBT1
I-SATA0 I-SATA1
CPU SLOT2 PCI-E 3.0 X8
1
JSD2
2
FANB
COM2
JWD1
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
JRK1
3
I-SGPIO2
4
I-SATA2
I-SATA3
5
I-SATA4
I-SATA5
I-SATA6
6
I-SATA7
7
JL1
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
JPME2
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
BIOS
LICENSE
Intel
C621
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT5 PCI-E 3.0 X8
CPU SLOT7 PCI-E 3.0 X8
BT1
USB12(3.0)
+
USB6/7
JTPM1
LEDPWR
DIMMA2
DIMMA1
DIMMB1
DIMMC1
JF1
ON
PWR UID
RST
FAIL 1
PS
LED
BAR CODE
NIC
2
NIC
MAC CODE
PWRHDD
LEDLED
IPMI CODE
NMIX
JNVI2C1
FAN3
FAN2
FAN4
JF1
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
IPMI_LAN
USB0/1
DIMMD1
DIMMD2
DIMMF1
DIMME1
JPWR2
COM1
JPWR1
JSTBY1
FAN1
1. I-SATA0
FAN5
2. I-SATA1
3. I-SATA2
4. I-SATA3
5. I-SATA4
6. I-SATA5
7. I-SATA6
8. I-SATA7
JPI2C1
8
54
Chapter 2: Installation
Intel RAID Key Header
The JRK1 header allows the user to enable RAID functions for NVMe connections. Refer to
the table below for pin denitions.
Intel RAID Key Header
Pin Denitions
Pin# Dention
1 GND
2 PU 3.3V Stdby
3
4
GND
PCH RAID KEY
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
JL1
COM2
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
SP1 +
JOH1
1
JBT1
JIPMB1
I-SATA0 I-SATA1
JSD2
FANB
JSD1
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
JPME2
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
BIOS
LICENSE
Intel
C621
UID-LED
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT5 PCI-E 3.0 X8
CPU SLOT7 PCI-E 3.0 X8
BT1
USB12(3.0)
+
USB6/7
JTPM1
LEDPWR
UID-SW
ON
RST
FAIL 1
LED
2
LEDLED
NMIX
JF1
1. Intel RAID Key
FAN5
JPI2C1
IPMI_LAN
USB0/1
DIMMD1
DIMMD2
DIMMF1
DIMME1
JPWR2
COM1
JPWR1
JSTBY1
FAN1
VGA
DIMMA2
DIMMA1
DIMMB1
DIMMC1
JF1
PWR UID
PS
BAR CODE
NIC
NIC
MAC CODE
PWRHDD
IPMI CODE
JNVI2C1
FAN3
FAN2
FAN4
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
55
Super X11SPL-F User's Manual
2.8 Jumper Settings
How Jumpers Work
To modify the operation of the motherboard, jumpers can be used to choose between optional
settings. Jumpers create shorts between two pins to change the function of the connector.
Pin 1 is identied with a square solder pad on the printed circuit board. See the diagram below for an example of jumping pins 1 and 2. Refer to the motherboard layout page for jumper locations.
Note: On two-pin jumpers, "Closed" means the jumper is on and "Open" means the jumper is off the pins.
Connector
Pins
Jumper
Setting
3 2 1
3 2 1
CMOS Clear
JBT1 is used to clear CMOS, which will also clear any passwords. Instead of pins, this jumper
consists of contact pads to prevent accidentally clearing the contents of CMOS.
To Clear CMOS
1. First power down the system and unplug the power cord(s).
2. Remove the cover of the chassis to access the motherboard.
3. Remove the onboard battery from the motherboard.
4. Short the CMOS pads with a metal object such as a small screwdriver for at least four seconds.
5. Remove the screwdriver (or shorting device).
6. Replace the cover, reconnect the power cord(s), and power on the system.
Note: Clearing CMOS will also clear all passwords.
Do not use the PW_ON connector to clear CMOS.
JBT1 contact pads
56
Chapter 2: Installation
Watchdog
Watchdog (JWD1) is a system monitor that can reboot the system when a software application hangs. Close pins 1-2 to reset the system if an application hangs. Close pins 2-3 to generate a non-maskable interrupt (NMI) signal for the application that hangs. Refer to the table below
for jumper settings. The Watchdog must also be enabled in the BIOS.
Watchdog
Jumper Settings
Jumper Setting Denition
Pins 1-2 Reset
Pins 2-3 NMI
Open Disabled
VGA Enable/Disable
Jumper JPG1 allows the user to enable the onboard VGA connector. The default setting is
pins 1-2 to enable the connection. Refer to the table below for jumper settings.
1
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
JL1
COM2
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
2
SP1 +
JOH1
JIPMB1
JSD1
LICENSE
JBT1
I-SATA0 I-SATA1
Intel
C621
JSD2
FANB
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
BIOS
JPME2
CPU SLOT5 PCI-E 3.0 X8
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
Jumper Setting Denition
Pins 1-2 Enabled
Pins 2-3 Disabled
UID-SW
UID-LED
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT7 PCI-E 3.0 X8
BT1
JTPM1
+
USB6/7
LEDPWR
ON
PWR UID
RST
FAIL 1
PS
USB12(3.0)
LED
NIC
2
NIC
PWRHDD
LEDLED
NMIX
JF1
JF1
VGA Enable/Disable
Jumper Settings
VGA
LAN1LAN2
JLAN1JLAN2
DIMMA2
DIMMA1
DIMMB1
DIMMC1
CPU
BAR CODE
MAC CODE
IPMI CODE
JNVI2C1
FAN3
FAN2
FAN4
USB8/9(3.0)
IPMI_LAN
USB0/1
DIMMD2
DIMMF1
DIMME1
DIMMD1
JPWR2
COM1
FAN1
JPWR1
JSTBY1
1. Watchdog
FAN5
2. VGA Enable/Disable
JPI2C1
57
Super X11SPL-F User's Manual
ME Manufacturing Mode
Close pins 2-3 of jumper JPME2 to bypass SPI ash security and force the system to operate in the manufacturing mode, which will allow the user to ash the system rmware from a host server for system setting modications. Refer to the table below for jumper settings.
The default setting is Normal.
Manufacturing Mode
Jumper Settings
Jumper Setting Denition
Pins 1-2 Normal
Pins 2-3 Manufacturing Mode
LAN1/LAN2 Enable/Disable
Jumpers JPL1 and JPL2 enables or disables LAN ports 1 and 2 on the motherboard. See
the table below for jumper settings. The default setting is enabled.
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
JL1
COM2
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
SP1 +
JOH1
JIPMB1
JSD1
LICENSE
JBT1
I-SATA0 I-SATA1
JSD2
FANB
1
3
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
JPME2
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
Intel
C621
BIOS
LAN Enable
Jumper Settings
Jumper Setting Denition
Pins 1-2 Enabled (default)
Piins 2-3 Disabled
UID-SW
UID-LED
ON
RST
FAIL 1
USB12(3.0)
LED
2
LEDLED
NMIX
JF1
VGA
DIMMA2
DIMMA1
DIMMB1
DIMMC1
JF1
PWR UID
PS
BAR CODE
NIC
NIC
MAC CODE
PWRHDD
IPMI CODE
JNVI2C1
FAN3
FAN2
FAN4
2
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT5 PCI-E 3.0 X8
CPU SLOT7 PCI-E 3.0 X8
BT1
+
USB6/7
JTPM1
LEDPWR
1. Manufacturing Mode
FAN5
2. LAN1 Enable
3. LAN2 Enable
JPI2C1
IPMI_LAN
USB0/1
DIMMD1
DIMMD2
DIMMF1
DIMME1
JPWR2
COM1
JPWR1
JSTBY1
FAN1
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
58
Chapter 2: Installation
2.9 LED Indicators
LAN LEDs
Two LAN ports (LAN1, LAN2) are located on the I/O back panel of the motherboard. Each Ethernet LAN port has two LEDs. The green LED indicates activity, while the other Link LED may be green, amber, or off to indicate the speed of the connection. Refer to the tables below for more information.
LAN1/2 Activity LED (Right)
LED State
Color Status Denition
Green Flashing Active
LAN1/2 Link LED (Left)
LED State
LED Color Denition
Green 100 Mbps
Yellow/Amber 1 Gbps
M.2 LED
An M.2 LED is located at LE3 on the motherboard. When LE3 is blinking, M.2 functions normally. Refer to the table below for more information.
M.2
LED State
LED Color Denition
Green: Blinking Device Working
1
2
UID-SW
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
JL1
COM2
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
SP1 +
JOH1
JIPMB1
JSD1
LICENSE
JBT1
I-SATA0 I-SATA1
Intel
C621
JSD2
FANB
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
BIOS
JPME2
3
CPU SLOT5 PCI-E 3.0 X8
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
UID-LED
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT7 PCI-E 3.0 X8
BT1
JTPM1
+
USB6/7
LEDPWR
ON
PWR UID
RST
FAIL 1
PS
USB12(3.0)
LED
NIC
2
NIC
PWRHDD
LEDLED
NMIX
JF1
JF1
IPMI_LAN
USB0/1
DIMMD1
DIMMD2
DIMMF1
DIMME1
JPWR2
COM1
JPWR1
JSTBY1
FAN1
VGA
DIMMA2
DIMMA1
DIMMB1
DIMMC1
BAR CODE
MAC CODE
IPMI CODE
JNVI2C1
FAN3
FAN2
FAN4
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
1. LAN1 LED
FAN5
2. LAN2 LED
3. M.2 LED
JPI2C1
59
Super X11SPL-F User's Manual
IPMI LAN LEDs
In addition to LAN1 and LAN2, an IPMI LAN is also located on the I/O back panel. The amber LED on the right indicates activity, while the green LED on the left indicates the speed of the connection. Refer to the table below for more information.
IPMI LAN
Activity LEDLink LED
Link (left)
IPMI LAN LEDs
Color/State Denition
Green: Solid
Amber: Solid
100 Mbps
1Gbps
Activity (Right) Amber: Blinking Active
BMC Heartbeat LED
A BMC Heartbeat LED is located at LEDBMC on the motherboard. When LEDBMC is blinking, the BMC is functioning normally. Refer to the table below for more information.
BMC Heartbeat LED Indicator
LED Color Denition
Green:
Blinking
BMC Normal
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
JL1
COM2
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
ASpeed
2
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
SP1 +
JOH1
JIPMB1
JSD1
LICENSE
JBT1
I-SATA0 I-SATA1
C621
JSD2
FANB
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
JPME2
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
BIOS
Intel
UID-LED
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT5 PCI-E 3.0 X8
CPU SLOT7 PCI-E 3.0 X8
BT1
USB12(3.0)
+
USB6/7
JTPM1
LEDPWR
UID-SW
ON
PWR UID
RST
FAIL 1
PS
LED
NIC
2
NIC
PWRHDD
LEDLED
NMIX
JF1
1
1. Dedicated IPMI LAN LED
FAN5
2. BMC Heartbeat LED
JPI2C1
IPMI_LAN
USB0/1
DIMMD1
DIMMD2
DIMMF1
DIMME1
JPWR2
COM1
JPWR1
JSTBY1
FAN1
VGA
DIMMA2
DIMMA1
DIMMB1
DIMMC1
JF1
BAR CODE
MAC CODE
IPMI CODE
JNVI2C1
FAN3
FAN2
FAN4
USB8/9(3.0)
LAN1LAN2
JLAN1JLAN2
CPU
60
Chapter 2: Installation
Onboard Power LED
The Onboard Power LED is located at LEDPWR on the motherboard. When this LED is on, the system is on. Be sure to turn off the system and unplug the power cord before removing or installing components. Refer to the table below for more information.
Onboard Power LED Indicator
LED Color Denition
System Off
Off
(power cable not
connected)
Green System On
Unit ID LED
A rear UID LED indicator (UID-LED) is located near the UID switch on the I/O back panel.
This UID indicator provides easy identication of a system unit that may need service.
I-SGPIO2
I-SATA2
I-SATA3
I-SATA4
I-SATA5
I-SATA6
I-SATA7
JWD1
JRK1
JL1
COM2
JPG1
JD1
USB10/11(3.0)
USB2/3
USB4/5
I-SGPIO1
ASpeed
AST2500
LEDBMC
PCH SLOT1 PCI-E 3.0 X4(IN X8)
CPU SLOT2 PCI-E 3.0 X8
SP1 +
JOH1
JIPMB1
JSD1
LICENSE
JBT1
I-SATA0 I-SATA1
Intel
C621
JSD2
FANB
JPL2
CPU SLOT3 PCI-E 3.0 X8
CPU SLOT4 PCI-E 3.0 X8(IN X16)
BIOS
JPME2
CPU SLOT5 PCI-E 3.0 X8
DESIGNED IN USA
REV:1.01
X11SPL-F
MH10
MH11
M.2 PCI-E 3.0 X4
LE3
FANA
LED Color Denition
Blue: On Unit Identied
2
UID-SW
UID-LED
JPL1
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT7 PCI-E 3.0 X8
BT1
JTPM1
+
USB6/7
LEDPWR
USB12(3.0)
1
JF1
ON
PWR UID
RST
FAIL 1
PS
LED
NIC
2
NIC
PWRHDD
LEDLED
NMIX
JF1
LED Indicator
VGA
DIMMA2
DIMMA1
DIMMB1
DIMMC1
BAR CODE
MAC CODE
IPMI CODE
JNVI2C1
FAN3
FAN2
FAN4
UID LED
LAN1LAN2
JLAN1JLAN2
CPU
USB8/9(3.0)
IPMI_LAN
USB0/1
DIMMD2
DIMMF1
DIMME1
DIMMD1
JPWR2
COM1
FAN1
JPWR1
JSTBY1
1. Onboard Power LED
FAN5
2. UID LED
JPI2C1
61
Super X11SPL-F User's Manual
Chapter 3
Troubleshooting
3.1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/ or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC power cord before adding, changing or installing any non hot-swap hardware components.
Before Power On
1. Make sure that there are no short circuits between the motherboard and chassis.
2. Disconnect all ribbon/wire cables from the motherboard, including those for the keyboard and mouse.
3. Remove all add-on cards.
4. Install the CPU (making sure it is fully seated) and connect the front panel connectors to the motherboard.
No Power
1. Make sure that there are no short circuits between the motherboard and the chassis.
2. Make sure that the ATX power connectors are properly connected.
3. Check that the 115V/230V switch, if available, on the power supply is properly set.
4. Turn the power switch on and off to test the system, if applicable.
5. The battery on your motherboard may be old. Check to verify that it still supplies ~3VDC. If it does not, replace it with a new one.
62
Chapter 3: Troubleshooting
No Video
1. If the power is on, but you have no video, remove all add-on cards and cables.
2. Use the speaker to determine if any beep codes are present. Refer to Appendix A for details on beep codes.
3. Remove all memory modules and turn on the system (if the alarm is on, check the specs of memory modules, reset the memory or try a different one).
System Boot Failure
If the system does not display POST (Power-On-Self-Test) or does not respond after the power is turned on, check the following:
1. Check for any error beep from the motherboard speaker.
If there is no error beep, try to turn on the system without DIMM modules installed. If there
is still no error beep, replace the motherboard.
If there are error beeps, clear the CMOS settings by unplugging the power cord and con-
tacting both pads on the CMOS clear jumper (JBT1). Refer to Section 2-8 in Chapter 2.
2. Remove all components from the motherboard, especially the DIMM modules. Make sure that system power is on and that memory error beeps are activated.
3. Turn on the system with only one DIMM module installed. If the system boots, check for bad DIMM modules or slots by following the Memory Errors Troubleshooting procedure
in this chapter.
Memory Errors
When a no-memory beep code is issued by the system, check the following:
1. Make sure that the memory modules are compatible with the system and are properly installed. See Chapter 2 for installation instructions. (For memory compatibility, refer to the "Tested Memory List" link on the motherboard's product page to see a list of supported memory.)
2. Check if different speeds of DIMMs have been installed. It is strongly recommended that you use the same RAM type and speed for all DIMMs in the system.
3. Make sure that you are using the correct type of ECC DDR4 modules recommended by the manufacturer.
4. Check for bad DIMM modules or slots by swapping a single module among all memory slots and check the results.
63
Super X11SPL-F User's Manual
Losing the System's Setup Conguration
1. Make sure that you are using a high-quality power supply. A poor-quality power supply may cause the system to lose the CMOS setup information. Refer to Chapter 2 for details on recommended power supplies.
2. The battery on your motherboard may be old. Check to verify that it still supplies ~3VDC. If it does not, replace it with a new one.
3. If the above steps do not x the setup conguration problem, contact your vendor for repairs.
When the System Becomes Unstable
A. If the system becomes unstable during or after OS installation, check the following:
1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest BIOS installed in your system.
2. Memory support: Make sure that the memory modules are supported by testing the modules using memtest86 or a similar utility.
Note: Click on the "Tested Memory List" link on the motherboard's product page to see a list of supported memory.
3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the bad HDDs with good ones.
4. System cooling: Check the system cooling to make sure that all heatsink fans and CPU/ system fans, etc., work properly. Check the hardware monitoring settings in the IPMI to make sure that the CPU and system temperatures are within the normal range. Also check the front panel Overheat LED and make sure that it is not on.
5. Adequate power supply: Make sure that the power supply provides adequate power to the system. Make sure that all power connectors are connected. Please refer to our website for more information on the minimum power requirements.
6. Proper software support: Make sure that the correct drivers are used.
B. If the system becomes unstable before or during OS installation, check the following:
1. Source of installation: Make sure that the devices used for installation are working properly, including boot devices such as CD/DVD and CD/DVD-ROM.
2. Cable connection: Check to make sure that all cables are connected and working properly.
64
Chapter 3: Troubleshooting
3. Using the minimum conguration for troubleshooting: Remove all unnecessary components (starting with add-on cards rst), and use the minimum conguration (but
with the CPU and a memory module installed) to identify the trouble areas. Refer to the steps listed in Section A above for proper troubleshooting procedures.
4. Identifying bad components by isolating them: If necessary, remove a component in question from the chassis, and test it in isolation to make sure that it works properly. Replace a bad component with a good one.
5. Check and change one component at a time instead of changing several items at the same time. This will help isolate and identify the problem.
6. To nd out if a component is good, swap this component with a new one to see if the system will work properly. If so, then the old component is bad. You can also install the component in question in another system. If the new system works, the component is good and the old system has problems.
65
Super X11SPL-F User's Manual
3.2 Technical Support Procedures
Before contacting Technical Support, please take the following steps. Also, please note that as a motherboard manufacturer, Supermicro also sells motherboards through its channels, so it
is best to rst check with your distributor or reseller for troubleshooting services. They should know of any possible problems with the specic system conguration that was sold to you.
1. Please go through the Troubleshooting Procedures and Frequently Asked Questions (FAQ) sections in this chapter or see the FAQs on our website (http://www.supermicro.
com/FAQ/index.php) before contacting Technical Support.
2. BIOS upgrades can be downloaded from our website (http://www.supermicro.com/
ResourceApps/BIOS_IPMI_Intel.html).
3. If you still cannot resolve the problem, include the following information when contacting Supermicro for technical support:
Motherboard model and PCB revision number
BIOS release date/version (This can be seen on the initial display when your system rst
boots up.)
System conguration
4. An example of a Technical Support form is on our website at http://www.supermicro.com/
RmaForm/.
Distributors: For immediate assistance, please have your account number ready when
placing a call to our Technical Support department. We can be reached by email at sup­port@supermicro.com.
66
Chapter 3: Troubleshooting
3.3 Frequently Asked Questions
Question: What type of memory does my motherboard support?
Answer: The motherboard supports DDR4 ECC RDIMM, LRDIMM, or 3DS LRDIMM modules.
To enhance memory performance, do not mix memory modules of different speeds and sizes. Please follow all memory installation instructions given on Section 2-4 in Chapter 2.
Question: How do I update my BIOS?
Answer: It is recommended that you do not upgrade your BIOS if you are not experiencing
any problems with your system. Updated BIOS les are located on our website at http://
www.supermicro.com/ResourceApps/BIOS_IPMI_Intel.html. Please check our BIOS warning
message and the information on how to update your BIOS on our website. Select your
motherboard model and download the BIOS le to your computer. Also, check the current
BIOS revision to make sure that it is newer than your BIOS before downloading. Please
unzip the BIOS le onto a bootable USB device. Run the batch le using the format FLASH. BAT lename.rom from your bootable USB device to ash the BIOS. Then, your system will
automatically reboot.
Warning: Do not shut down or reset the system while updating the BIOS to prevent possible system boot failure!
Note: The SPI BIOS chip used on this motherboard cannot be removed. Send your motherboard back to our RMA Department at Supermicro for repair. For BIOS Recovery instructions, please refer to the AMI BIOS Recovery Instructions posted at http://www.
supermicro.com/support/manuals/.
67
Super X11SPL-F User's Manual
3.4 Battery Removal and Installation
Battery Removal
To remove the onboard battery, follow the steps below:
1. Power off your system and unplug your power cable.
2. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to unlock it. Once unlocked, the battery will pop out from the holder.
3. Remove the battery.
Proper Battery Disposal
Warning: Please handle used batteries carefully. Do not damage the battery in any way; a
damaged battery may release hazardous materials into the environment. Do not discard a used
battery in the garbage or a public landll. Please comply with the regulations set up by your
local hazardous waste management agency to dispose of your used battery properly.
Battery Installation
1. To install an onboard battery, follow steps 1 and 2 above and continue below:
2. Identify the battery's polarity. The positive (+) side should be facing up.
3. Insert the battery into the battery holder and push it down until you hear a click to ensure that the battery is securely locked.
Warning: When replacing a battery, be sure to only replace it with the same type.
OR
68
Chapter 3: Troubleshooting
3.5 Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered. You can obtain service by calling your vendor for a Returned Merchandise Authorization (RMA) number. When returning the motherboard to the manufacturer, the RMA number should be prominently displayed on the outside of the shipping carton, and the shipping package is mailed prepaid or hand-carried. Shipping and handling charges will be applied for all orders that must be mailed when service is complete. For faster service, you can also request a RMA authorization online (http://www.supermicro.
com/RmaForm/).
This warranty only covers normal consumer use and does not cover damages incurred in shipping or from failure due to the alternation, misuse, abuse or improper maintenance of products.
During the warranty period, contact your distributor rst for any product problems.
69
Super X11SPL-F User's Manual
Chapter 4
BIOS
4.1 Introduction
This chapter describes the AMIBIOS™ Setup utility for the motherboard. The BIOS is stored
on a chip and can be easily upgraded using a ash program.
Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual. Please refer to the Manual
Download area of our website for any changes to the BIOS that may not be reected
in this manual.
Starting the Setup Utility
To enter the BIOS Setup Utility, hit the <Delete> key while the system is booting-up. (In most cases, the <Delete> key is used to invoke the BIOS setup screen. There are a few cases when other keys are used, such as <F1>, <F2>, etc.) Each main BIOS menu option is described in this manual.
The Main BIOS screen has two main frames. The left frame displays all the options that can
be congured. “Grayed-out” options cannot be congured. The right frame displays the key
legend. Above the key legend is an area reserved for a text message. When an option is selected in the left frame, it is highlighted in white. Often a text message will accompany it. (Note that the BIOS has default text messages built in. We retain the option to include, omit, or change any of these text messages.) Settings printed in Bold are the default values.
A " " indicates a submenu. Highlighting such an item and pressing the <Enter> key will open the list of settings within that submenu.
The BIOS setup utility uses a key-based navigation system called hot keys. Most of these hot keys (<F1>, <F2>, <F3>, <Enter>, <ESC>, <Arrow> keys, etc.) can be used at any time during the setup navigation process.
70
Chapter 4: BIOS
4.2 Main Setup
When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen. You can
always return to the Main setup screen by selecting the Main tab on the top of the screen. The Main BIOS setup screen is shown below and the following items will be displayed:
System Date/System Time
Use this option to change the system date and time. Highlight System Date or System Time using the arrow keys. Enter new values using the keyboard. Press the <Tab> key or the arrow
keys to move between elds. The date must be entered in MM/DD/YYYY format. The time
is entered in HH:MM:SS format.
Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00. The date's default value is the BIOS build date after RTC reset.
Supermicro X11SPL-F
BIOS Version
This item displays the version of the BIOS ROM used in the system.
Build Date
This item ays the date when the version of the BIOS ROM used in the system was built.
71
Super X11SPL-F User's Manual
CPLD Version
This item displays the Complex Programmable Logic Device version.
Memory Information
Total Memory
This item displays the total size of memory available in the system.
72
Chapter 4: BIOS
4.3 Advanced Setup Congurations
Use the arrow keys to select the Advanced menu and press <Enter> to access the submenu items:
Warning: Take caution when changing the Advanced settings. An incorrect value, a very high DRAM frequency, or an incorrect DRAM timing setting may make the system unstable. When this occurs, revert to default manufacturer settings.
Boot Feature
Quiet Boot
Use this feature to select the screen display between the POST messages and the OEM logo upon bootup. Select Disabled to display the POST messages. Select Enabled to display the OEM logo instead of the normal POST messages. The options are Disabled and Enabled.
Option ROM Messages
Use this feature to set the display mode for the Option ROM. Select Keep Current to display the current AddOn ROM setting. Select Force BIOS to use the Option ROM display set by the system BIOS. The options are Force BIOS and Keep Current.
Bootup NumLock State
Use this feature to set the Power-on state for the <Numlock> key. The options are On and Off.
73
Super X11SPL-F User's Manual
Wait For "F1" If Error
Use this feature to force the system to wait until the "F1" key is pressed if an error occurs. The options are Disabled and Enabled.
INT19 (Interrupt 19) Trap Response
Interrupt 19 is the software interrupt that handles the boot disk function. When this item is set to Immediate, the ROM BIOS of the host adaptors will "capture" Interrupt 19 at bootup immediately and allow the drives that are attached to these host adaptors to function as bootable disks. If this item is set to Postponed, the ROM BIOS of the host adaptors will not capture Interrupt 19 immediately and allow the drives attached to these adaptors to function as bootable devices at bootup. The options are Immediate and Postponed.
Re-try Boot
If this item is enabled, the BIOS will automatically reboot the system from a specied boot
device after its initial boot failure. The options are Disabled, Legacy Boot, and EFI Boot.
Install Windows 7 USB Support
Enable this feature to use the USB keyboard and mouse during the Windows 7 installation since the native XHCI driver support is unavailable. Use a SATA optical drive as a USB drive, and USB CD/DVD drives are not supported. Disable this feature after the XHCI driver has been installed in Windows. The options are Disabled and Enabled.
Port 61h Bit-4 Emulation
Select Enabled to enable the emulation of Port 61h bit-4 toggling in SMM (System Management Mode). The options are Disabled and Enabled.
Power Conguration
Watch Dog Function
If enabled, the Watch Dog Timer will allow the system to reset or generate NMI based on jumper settings when it is expired for more than ve minutes. The options are Disabled and Enabled.
Restore on AC Power Loss
Use this feature to set the power state after a power outage. Select Stay Off for the system power to remain off after a power loss. Select Power On for the system power to be turned on after a power loss. Select Last State to allow the system to resume its last power state before a power loss. The options are Stay Off, Power On, and Last State.
74
Chapter 4: BIOS
Power Button Function
This feature controls how the system shuts down when the power button is pressed. Select 4 Seconds Override for the user to power off the system after pressing and holding the power button for 4 seconds or longer. Select Instant Off to instantly power off the system as soon as the user presses the power button. The options are Instant Off and 4 Seconds Override.
Throttle on Power Fail
Use this feature to decrease system power by throttling CPU frequency when one power supply has failed. The options are Disabled and Enabled.
CPU Conguration
The following CPU information will display:
Processor BSP Revision
Processor Socket
Processor ID
Processor Frequency
Processor Max Ratio
Processor Min Ratio
Microcode Revision
L1 Cache RAM
L2 Cache RAM
L3 Cache RAM
Processor 0 Version
Hyper-Threading (ALL) (Available when supported by the CPU)
Select Enable to support Intel Hyper-threading Technology to enhance CPU performance. The options are Disable and Enable.
75
Super X11SPL-F User's Manual
Execute Disable Bit (Available if supported by the OS & the CPU)
Select Enable to enable the Execute-Disable Bit, which will allow the processor to designate areas in the system memory where an application code can execute and where it cannot,
thus preventing a worm or a virus from ooding illegal codes to overwhelm the processor
or damage the system during an attack. The options are Disable and Enable. (Refer to the Intel® and Microsoft® websites for more information.)
Intel Virtualization Technology
Use feature to enable the Vanderpool Technology. This technology allows the system to run several operating systems simultaneously. The options are Disable and Enable.
PPIN Control
Select Unlock/Enable to use the Protected Processor Inventory Number (PPIN) in the system. The options are Unlock/Disable and Unlock/Enable.
Hardware Prefetcher (Available when supported by the CPU)
If set to Enable, the hardware prefetcher will prefetch streams of data and instructions from the main memory to the L2 cache to improve CPU performance. The options are Disable and Enable.
Adjacent Cache Prefetch (Available when supported by the CPU)
The CPU prefetches the cache line for 64 bytes if this feature is set to Disabled. The CPU prefetches both cache lines for 128 bytes as comprised if this feature is set to Enable. The options are Enable and Disable.
DCU Streamer Prefetcher (Available when supported by the CPU)
Select Enable to enable the DCU (Data Cache Unit) Streamer Prefetcher which will stream and prefetch data and send it to the Level 1 data cache to improve data processing and system performance. The options are Disable and Enable.
DCU IP Prefetcher (Available when supported by the CPU)
Select Enable for DCU (Data Cache Unit) IP Prefetcher support, which will prefetch IP addresses to improve network connectivity and system performance. The options are Enable and Disable.
LLC Prefetch
If set to Enable, the hardware prefetcher will prefetch streams of data and instructions from the main memory to the L3 cache to improve CPU performance. The options are Disable and Enable.
Extended APIC
Select Enable to activate APIC (Advanced Programmable Interrupt Controller) support. The options are Disable and Enable.
76
Chapter 4: BIOS
AES-NI
Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to ensure data security. The options are Disable and Enable.
Advanced Power Management Conguration
CPU P State Control
This feature allows the user to congure the following CPU power settings:
SpeedStep (Pstates)
Intel SpeedStep Technology allows the system to automatically adjust processor voltage
and core frequency to reduce power consumption and heat dissipation. The options are Disable and Enable.
EIST PSD Funtion
This feature allows the user to choose between Hardware and Software to control the processor's frequency and performance (P-state). In HW_ALL mode, the processor hard­ware is responsible for coordinating the P-state, and the OS is responsible for keeping the P-state request up to date on all Logical Processors. In SW_ALL mode, the OS Power Manager is responsible for coordinating the P-state, and must initiate the transition on all Logical Processors. In SW_ANY mode, the OS Power Manager is responsible for coordinating the P-state and may initiate the transition on any Logical Processors. The options are HW_ALL, SW_ALL, and SW_ANY.
Turbo Mode
This feature will enable dynamic control of the processor, allowing it to run above stock frequency. The options are Disable and Enable.
Hardware PM State Control
Hardware P-States
This setting allows the user to select between OS and hardware-controlled P-states. Selecting Native Mode allows the OS to choose a P-state. Selecting Out of Band Mode allows the hardware to autonomously choose a P-state without OS guidance. Selecting Native Mode with No Legacy Support functions as Native Mode with no support for older hardware. The options are Disable, Native Mode, Out of Band Mode, and Native Mode with No Legacy Support.
77
Super X11SPL-F User's Manual
CPU C State Control
Autonomous Core C-State
Enabling this setting allows the hardware to autonomously choose to enter a C-state based on power consumption and clock speed. The options are Disable and Enable.
CPU C6 Report
Select Enable to allow the BIOS to report the CPU C6 State (ACPI C3) to the operating system. During the CPU C6 State, the power to all cache is turned off. The options are Disable, Enable, and Auto.
Enhanced Halt State (C1E)
Select Enable to use Enhanced Halt State technology, which will signicantly reduce the
CPU's power consumption by reducing its clock cycle and voltage during a Halt-state. The options are Disable and Enable.
Package C State Control
Package C State
This feature allows the user to set the limit on the C State package register. The options are C0/C1 State, C2 State, C6 (Non Retention) State, C6 (Retention) State, No Limit, and Auto.
CPU T State Control
Software Controlled T-States
Use this feature to enable Software Controlled T-States. The options are Disable and Enable.
Chipset Conguration
Warning: Setting the wrong values in the following features may cause the system to malfunc­tion.
North Bridge
This feature allows the user to congure the following North Bridge settings.
78
UPI Conguration
The following UPI information will display:
Number of CPU
Number of IIO
Current UPI Link Speed
Current UPI Link Frequency
UPI Global MMIO Low Base / Limit
UPI Global MMIO High Base / Limit
UPI Pci-e Conguration Base / Size
Chapter 4: BIOS
Degrade Precedence
Use this feature to set degrade precedence when system settings are in conict. Select
Topology Precedence to degrade Features. Select Feature Precedence to degrade Topol­ogy. The options are Topology Precedence and Feature Precedence.
Link L0p Enable
Select Enable for the QPI to enter the L0p state for power saving. The options are Dis­able, Enable, and Auto.
Link L1 Enable
Select Enable for the QPI to enter the L1 state for power saving. The options are Dis­able, Enable, and Auto.
IO Directory Cache (IODC)
IO Directory Cache is an 8-entry cache that stores the directory state of remote IIO writes and memory lookups, and saves directory updates. Use this feature to lower cache to cache (C2C) transfer latencies. The options are Disable, Auto, Enable for Remote InvItoM Hybrid Push, InvItoM AllocFlow, Enable for Remote InvItoM Hybrid AllocNonAlloc, and Enable for Remote InvItoM and Remote WViLF.
Isoc Mode
Isochronous (Isoc) mode allows time-sensitive processes to be given priority. The options are Disable, Enable, and Auto.
79
Super X11SPL-F User's Manual
Memory Conguration
Enforce POR
Select POR (Plan of Record) to enforce POR restrictions on DDR4 frequency and volt­age programming. The options are POR and Disable.
Memory Frequency
Use this feature to set the maximum memory frequency for onboard memory modules. The options are Auto, 1866, 2000, 2133, 2200, 2400, 2600, and 2666.
Data Scrambling for NVDIMM
Use this feature to enable or disable data scrambling for non-volatile DIMM (NVDIMM) memory. The options are Auto, Disable, and Enable.
Data Scrambling for DDR4
Use this feature to enable or disable data scrambling for DDR4 memory. The options are Auto, Disable, and Enable.
tCCD_L Relaxation
Select Enable to get TCDD settings from SPD (Serial Presence Detect) and implement into memory RC code to improve system reliability. Select Disable for TCCD to follow Intel POR. The options are Disable and Enable.
Enable ADR
Select Enable for ADR (Automatic Diagnostic Repository) support to enhance memory performance. The options are Disable and Enable.
2X REFRESH
Use this feature to select the memory controller refresh rate to 2x refresh mode. The options are Auto and Enable.
Memory Topology
This item displays the information of onboard memory modules as detected by the BIOS.
Memory RAS Conguration
Static Virtual Lockstep Mode
Select Enable to run the system's memory channels in lockstep mode to minimize memory access latency. The options are Disable and Enable.
80
Chapter 4: BIOS
Mirror Mode
This feature allows memory to be mirrored between two channels, providing 100% redundancy. The options are Disable, Mirror Mode 1LM, and Mirror Mode 2LM.
UEFI ARM Mirror
Select Enable to support the UEFI-based address range mirroring with setup option. The options are Disable and Enable.
Memory Rank Sparing
Select Enable to enable memory-sparing support for memory ranks to improve memory performance. The options are Disable and Enable.
Correctable Error Threshold
Use this item to specify the threshold value for correctable memory-error logging, which sets a limit on the maximum number of events that can be logged in the memory error log at a given time. The default setting is 100.
SDDC Plus One
Single device data correction +1 (SDDC Plus One) organizes data in a single bundle (x4/x8 DRAM). If any or all the bits become corrupted, corrections occur. The x4 con­dition is corrected on all cases. The x8 condition is corrected only if the system is in Lockstep Mode. The options are Disable and Enable.
ADDDC Sparing
Adaptive Double Device Data Correction (ADDDC) Sparing detects when the prede­termined threshold for correctable errors is reached, copying the contents of the failing DIMM to spare memory. The failing DIMM or memory rank will then be disabled. The options are Disable and Enable.
Patrol Scrub
Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors detected on a memory module and send the correction to the requestor (the original source). When this item is set to Enable, the IO hub will read and write back one cache line every 16K cycles if there is no delay caused by internal processing. By using this method, roughly 64 GB of memory behind the IO hub will be scrubbed every day. The options are Disable and Enable.
Patrol Scrub Interval
This feature allows you to decide how many hours the system should wait before the next complete patrol scrub is performed. Use the keyboard to enter a value from 0-24. The default setting is 24.
81
Super X11SPL-F User's Manual
IIO Conguration
EV DFX Features
When this feature is set to Enable, the EV_DFX Lock Bits that are located on a proces­sor will always remain clear during electric tuning. The options are Disable and Enable.
CPU1 Conguration
IOU0 (II0 PCIe Br1)
This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the
user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU1 (II0 PCIe Br2)
This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the
user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU2 (II0 PCIe Br3)
This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the
user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
CPU SLOT5 PCI-E 3.0 X8 / CPU SLOT4 PCI-E 3.0 X8 (IN X16) / CPU SLOT6
PCI-E 3.0 X8 (IN X16) / CPU SLOT7 PCI-E 3.0 X8 / CPU SLOT2 PCI-E 3.0 X8 / CPU SLOT3 PCI-E 3.0 X8
Link Speed
Use this item to select the link speed for the PCI-E port specied by the user. The
options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).
The following information will also be displayed:
PCI-E Port Link Status
PCI-E Port Link Max
PCI-E Port Link Speed
PCI-E Port Max Payload Size
Selecting Auto for this feature will enable the motherboard to automatically detect the maximum Transaction Layer Packet (TLP) size for the connected PCI-E device,
allowing for maximum I/O efciency. Selecting 128B or 256B will designate maximum
packet size of 128 or 256. The options are 128B, 256B, and Auto.
82
Chapter 4: BIOS
IOAT Conguration
Disable TPH
Transparent Huge Pages (TPH) is a Linux memory management system that enables communication in larger blocks (pages). Enabling this feature will increase perfor­mance. The options are No and Yes.
Prioritize TPH
Use this feature to enable Prioritize TPH support. The options are Enable and Disable.
Relaxed Ordering
Select Enable to enable Relaxed Ordering support, which will allow certain transac­tions to violate the strict-ordering rules of PCI bus for a transaction to be completed prior to other transactions that have already been enqueued. The options are Disable and Enable.
Intel® VT for Directed I/O (VT-d)
Intel® VT for Directed I/O (VT-d)
Select Enable to use Intel Virtualization Technology for Direct I/O VT-d support by reporting the I/O device assignments to the VMM (Virtual Machine Monitor) through the DMAR ACPI tables. This feature offers fully-protected I/O resource sharing across Intel platforms, providing greater reliability, security and availability in networking and data-sharing. The options are Enable and Disable.
Interrupt Remapping
Use this feature to enable Interrupt Remapping support, which detects and controls external interrupt requests. The options are Enable and Disable.
PassThrough DMA
Use this feature to allow devices such as network cards to access the system memory without using a processor. Select Enable to use the Non-Isoch VT_D Engine Pass Through Direct Memory Access (DMA) support. The options are Enable and Disable.
ATS
Use this feature to enable Non-Isoch VT-d Engine Address Translation Services (ATS) support. ATS translates virtual addresses to physical addresses. The options are En- able and Disable.
83
Super X11SPL-F User's Manual
Posted Interrupt
Use this feature to enable VT_D Posted Interrupt. The options are Enable and Disable.
Coherency Support (Non-Isoch)
Use this feature to maintain setting coherency between processors or other devices. Select Enable for the Non-Isoch VT-d engine to pass through DMA to enhance system performance. The options are Enable and Disable.
Intel® VMD Technology
Intel® VMD for Volume Management Device on CPU1
VMD Cong for PStack0
Intel® VMD for Volume Management Device
Select Enable to use the Intel Volume Management Device Technology for this stack. The options are Disable and Enable.
*If the item above is set to Enable, the following items will be displayed:
CPU SLOT5 PCI-E 3.0 X8 VMD / CPU SLOT4 PCI-E 3.0 X8 (IN X16) VMD (Available when the device is detected by the system)
Select Enable to use the Intel Volume Management Device Technology for this spe-
cic root port. The options are Disable and Enable.
Hot Plug Capable (Available when the device is detected by the system)
Use this feature to enable hot plug support for PCIe root ports 1A~1D. The options are Disable and Enable.
VMD Cong for PStack1
Intel® VMD for Volume Management Device
Select Enable to use the Intel Volume Management Device Technology for this stack. The options are Disable and Enable.
*If the item above is set to Enable, the following items will be displayed:
CPU SLOT6 PCI-E 3.0 X8 (IN X16) VMD / CPU SLOT7 PCI-E 3.0 X8 VMD (Available when the device is detected by the system)
Select Enable to use the Intel Volume Management Device Technology for this spe­cic root port. The options are Disable and Enable.
84
Chapter 4: BIOS
Hot Plug Capable (Available when the device is detected by the system)
Use this feature to enable hot plug support for PCIe root ports 2A~2D. The options are Disable and Enable.
VMD Cong for PStack2
Intel® VMD for Volume Management Device
Select Enable to use the Intel Volume Management Device Technology for this stack. The options are Disable and Enable.
*If the item above is set to Enable, the following items will be displayed:
CPU SLOT2 PCI-E 3.0 X8 VMD / CPU SLOT3 PCI-E 3.0 X8 VMD (Available when the device is detected by the system)
Select Enable to use the Intel Volume Management Device Technology for this spe-
cic root port. The options are Disable and Enable.
Hot Plug Capable (Available when the device is detected by the system)
Use this feature to enable hot plug support for PCIe root ports 3A~3D. The options are Disable and Enable.
PCI-E Completion Timeout Disable
Use this feature to enable PCI-E Completion Timeout support for electric tuning. The options are Yes, No, and Per-Port.
South Bridge
The following USB information will display:
USB Module Version
USB Devices
Legacy USB Support
This feature enables support for USB 2.0 and older. The options are Enabled, Disabled, and Auto.
XHCI Hand-off
When this feature is disabled, the motherboard will not support USB 3.0. The options are Enabled and Disabled.
85
Super X11SPL-F User's Manual
Port 60/64 Emulation
This feature allows legacy I/O support for USB devices like mice and keyboards. The options are Enabled and Disabled.
Server ME Conguration
The following General ME Conguration will display:
Oper. Firmware Version
Backup Firmware Version
Recovery Firmware Version
ME Firmware Status #1
ME Firmware Status #2
Current State
Error Code
PCH SATA Conguration
When this submenu is selected, the AMI BIOS automatically detects the presence of the SATA devices that are supported by the Intel PCH chip and displays the following items:
SATA Controller
This item enables or disables the onboard SATA controller supported by the Intel PCH chip. The options are Disable and Enable.
Congure SATA as
Select AHCI to congure a SATA drive specied by the user as an AHCI drive. Select RAID to congure a SATA drive specied by the user as a RAID drive. The options are AHCI and
RAID.
SATA HDD Unlock
This feature allows the user to remove any password-protected SATA disk drives. The options are Enable and Disable.
Aggressive Link Power Management
When this item is set to Enable, the SATA AHCI controller manages the power usage of the SATA link. The controller will put the link in a low power mode during extended periods of I/O inactivity, and will return the link to an active state when I/O activity resumes. The options are Disable and Enable.
86
Chapter 4: BIOS
*If the item "Congure SATA as" above is set to RAID, the following items will display:
SATA RSTe Boot Info
Select Enable to provide full int13h support for the devices attached to SATA controller. The options are Disable and Enable.
SATA RAID Option ROM/UEFI Driver
Select UEFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for system boot. The options are Disable, EFI, and Legacy.
SATA Port 0 ~ Port 7
This item displays the information detected on the installed SATA drive on the particular SATA port.
Model number of drive and capacity
Software Preserve Support
Port 0 ~ Port 7 Hot Plug
Set this item to Enable for hot plug support, which will allow the user to replace a SATA drive without shutting down the system. The options are Disable and Enable.
Port 0 ~ Port 7 Spin Up Device
On an edge detect from 0 to 1, set this item to allow the PCH to initialize the device. The options are Disable and Enable.
Port 0 ~ Port 7 SATA Device Type
Use this item to specify if the SATA port specied by the user should be connected to a Solid
State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State Drive.
PCH sSATA Conguration
When this submenu is selected, the AMI BIOS automatically detects the presence of the SATA devices that are supported by the Intel PCH chip and displays the following items:
sSATA Controller
This item enables or disables the onboard sSATA controller supported by the Intel PCH chip. The options are Enable and Disable.
Congure sSATA as
Select AHCI to congure an sSATA drive specied by the user as an AHCI drive. Select RAID to congure an sSATA drive specied by the user as a RAID drive. The options are AHCI
and RAID.
87
Super X11SPL-F User's Manual
SATA HDD Unlock
This feature allows the user to remove any password-protected SATA disk drives. The options are Disable and Enable.
Aggressive Link Power Management
When this item is set to Enable, the SATA AHCI controller manages the power usage of the SATA link. The controller will put the link in a low power mode during extended periods of I/O inactivity, and will return the link to an active state when I/O activity resumes. The options are Disable and Enable.
*If the item "Congure sSATA as" above is set to RAID, the following items will display:
sSATA RSTe Boot Info
Select Enable to provide full int13h support for the devices attached to sSATA controller. The
options are Disable and Enable.
sSATA RAID Option ROM/UEFI Driver
Select UEFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for system boot. The options are Disable, EFI, and Legacy.
sSATA Port 2
This item displays the information detected on the installed sSATA drive on the particular sSATA port.
Model number of drive and capacity
Software Preserve Support
Hot Plug
Set this item to Enable for hot plug support, which will allow the user to replace a SATA drive without shutting down the system. The options are Disable and Enable.
Spin Up Device
On an edge detect from 0 to 1, set this item to allow the PCH to initialize the device. The options are Disable and Enable.
sSATA Device Type
Use this item to specify if the SATA port specied by the user should be connected to a Solid
State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State Drive.
88
Chapter 4: BIOS
PCIe/PCI/PnP Conguration
The following information will display:
PCI Bus Driver Version
PCI Devices Common Settings:
Above 4G Decoding (Available if the system supports 64-bit PCI decoding)
Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address. The options are Disabled and Enabled.
SR-IOV Support
Use this feature to enable or disable Single Root IO Virtualization Support. The options are
Disabled and Enabled.
MMIO High Base
Use this item to select the base memory size according to memory-address mapping for the IO hub. The options are 56T, 40T, 24T, 16T, 4T, and 1T.
MMIO High Granularity Size
Use this item to select the high memory size according to memory-address mapping for the IO hub. The options are 1G, 4G, 16G, 64G, 256G, and 1024G.
PCI PERR/SERR Support
Select Enabled to allow a PCI device to generate a PERR/SERR number for a PCI Bus Signal Error Event. The options are Disabled and Enabled.
Maximum Read Request
Use this item to select the Maximum Read Request size of the PCI-Express device, or select Auto to allow the System BIOS to determine the value. The options are Auto, 128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.
MMCFG Base
Use this item to select the low base address for PCIE adapters to increase base memory. The options are 1G, 1.5G, 1.75G, 2G, 2.25G. and 3G.
NVMe Firmware Source
Use this item to select the NVMe rmware to support booting. The options are Vendor De-
ned Firmware and AMI Native Support. The default option, Vendor Dened Firmware, is
pre-installed on the drive and may resolve errata or enable innovative functions for the drive. The other option, AMI Native Support, is offered by the BIOS with a generic method.
89
Super X11SPL-F User's Manual
VGA Priority
Use this feature to select VGA priority when multiple VGA devices are detected. Select On­board to give priority to your onboard video device. Select Offboard to give priority to your graphics card. The options are Onboard and Offboard.
PCH SLOT1 PCI-E 3.0 X4 (IN X8) OPROM
Use this feature to select which rmware type to be loaded for the add-on card in this slot.
The options are Disabled, Legacy, and EFI.
CPU SLOT2 PCI-E 3.0 X8 OPROM
Use this feature to select which rmware type to be loaded for the add-on card in this slot.
The options are Disabled, Legacy, and EFI.
CPU SLOT3 PCI-E 3.0 X8 OPROM
Use this feature to select which rmware type to be loaded for the add-on card in this slot.
The options are Disabled, Legacy, and EFI.
CPU SLOT4 PCI-E 3.0 X8 (IN X16) OPROM
Use this feature to select which rmware type to be loaded for the add-on card in this slot.
The options are Disabled, Legacy, and EFI.
CPU SLOT5 PCI-E 3.0 X8 OPROM
Use this feature to select which rmware type to be loaded for the add-on card in this slot.
The options are Disabled, Legacy, and EFI.
CPU SLOT6 PCI-E 3.0 X8 (IN X16) OPROM
Use this feature to select which rmware type to be loaded for the add-on card in this slot.
The options are Disabled, Legacy, and EFI.
CPU SLOT7 PCI-E 3.0 X8 OPROM
Use this feature to select which rmware type to be loaded for the add-on card in this slot.
The options are Disabled, Legacy, and EFI.
M.2 PCI-E 3.0 X4 OPROM
Use this feature to select which rmware type to be loaded for the add-on card in this slot.
The options are Disabled, Legacy, and EFI.
Onboard LAN Option ROM Type
Use to feature to enable Option ROM support to boot the computer using a network device specied by the user. The options are Legacy and EFI.
90
Chapter 4: BIOS
Onboard LAN1 Option ROM
Use this feature to select which rmware function to be loaded for LAN Port1 used for system
boot. The options are Disabled, PXE, and iSCSI.
Onboard LAN2 Option ROM
Use this feature to select which rmware function to be loaded for LAN Port2 used for system
boot. The options are Disabled and PXE.
Onboard Video Option ROM
Use this item to select the Onboard Video Option ROM type. The options are Disabled, Legacy, and EFI.
Network Stack Conguration
Network Stack
Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Unied Extensible
Firmware Interface) for network stack support. The options are Enabled and Disabled.
Ipv4 PXE Support
Select Enabled to enable IPv4 PXE boot support. The options are Disabled and Enabled.
Ipv4 HTTP Support
Select Enabled to enable IPv4 HTTP boot support. The options are Disabled and Enabled.
Ipv6 PXE Support
Select Enabled to enable IPv6 PXE boot support. The options are Disabled and Enabled.
Ipv6 HTTP Support
Select Enabled to enable IPv6 HTTP boot support. The options are Disabled and Enabled.
PXE Boot Wait Time
Use this option to specify the wait time to press the ESC key to abort the PXE boot. Press "+" or "-" on your keyboard to change the value. The default setting is 0.
Media Detect Count
Use this option to specify the number of times media will be checked. Press "+" or "-" on your keyboard to change the value. The default setting is 1.
Super IO Conguration
The following Super IO information will display:
Super IO Chip AST2500
91
Super X11SPL-F User's Manual
Serial Port 1 Conguration
This submenu allows the user to congure the settings of Serial Port 1.
Serial Port 1
Select Enabled to enable the selected onboard serial port. The options are Disabled and
Enabled.
Device Settings
This item displays the status of a serial part specied by the user.
Change Settings
This feature species the base I/O port address and the Interrupt Request address of a serial port specied by the user. Select Auto to allow the BIOS to automatically assign the
base I/O and IRQ address.
The options for Serial Port 1 are Auto, (IO=3F8h; IRQ=4;), (IO=3F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;), (IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;).
Serial Port 2 Conguration
This submenu allows the user to congure the settings of Serial Port 2.
Serial Port 2
Select Enabled to enable the selected onboard serial port. The options are Disabled and
Enabled.
Device Settings
This item displays the status of a serial part specied by the user.
Change Settings
This feature species the base I/O port address and the Interrupt Request address of a serial port specied by the user. Select Auto to allow the BIOS to automatically assign the
base I/O and IRQ address.
The options for Serial Port 2 are Auto, (IO=2F8h; IRQ=3;), (IO=3F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;), (IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;).
Serial Port 2 Attribute (Available for Serial Port 2 only)
Select SOL to use COM Port 2 as a Serial Over LAN (SOL) port for console redirection. The options are SOL and COM.
92
Chapter 4: BIOS
Serial Port Console Redirection
COM1 Console Redirection
Select Enabled to enable console redirection support for a serial port specied by the user.
The options are Enabled and Disabled.
*If the item above is set to Enabled, the following items will become available for
conguration:
COM1 Console Redirection Settings
Use this feature to specify how the host computer will exchange data with the client computer, which is the remote computer used by the user.
COM1 Terminal Type
This feature allows the user to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are VT100, VT100+, VT-UTF8, and ANSI.
COM1 Bits Per Second
Use this feature to set the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 38400, 57600 and 115200 (bits per second).
COM1 Data Bits
Use this feature to set the data transmission size for Console Redirection. The options are 7 Bits and 8 Bits.
COM1 Parity
A parity bit can be sent along with regular data bits to detect data transmission errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you do not want to send a parity bit with your data bits in transmission. Select Mark to add a mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a parity bit to be sent with your data bits. The options are None, Even, Odd, Mark, and Space.
COM1 Stop Bits
A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.
93
Super X11SPL-F User's Manual
COM1 Flow Control
Use this feature to set the ow control for Console Redirection to prevent data loss caused by buffer overow. Send a "Stop" signal to stop sending data when the receiving buffer
is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The options are None and Hardware RTS/CTS.
COM1 VT-UTF8 Combo Key Support
Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals. The options are Disabled and Enabled.
COM1 Recorder Mode
Select Enabled to capture the data displayed on a terminal and send it as text messages to a remote server. The options are Disabled and Enabled.
COM1 Resolution 100x31
Select Enabled for extended-terminal resolution support. The options are Disabled and
Enabled.
COM1 Legacy OS Redirection Resolution
Use this feature to select the number of rows and columns used in Console Redirection for legacy OS support. The options are 80x24 and 80x25.
COM1 Putty KeyPad
This feature selects the settings for Function Keys and KeyPad used for Putty, which is a terminal emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SC0, ESCN, and VT400.
COM1 Redirection After BIOS POST
Use this feature to enable or disable legacy console redirection after BIOS POST. When set to Bootloader, legacy console redirection is disabled before booting the OS. When set to Always Enable, legacy console redirection remains enabled when booting the OS. The options are Always Enable and Bootloader.
SOL/COM2 Console Redirection
Select Enabled to use the SOL port for Console Redirection. The options are Disabled and Enabled.
*If the item above is set to Enabled, the following items will become available for
conguration:
94
Chapter 4: BIOS
SOL/COM2 Console Redirection Settings
Use this feature to specify how the host computer will exchange data with the client computer, which is the remote computer used by the user.
COM2 Terminal Type
Use this feature to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8.
COM2 Bits Per Second
Use this feature to set the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 38400, 57600 and 115200 (bits per second).
COM2 Data Bits
Use this feature to set the data transmission size for Console Redirection. The options are 7 Bits and 8 Bits.
COM2 Parity
A parity bit can be sent along with regular data bits to detect data transmission errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you do not want to send a parity bit with your data bits in transmission. Select Mark to add a mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.
COM2 Stop Bits
A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.
COM2 Flow Control
Use this feature to set the ow control for Console Redirection to prevent data loss caused by buffer overow. Send a "Stop" signal to stop sending data when the receiving buffer
is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The options are None and Hardware RTS/CTS.
COM2 VT-UTF8 Combo Key Support
Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals. The options are Disabled and Enabled.
95
Super X11SPL-F User's Manual
COM2 Recorder Mode
Select Enabled to capture the data displayed on a terminal and send it as text messages to a remote server. The options are Disabled and Enabled.
COM2 Resolution 100x31
Select Enabled for extended-terminal resolution support. The options are Disabled and
Enabled.
COM2 Legacy OS Redirection Resolution
Use this feature to select the number of rows and columns used in Console Redirection for legacy OS support. The options are 80x24 and 80x25.
COM2 Putty KeyPad
This feature selects Function Keys and KeyPad settings for Putty, which is a terminal emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO, ESCN, and VT400.
COM2 Redirection After BIOS POST
Use this feature to enable or disable legacy Console Redirection after BIOS POST. When set to Bootloader, legacy Console Redirection is disabled before booting the OS. When set to Always Enable, legacy Console Redirection remains enabled when booting the OS. The options are Always Enable and Bootloader.
Legacy Console Redirection
Legacy Serial Redirection Port
Use this feature to select a COM port to display redirection of Legacy OS and Legacy OPROM messages. The options are COM1 and SOL/COM2.
EMS (Emergency Management Services) Console Redirection
Select Enabled to use a COM port selected by the user for EMS Console Redirection. The options are Enabled and Disabled.
*If the item above is set to Enabled, the following items will become available for
conguration:
EMS Console Redirection Settings
This feature allows the user to specify how the host computer will exchange data with the client computer, which is the remote computer used by the user.
96
Chapter 4: BIOS
Out-of-Band Mgmt Port
The feature selects a serial port in a client server to be used by the Microsoft Windows Emergency Management Services (EMS) to communicate with a remote host server. The options are COM1 and SOL/COM2.
Terminal Type
Use this feature to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII character set. Select VT100+ to add color and function key support. Select ANSI to use the extended ASCII character set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are VT100, VT100+, VT-UTF8, and ANSI.
Bits Per Second
This item sets the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 57600, and 115200 (bits per second).
Flow Control
Use this item to set the ow control for Console Redirection to prevent data loss caused by buffer overow. Send a "Stop" signal to stop sending data when the receiving buffer
is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The options are None, Hardware RTS/CTS, and Software Xon/Xoff.
Data Bits, Parity, Stop Bits
ACPI Settings
WHEA Support
Select Enabled to support the Windows Hardware Error Architecture (WHEA) platform and provide a common infrastructure for the system to handle hardware errors within the Windows OS environment to reduce system crashes and to enhance system recovery and health monitoring. The options are Disabled and Enabled.
High Precision Event Timer
Select Enabled to activate the High Precision Event Timer (HPET) that produces periodic interrupts at a much higher frequency than a Real-time Clock (RTC) does in synchronizing multimedia streams, providing smooth playback and reducing the dependency on other timestamp calculation devices, such as an x86 RDTSC Instruction embedded in the CPU. The High Performance Event Timer is used to replace the 8254 Programmable Interval Timer. The options are Disabled and Enabled.
97
Super X11SPL-F User's Manual
Trusted Computing
The X11SPL-F supports TPM 1.2 and 2.0. The following Trusted Platform Module (TPM) information will display if a TPM 2.0 module is detected:
Vendor Name
Firmware Version
Security Device Support
If this feature and the TPM jumper on the motherboard are both set to Enabled, onboard
security devices will be enabled for TPM (Trusted Platform Module) support to enhance data integrity and network security. Please reboot the system for a change on this setting to take effect. The options are Disable and Enable.
Active PCR Bank
SHA256 PCR Bank
*If the item above is set to Enable, "SHA-1 PCR Bank" and "SHA256 PCR Bank" will
become available for conguration:
SHA-1 PCR Bank
Use this item to disable or enable the SHA-1 Platform Conguration Register (PCR) bank for
the installed TPM device. The options are Disabled and Enabled.
SHA256 PCR Bank
Use this item to disable or enable the SHA256 Platform Conguration Register (PCR) bank
for the installed TPM device. The options are Disabled and Enabled.
Pending Operation
Use this item to schedule a TPM-related operation to be performed by a security device for system data integrity. Your system will reboot to carry out a pending TPM operation. The options are None and TPM Clear.
Platform Hierarchy
Use this item to disable or enable platform hierarchy for platform protection. The options are Disabled and Enabled.
Storage Hierarchy
Use this item to disable or enable storage hieararchy for cryptographic protection. The options are Disabled and Enabled.
98
Chapter 4: BIOS
Endorsement Hierarchy
Use this item to disable or enable endorsement hierarchy for privacy control. The options are Disabled and Enabled.
PH Randomization
Use this item to disable or enable Platform Hiearchy (PH) Randomization. The options are
Disabled and Enabled.
TXT Support
Intel Trusted Execution Technology (TXT) helps protect against software-based attacks and
ensures protection, condentiality, and integrity of data stored or created on the system. Use
this feature to enable or disable TXT Suppport. The options are Disable and Enable.
iSCSI Conguration
iSCSI Initiator Name
This feature allows the user to enter the unique name of the iSCSI Initiator in IQN format.
Once the name of the iSCSI Initiator is entered into the system, congure the proper settings
for the following items.
Add an Attempt
Delete Attempts
Change Attempt Order
Intel(R) Virtual RAID on CPU
Intel(R) VROC with VMD Technology 5.1.0.1007
RAID volumes and Intel VMD Controllers information will be displayed if they are detected by the system.
99
Super X11SPL-F User's Manual
4.4 Event Logs
Use this feature to congure Event Log settings.
Change SMBIOS Event Log Settings
Enabling/Disabling Options
SMBIOS Event Log
Change this item to enable or disable all features of the SMBIOS Event Logging during system boot. The options are Enabled and Disabled.
Erasing Settings
Erase Event Log
If No is selected, data stored in the event log will not be erased. Select Yes, Next Reset, data in the event log will be erased upon next system reboot. Select Yes, Every Reset, data in the event log will be erased upon every system reboot. The options are No, Yes, Next reset, and Yes, Every reset.
When Log is Full
Select Erase Immediately for all messages to be automatically erased from the event log when the event log memory is full. The options are Do Nothing and Erase Immediately.
100
Loading...