SUMMIT
MICROELECTRONICS, Inc. |
SMS1242 |
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2.5V, 3V, 3.3V & 5V Dual Voltage, Dual Reset
Microprocessor Supervisory Circuits
FEATURES
•Supply voltage monitor
-Nominal VRST of 2.45V, 2.65V, 2.95V, 4.45V, 4.55V or 4.65V
-RESET# Outputs Guaranteed true at VCC = 1V
-150ms Reset Delay Time
•Second voltage monitor
-VSENSE Input
-1.25V threshold ±1%
•Manual Reset Input
•Includes 16k-bits nonvolatile memory
-Industry standard 2-wire serial interface
OVERVIEW
The SMS1242 microprocessor supervisory circuit reduces the complexity and number of components required to monitor the supply voltage in +5V, +3V and +2.5V systems. The SMS1242 will significantly improve system reliability and accuracy when compared to implementing the same functions with discrete components.
The SMS1242 provides reset output during power-up, power-down, and brown-out conditions. It has a 1.25V threshold input detector for power-fail warning, low battery detection, or monitoring a secondary power supply. The part also integrates a separate active low manual reset input.
It also has 16k-bits of nonvolatile memory accessible over an industry standard 2-wire serial interface.
FUNCTIONAL BLOCK DIAGRAM
SCL 6
SDA 5
VSENSE 3
VCC |
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8 |
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NONVOLATILE |
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MEMORY |
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ARRAY |
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+ |
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– |
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7 |
MR# |
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2 |
RESET1# |
+ |
VTRIP |
RESET |
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– |
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GENERATOR |
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1 |
RESET2# |
1.25V |
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4 |
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GND |
2038 BD 2.0 |
© SUMMIT MICROELECTRONICS, Inc. 2000 • |
300 Orchard City Drive, Suite 131 • Campbell, CA 95008 • Phone 408-3 78-6461 |
• Fax 408-378-6586 • www.summitmicro.com |
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2038 2.0 6/8/00 |
Characteristics subject to change without notice |
1 |
SMS1242
ABSOLUTE MAXIMUM RATINGS*
Temperature Under Bias |
–55°C to 125°C |
Storage Temperature |
–65°C to 150°C |
Terminal Voltage (With Respect to Ground)–0.3V to 6V |
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Lead Solder Temperature (10 secs) |
300°C |
*COMMENT
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside those listed in the operation sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
Symbol |
Parameter |
Conditions |
Min. |
Typ. |
Max. |
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VCC |
Operating supply voltage |
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1 |
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5.5 |
V |
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3.6V < VCC < 5.5V |
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25 |
50 |
µA |
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Supply current |
3.6V > VCC |
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25 |
50 |
µA |
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Memory access (SMS1243 only) |
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3 |
mA |
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Device option |
A |
4.375 |
4.425 |
4.475 |
V |
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Device option |
B |
4.625 |
4.675 |
4.725 |
V |
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VRST |
Reset threshold |
Device option |
C |
4.425 |
4.475 |
4.525 |
V |
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Device option |
D |
2.425 |
2.450 |
2.475 |
V |
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Device option |
E |
2.625 |
2.650 |
2.675 |
V |
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Device option |
F |
2.925 |
2.950 |
2.975 |
V |
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VHYST |
VRST Hysterisis |
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50 |
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mV |
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tRST |
Reset pulse width |
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100 |
150 |
200 |
ms |
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VOL |
RESET1# output low voltage |
ISINK = 1.2mA, |
VCC = VRST min. |
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0.3 |
V |
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ISINK = 200µA, |
VCC = 1.2V |
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0.3 |
V |
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IMR |
MR# pullup current |
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100 |
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µA |
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tMR |
MR# pulse width |
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50 |
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VIL |
MR# input threshold |
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0.6 |
V |
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VIH |
MR# input threshold |
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0.7 × VCC |
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V |
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VSNS |
VSENSE input threshold |
VCC = VRST min., VSENSE falling |
1.20 |
1.25 |
1.30 |
V |
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VCC |
RESET2# output low voltage |
ISINK = 1.2mA, |
VCC = VRST min. |
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0.3 |
V |
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ISINK = 200µA, |
VCC = 1.2V |
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0.4 |
V |
2038 Elect Table 2.0
SUMMIT MICROELECTRONICS, Inc. |
2038 2.0 6/8/00 |
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SMS1242 |
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PIN NAMES |
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PIN CONFIGURATION |
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8-Pin SOIC |
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Pin |
Signal |
Function |
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Active low output with weak pullup. |
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Driven low by: VSENSE below thresh- |
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RESET1# |
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1 |
8 |
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VCC |
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1 |
RESET1# |
old; or V below threshold while |
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MR# is below threshold. Remains |
RESET2# |
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2 |
7 |
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MR# |
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CC |
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low for 150ms after VSENSE, or VCC |
VSENSE |
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3 |
6 |
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SCL |
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and MR#, is above threshold. |
GND |
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4 |
5 |
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SDA |
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2 |
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RESET2# |
Same as Reset1#, except open |
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drain connection |
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2038 T PCon 2.0 |
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3 |
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VSENSE |
Threshold detector input for the |
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Resets |
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GND |
Ground |
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5 |
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SDA/GND |
SMS1243 Data I/O, or ground |
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6 |
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SCL/GND |
SMS1243 Data Clock, or ground |
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7 |
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MR# |
Manual input for Resets |
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8 |
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VCC |
Supply voltage |
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2038 Pin Table 2.0
VCC |
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VRST |
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VRST |
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tRST
RESET#
MR# |
VIL |
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VIH |
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tRST |
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tRST |
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tMR |
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VSENSE |
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VSNS |
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2038 T Fig01 2.0
Figure 1. Reset Waveforms
2038 2.0 6/8/00 |
SUMMIT MICROELECTRONICS, Inc. |
3
SMS1242
GLITCH AMPLITUDE (V)
4.5
4.4
4.3
4.2
4.1
4.0
3.9
3.8
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6 |
7 |
8 |
9 |
10 |
PULSE WIDTH (ms)
2038 Fig02 2.0
Figure 2. Supply Voltage Noise Rejection, VRST =4.55V, TA = 25ºC
VRST |
V |
CC |
0V |
RESET# |
0V |
500ms/Div. |
2V |
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1.25V |
V |
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0V |
SENSE |
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VCC |
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0V |
RESET# |
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Figure 3. RESET Output vs. Supply |
Figure 4. RESET Output vs. VSENSE |
SUMMIT MICROELECTRONICS, Inc. |
2038 2.0 6/8/00 |
4