STMicroelectronics M41T94 User Guide

512 Bit (64 bit x8) Serial RTC (SPI) SRAM

FEATURES SUMMARY

■ 2.7 TO 5.5V OPERATING VOLTAGE

■ SERIAL PERIPHERAL INTERFACE (SPI)

■ 2.5 TO 5.5V OSCILLATOR OPERATING

VOLTAGE

■ AUTOMATIC SWITCH-OVER AND

DESELECT CIRCUITRY

■ CHOICE OF POWER-FAIL DESELECT

VOLTAGES (V –THS = V –THS = V

■ COUNTERS FOR TENTHS/HUNDREDTHS

OF SECONDS, SECONDS, MINUTES, HOURS, DAY, DATE, MONTH, YEAR, AND CENTURY

■ 44 BYTES OF GENERAL PURPOSE RAM

■ PROGRAMMABLE ALARM AND

INTERRUPT FUNCTION (VALID EVEN DURING BATTERY BACK-UP MODE)

■ WATCHDOG TIMER

■ MICROPROCESSOR POWER-ON RESET

■ BATTERY LOW FLAG

■ POWER-DOWN TIME-STAMP (HT Bit)

■ LOW OPERATING CURRENT OF 2.0mA

■ ULTRA-LOW BATTERY SUPPLY CURRENT

OF 500nA (MAX)

■ PACKAGING INCLUDES A 28-LEAD SOIC

AND SNAPHAT separately) or 16-LEAD SOIC

■ 28-LEAD SOIC PACKAGE PROVIDES

DIRECT CONNECTION FOR A SNAPHAT TOP WHICH CONTAINS THE BATTERY AND CRYSTAL

= 2.7 to 5.5V):

; 2.55V ≤ V

; 4.20V ≤ V

TOP (to be ordered

PFD

≤ 2.70V

≤ 4.50V

M41T94

Figure 1. 16-pin SOIC Package

SO16 (MQ)

Figure 2. 28-pin SOIC Package

SNAPHAT (SH)

Battery & Crystal

SOH28 (MH)

1/32June 2004

M41T94

TABLE OF CONTENTS

FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 1. 16-pin SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 2. 28-pin SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

SUMMARY DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Figure 3. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 4. 16-pin SOIC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 5. 28-pin SOIC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 6. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 7. Hardware Hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 2. Function Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 8. Data and Clock Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Signal Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Serial Data Output (SDO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Serial Data Input (SDI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Serial Clock (SCL). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Chip Enable (E

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

SPI Bus Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 9. Input Timing Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 10.Output Timing Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9

Table 3. AC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

READ and WRITE Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Data Retention Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 11.READ Mode Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 12.WRITE Mode Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

CLOCK OPERATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Power-down Time-Stamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

TIMEKEEPER® Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 4. TIMEKEEPER® Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Setting Alarm Clock Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 5. Alarm Repeat Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 13.Alarm Interrupt Reset Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 14.Back-up Mode Alarm Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Square Wave Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 6. Square Wave Output Frequency. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Power-on Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Reset Inputs (RSTIN1 & RSTIN2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 15.RSTIN1

and RSTIN2 Timing Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

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M41T94

Table 7. Reset AC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18

Calibrating the Clock. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 16.Crystal Accuracy Across Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 17.Calibration Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Century Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Output Driver Pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Battery Low Warning. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

REC

Initial Power-on Defaults. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Table 8. t

Table 9. Default Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Table 10. Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Table 11. DC and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 18.AC Testing Input/Output Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Table 12. Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Table 13. DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Table 14. Crystal Electrical Characteristics (Externally Supplied). . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 19.Power Down/Up Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Table 15. Power Down/Up AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

REC

PACKAGE MECHANICAL INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 20.SO16 – 16-lead Plastic Small Outline Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 16. SO16 – 16-lead Plastic Small Outline Package Mechanical Data. . . . . . . . . . . . . . . . . . 26

Figure 21.SOH28 – 28-lead Plastic Small Outline, Battery SNAPHAT, Package Outline. . . . . . . . 27

Table 17. SOH28 – 28-lead Plastic Small Outline, battery SNAPHAT, Package Mechanical Data 27

Figure 22.SH – 4-pin SNAPHAT Housing for 48mAh Battery & Crystal, Package Outline . . . . . . . 28

Table 18. SH – 4-pin SNAPHAT Housing for 48mAh Battery & Crystal, Package Mechanical Data28

Figure 23.SH – 4-pin SNAPHAT Housing for 120mAh Battery & Crystal, Package Outline . . . . . . 29

Table 19. SH – 4-pin SNAPHAT Housing for 120mAh Battery & Crystal, Package Mech. Data. . . 29

PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Table 20. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Table 21. SNAPHAT Battery Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 22. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

3/32

M41T94

SUMMARY DESCRIPTION

The M41T94 Serial TIMEKEEPER® SRAM is a low power, 512-bit stat ic CMO S SR AM or ganized as 64 words by 8 bits. A built-i n 32,768H z osc illator (external crys tal con trolled) a nd 8 byte s of the SRAM (see Table 4., page 14) are used for the clock/calendar function and are configured in binary coded decimal (BCD) format.

An additional 12 bytes of RAM provide status/control of Alarm, Watchdog and Square Wave functions. Addresses and data are transfer red seria lly via a serial SPI interface. The built-in address register is incremented automatically after each WRITE or READ data byte. The M41T94 has a built-in power sense circuit which detects power failures and automatica lly switches to the battery supply when a power fai lure occurs. The energy needed to sustain the SRAM and clock operations can be supplied by a small lithium button-cell supply when a power failure occurs. Function s available to the user include a non-volatile, time-of-day clock/calendar, Alar m inte rrupts , Watch dog Time r and programmable Square Wave output. Other features include a Power-On Reset as well as two additional debounced inputs (RSTIN1 RSTIN2 (RST the century, year, month, date , day, hou r, minute, second and tenths/hundre dths of a second in 24 hour BCD format. Corrections for 28, 29 (leap year

- valid until year 2100), 30 and 31 day months are

) which can also generate an output Reset

). The eight c lock address locati ons contain

and

made automatically. The ninth clock address location controls user ac cess to the cl ock information and also stores the clock softwar e calibr ation setting.

The M41T94 is supplied in either a 16-lead plastic SOIC (requiring user suppl ied crys tal and ba tter y) or a 28-lead SOIC SNAPHAT tegrates both crystal and battery in a single SNAPHAT top). The 28-pin, 330mil SOIC provides sockets with gold pl ate d co ntac ts a t b oth en ds fo r direct connection to a separ ate SNAPHAT housing containing the battery and crystal. The unique design allows the SNAPHAT bat tery/ crysta l package to be mounted on top of the SOIC package after the completion of the surface mount process.

Insertion of the SNAPHAT housing after reflow prevents potential battery and crystal damage due to the high temperature s required for device s urface-mounting. The SNAPHAT housing is also keyed to prevent reverse insertion.

The SOIC and battery/crystal packages are shipped separately in plastic anti-static tubes or in Tape & Reel form. For the 28-lead SOIC, the battery/crystal package (e .g., SNAPHAT) part number is “M4TXX-BR12SH” (see Table

21., page 30).

Caution: Do not place the SNAPHAT battery/crystal top in conductive foam, as this will drain the lithium button-cell battery.

package (which in-

4/32

M41T94

Figure 3. Logic Diagram

(1)

SCL

SDI

E RSTIN1 RSTIN2

WDI THS

M41T94

BAT

(1)

RST IRQ/FT/OUT SQW SDO

AI03683

Table 1. Signal Names

E Chip Enable

/FT/OUT

IRQ

RST RSTIN1 RSTIN2 SCL Serial Clock Input SDI Serial Data Input SDO Serial Data Output SQW Square Wave Output THS Threshold Select Pin WDI Watchdog Input

(1)

BAT

Interrupt/Frequency Test/Out Output (Open Drain)

Reset Output (Open Drain) Reset 1 Input Reset 2 Input

Oscillator Input

Oscillator Output

Battery Supply Voltage

Note: 1. For SO16 package only.

Figure 4. 16-pin SOIC Connections

XI V

XO RST WDI

RSTIN1 RSTIN2

BAT V

2 3 4 5 6 7 8

M41T94

16 15 14 13 12 11 10

AI03684

E IRQ/FT/OUT THS SDI SQW SCL SDO

Note: 1. For SO16 package only.

Supply Voltage Ground

Figure 5. 28-pin SOIC Connections

SQW V

NC NC NC NC NC NC

WDI RSTIN1 RSTIN2

1 2 3 4 5 6 7 8 9 10 11

M41T94

13 14

28 27 26 25 24 23 22 21 20 19 18 17 16 15

AI03685

E IRQ/FT/OUT NC NC THS NC NC SCL NC RST SDINC SDO NC

5/32

M41T94

Figure 6. Block Diagram

Crystal

RSTIN1 RSTIN2

SDO

SDI

SCL

WDI

SPI

INTERFACE

32KHz

OSCILLATOR

BAT

VBL= 2.5V

PFD

= 2.5V

= 4.4V

COMPARE

(2.65V if THS = VSS)

REAL TIME CLOCK

CALENDAR

44 BYTES

USER RAM

RTC w/ALARM

& CALIBRATION

WATCHDOG

SQUARE W AVE

POR

WDF

IRQ/FT/OUT

SQW

(1)

RST

AI04785

(1)

Note: 1. Open drain output

Figure 7. Hardware Hookup

SPI Interface with (CPOL, CPHA) ('0','0') or ('1','1')

Master

(ST6, ST7, ST9,

ST10, Others)

CS3

Note: 1. CPOL (Clock Polarity) and CPHA (Clock Phase) are bits that may be set in the SPI Control Register of the MCU.

CS2

(1)

CS1

D Q C

CQD

M41T94

CQD

XXXXX

E E

CQD

XXXXX

AI03686

6/32

Table 2. Function Table

Mode E SCL SDI SDO

Disable Reset H Input Disabled Input Disabled High Z

M41T94

WRITE L Data Bit latch High Z

READ L X

Note: 1. SDO remains at High Z until eight bits of data are ready to be shifted out during a READ.

AI04630

AI04631

Figure 8. Data and Clock Timing

CPOL

CPHA

SDI

SDO

MSB

Next data bit shift

LSB

AI04632

(1)

Signal Description Serial Data Output (SDO). The output pin is

used to transfer data serially out of the Memory. Data is shifted out on the falling edge of the serial clock.

Serial Data Input (SDI). The input pin is used to transfer data serially into the de vice. Instruction s, addresses, and the data to be written, are each received this way. Input is latched on the rising edge of the serial clock.

Serial Clock (SCL). The serial clock provides the timing for the serial inter face (as shown in Figure

9., page 9 and Figure 10., page 9). The W/R Bit,

addresses, or data are latched, from the input pin, on the rising edge of the clock input. The out put data on the SDO pin changes state after the falling edge of the clock input.

The M41T94 can be driven by a microcontroller with its SPI peripheral runnin g in either of the two following modes:

(CPOL, CPHA) = ('0', '0') or (CPOL, CPHA) = ('1', '1').

For these two modes, input data (SDI) is latched in by the low-to-high transition of clock SCL, and output data (SDO) is shifted out on the high-to-low transitio n of SC L (se e T abl e 2. , page 7 and Figure

8., page 7).

Chip Enable (E

). When E is high, the memory

device is deselect ed, and the SDO output pin is held in its high impedance state.

After power-on, a high-to-low transition on E

is re-

quired prior to the start of any operation.

7/32

M41T94

OPERATION

The M41T94 clock operates as a slave devic e on the SPI serial bu s. Each memory d evice is accessed by a simple serial interface that is SPI bus compatible. The bus signals ar e SCL, SDI and SDO (see Table 1., page 5 and Figure 7., page 6). The device is selected when the Chip Enable input (E is held low. All instructions, addresses and data are shifted serially in and out of the chip. The most significant bit is presented first, with the data input (SDI) sampled on the fir st r i si ng edg e o f t he cl oc k (SCL) after the Chip Enable (E bytes contained in the device can then be accessed sequentially in the following order:

1. Tenths/Hundredths of a Second Registe r

2. Seconds Register

3. Minutes Register

4. Century/Hours Register

5. Day Register

6. Date Register

7. Month Register

8. Year Register

9. Control Register

10. Watchdog Register 11 - 16.Alarm Registers 17 - 19.Reserved

20. Square Wave Register 21 - 64.User RAM The M41T94 clock continually monitors V

out-of tolerance condition. Should V

, the device t erminat es an ac cess in pr ogress

PFD

and resets the device add ress counter. Inputs to the device will not be recognized at this time to prevent erroneous data from be ing written to the device from a an out-of-tol erance system. When V

falls below VSO, the device automatically

switches over to the battery and powers down into an ultra low current mode of operation to conserve battery life. As system power ret ur ns and V es above V

, the battery is disconnected, and the

power supply is switched to external V

) goes low. The 64

for an

fall below

ris-

Write protection continues until V V

(min) plus t

PFD

(min). Fo r more inform ation

REC

on Battery Storage Life r efer to Application Note AN1012.

SPI Bus Characteristics

)

The Serial Peripheral interface (SPI) bus is intended for synchronous communication between different ICs. It consists of four signal lines: Serial Data Input (SDI), Serial Data Output (SDO), Serial Clock (SCL) and a Chip Enable (E

By definition a dev ic e tha t gi v es out a message is called “transmitter,” the receiving device th at gets the message is call ed “receiver.” The de vice that controls the messag e is called “master. ” The devices that are controlled by the master are called “slaves.”

The E

input is used to initiate and terminate a data transfer. The SCL input is used to synchronize data transfer between the maste r (micro) and the slave (M41T94) devices.

The SCL input, which is gen erated by the microcontroller, is ac tive only during address and data transfer to any de vice on the S PI bu s ( see Figure

7., page 6).

The M41T94 can be driven by a microcontroller with its SPI peripheral runnin g in either of the two following modes:

(CPOL, CPHA) = ('0', '0') or (CPOL, CPHA) = ('1', '1').

8., page 7).

There is one clock for each bit transferred. Address and data bits are transferred in groups of eight bits. Due to memory si ze the second most significant address bit is a Don’t Care (address bit

6).

reaches

8/32

Figure 9. Input Timing Requirements

tELCH

SCL

tDVCH

tCHDX

tCHEH

tCLCH

M41T94

tEHEL

tEHCH

tCHCL

SDI

SDO

MSB IN

HIGH IMPEDANCE

Figure 10. Output Timing Requirements

SCL

tCLQV

tCLQX

SDO

ADDR. LSB IN

SDI

MSB OUT

tDLDH tDHDL

tCH

LSB IN

tCL

tQLQH tQHQL

AI04633

tEHQZ

LSB OUT

AI04634

9/32

M41T94

Table 3. AC Characteristics

Symbol

SCL

(2)

(3)

CHCL

CHDX

CHEH

(2)

(3)

CLCH

CLQV

CLQX

(3)

DHDL

(3)

DLDH

DVCH

EHCH

EHEL

(3)

EHQZ

ELCH

(3)

QHQL

(3)

QLQH

Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 2.7 to 5.5V (except where not ed).

2. t

3. Value guaranteed by design, not 100% tested in production.

Serial Clock Input Frequency DC 2 MHz Clock High 200 ns

Clock Transition (Fall Time) 1 µs Serial Clock Input High to Input Data Transition 50 ns

Serial Clock Input High to Chip Enable High 200 ns Clock Low 200 ns

Clock Transition (Rise Time) 1 µs Serial Clock Input Low to Ou tpu t Valid 150 ns

Serial Clock Input Low to Output Data Transition 0 ns Input Data Transition (Fall Time) 1 µs

Input Data Transition (Rise Time) 1 µs Input Data to Serial Clock Input High 40 ns

Chip Enable High to Serial Clock Input High 200 ns Chip Enable High to Chip Enable Low 200 ns

Chip Enable High to Output High-Z 250 ns Chip Enable Low to Serial Clock Input High 200 ns Output Data Transition (Fall Time) 100 ns

Output Data Transition (Rise Time) 100 ns

+ tCL ≥ 1/f

SCL

Parameter

(1)

Min Max Unit

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