Stanford Research Systems CG635 User Manual

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User Manual

CG635

2.05 GHz Synthesized Clock Generator

Revision 1.3 (08/2010)

Certification

Stanford Research Systems certifies that this product met its published specifications at the time of shipment.

Warranty

This Stanford Research Systems product is warranted against defects in materials and workmanship for a period of one (1) year from the date of shipment.

Service

For warranty service or repair, this product must be returned to a Stanford Research Systems authorized service facility. Contact Stanford Research Systems or an authorized representative before returning this product for repair.

Information in this document is subject to change without notice.

Stanford Research Systems, Inc. 1290-C Reamwood Avenue Sunnyvale, California 94089 Phone: (408) 744-9040 Fax: (408) 744-9049

www.thinkSRS.com

Printed in U.S.A.

CG635 Synthesized Clock Generator

Contents i

Contents

Contents i Safety and Preparation for Use v Specifications vii Quick Start Instructions xi

Introduction 1

Feature Overview 1 Front-Panel Overview 2

Outputs 2 Output Levels 3 Display 4 Entry 4 Modify 6 Clock Status and Interface Indicators 7

Rear-Panel Overview 8

AC Power 8 GPIB 8 RS-232 9 Chassis Ground 9 Timebase 9 T

Input 9

mod

Clock Output 10 PRBS and Clock Option 11

Operation 13

Front-Panel User Interface 13

Power On 13 Displaying a Parameter 13 Changing a Parameter 14 Stepping a Parameter 14 Step Sizes of Exact Factors of Ten 14 Changing Units 15 Store and Recall Settings 15 Secondary Functions 15

Q and Q¯ Outputs 16 CMOS Output 17 Frequency 19 Phase 20 Secondary Functions 22

RUN, STOP, TOGGLE 22 INIT 22

CG635 Synthesized Clock Generator

Contents ii

STATUS 22 PRBS ON/OFF 24 FREQ/2, FREQx2 24 REL θ = 0 24 θ + 90° 24 GPIB 24 ADDRS 25 RS-232 25 DATA 25

Factory Default Settings 25 Troubleshooting 26

CG635 Remote Programming 29

Introduction 29

GPIB 29 RS-232 29 Front-Panel Indicators 29

Command Syntax 30 Index of Commands 31

Instrument Control Commands 31 Interface Commands 31 Status Reporting Commands 31

Instrument Control Commands 32 Interface Commands 36 Status Reporting Commands 38 Status Byte Definitions 40

Serial Poll Status Byte 40 Standard Event Status Register 41 Communication Error Status Register 41 Instrument Status Register 41 PLL Lock Status Register 42

Error Codes 43

Performance Evaluation 47

Overview 47

Equipment Required 47

CG635 Self Test 47 Output Level Tests 48

Q/Q¯ Level Te sts 48 CMOS Level Tests 49 Transition Time Measurements 50

Frequency Synthesis Tests 52

Functional Tests 53 Time Modulation Test 55

CG635 Synthesized Clock Generator

Contents iii

Phase Noise Tests 56 Jitter Tests 58

Timebase Calibration 59

Timebase Calibration Test 60 Calibration 60

Circuit Description 61

Overview 61

Accuracy 61 Resolution 61 Phase Noise 61

Circuit Block Diagram 62

Timebase 62 Reference Synthesizer 62 Reference Synthesizer Clean-up 63 Time Modulation 63 RF Synthesizer 63 Programmable Dividers and Clock Fan-out 64 Determining Register Values 64 Phase adjustment 67

Detailed Circuit Description 69

Timebase 69 DDS and the 19.40/19.44 MHz Reference 71 Time Modulation 73 RF Synthesizer 74 ECL Dividers and Clock Multiplexer 75 Microcontroller 76 Rear-Panel RJ-45 Outputs 82 RS-232 and GPIB Interfaces 83 Power Supply Interface 83 Front-Panel Output Drivers 83 Front-Panel Q and Q¯ Drivers 84 Front-Panel CMOS Driver 84 Front-Panel Display and Keypad 85 Power Supply 85 Timebase Options 86 Optional PRBS Generator 86 Line Receiver Accessories 87

CG635 Synthesized Clock Generator

Contents iv

Parts List 93

Motherboard Assembly 93 Output Driver Assembly 102 Power Supply Assembly 106 Chassis and Front-Panel Assembly 107 Option 1 Assembly 109 Option 2 Assembly 111 Option 3 Assembly 111

Schematics 113

CG635 Schematic Diagram List 113

CG635 Synthesized Clock Generator

Safety and Preparation for Use v

Safety and Preparation for Use

Line Voltage

The CG635 operates from a 90 to 132 VAC or 175 to 264 VAC power source having a line frequency between 47 and 63 Hz. Power consumption is less than 80 VA total. In standby mode, power is turned off to the main board. However, power is maintained at all times to any optional timebases installed. Thus, a unit with an optional rubidium or ovenized quartz oscillator is expected to consume less than 25 VA and 15 VA of power, respectively, in standby mode.

Power Entry Module

A power entry module, labeled AC POWER on the back panel of the CG635, provides connection to the power source and to a protective ground.

Power Cord

The CG635 package includes a detachable, three-wire power cord for connection to the power source and protective ground.

The exposed metal parts of the box are connected to the power ground to protect against electrical shock. Always use an outlet which has a properly connected protective ground. Consult with an electrician if necessary.

Grounding

A chassis grounding lug is available on the back panel of the CG635. Connect a heavy duty ground wire, #12AWG or larger, from the chassis ground lug directly to a facility earth ground to provide additional protection against electrical shock.

BNC shields are connected to the chassis ground and the AC power source ground via the power cord. Do not apply any voltage to the shield.

Line Fuse

The line fuse is internal to the instrument and may not be serviced by the user.

Operate Only with Covers in Place

To avoid personal injury, do not remove the product covers or panels. Do not operate the product without all covers and panels in place.

Serviceable Parts

The CG635 does not include any user serviceable parts inside. Refer service to a qualified technician.

CG635 Synthesized Clock Generator

Safety and Preparation for Use vi

Symbols you may Find on SRS Products

Symbol Description

Alternating current

Caution - risk of electric shock

Frame or chassis terminal

Caution - refer to accompanying documents

Earth (ground) terminal

Battery

Fuse

On (supply)

Off (supply)

CG635 Synthesized Clock Generator

Specifications vii

Specifications

Frequency

Range 1 µHz to 2.05 GHz Resolution

f < 10 kHz 1 pHz

f  10 kHz 16 digits Accuracy f < ± (2×10 Settling time <30 ms

Timebase (+20 °C to +30 °C ambient)

Stability

Std. timebase <5 ppm

Opt. 02 (OCXO) <0.01 ppm

Opt. 03 (Rb) <0.0001 ppm Aging

Std. timebase <5 ppm/year

Opt. 02 (OCXO) <0.2 ppm/year

Opt. 03 (Rb) <0.0005 ppm/year External Input 10 MHz ± 10 ppm, sine >0.5 V Output 10 MHz, 1.41 V

Noise & Spurs

Phase noise (at 622.08 MHz)

100 Hz offset <–90 dBc/Hz

1 kHz offset <–100 dBc/Hz

10 kHz offset <–100 dBc/Hz

100 kHz offset <–110 dBc/Hz Phase noise vs. freq. 6 dB/oct. relative to 622.08 MHz Spurious <–70 dBc (within 50 kHz of carrier)

-19

+ timebase error) × f

sine (+7 dBm) into 50 

, 1 k impedance

Jitter and Wander

Jitter (rms) <1 ps (1 kHz to 5 MHz bandwidth) Wander (p-p) <20 ps (10 s persistence)

Time Modulation

Rear-panel input BNC, DC coupled, 1 k Sensitivity 1 ns/V, ±5 % Range ±5 ns Bandwidth DC to greater than 10 kHz

CG635 Synthesized Clock Generator

Specifications viii

Phase

Range ±720° Resolution <20 ps Maximum step size ±360° Slew time (p > 0°) <300 ms

Q and Q¯ Outputs

Outputs Front-panel BNC connectors Frequency range DC to 2.05 GHz High level –2.00 V  V Amplitude 200 mV  V Level resolution 10 mV Level error <1 % + 10 mV Transition time <100 ps (20 % to 80 %) Symmetry <100 ps departure from nominal 50 % Source impedance 50  (±1 %) Load impedance 50  to ground on both outputs Pre-programmed levels +5.0 V PECL, +3.3 V PECL, LVDS, +7 dBm, ECL Protection Continuous to ground, momentary to +5 V

 +5.00 V

HIGH

 1.00 V (V

AMPL

 V

HIGH

– V

LOW

)

CMOS Output

Output Front-panel BNC Frequency range DC to 250 MHz Low level -1.00 V  V Amplitude range 500 mV  V Level resolution 10 mV Level error <2 % of V Transition time <1.0 ns (10 % to 90 %, with 12pF load at far end of 50  cable) Symmetry <500 ps departure from nominal 50% Source impedance 50  (reverse terminates cable reflection) Load impedance Unterminated 50  cable of any length Attenuation (50  load) Output levels are divided by 2 Preprogrammed levels V Protection Continuous to ground, momentary to +5 V

RS-485 Output

Output Rear-panel RJ-45 Frequency range DC to 105 MHz Clock output Pin 7 and pin 8 drive twisted pair Transition time <800 ps (20% to 80%) Source impedance 100  between pin 7 and pin 8 Load impedances 100  between pin 7 and pin 8 Logic levels V Recommended cable Straight-through Category-6 Protection Continuous to ground, momentary to +5 V

= 0; V

LOW

= +0.9 V, V

LOW

 +1.00 V

LOW

 6.00 V (V

AMPL

+ 20 mV

AMPL

= 1.2, 1.8, 2.5, 3.3, or 5.0 V

HIGH

AMPL

= +2.2 V

 V

HIGH

– V

LOW

)

CG635 Synthesized Clock Generator

Specifications ix

LVDS Output (EIA/TIA-644)

Output Rear-panel RJ-45 Frequency range DC to 2.05 GHz Clock output Pin 1 and pin 2 drive twisted pair Transition time <100 ps (20% to 80%) Source impedance 100  between pin 1 and pin 2 Load impedances 100  between pin 1 and pin 2 Logic levels V

= +0.96 V, V

LOW

= +1.34 V

HIGH

Recommended cable Straight-through Category-6 Protection Continuous to ground, momentary to +5 V

PRBS (Opt. 01) (EIA/TIA-644)

Frequency range DC to 1.55 GHz Level LVDS on rear-panel SMA jacks Outputs PRBS, –PRBS, CLK & –CLK PRBS generator x Transition time <100 ps (20 % to 80 %) Load impedance 50  to ground on all outputs

+ x6 + 1 for a length of 27 – 1 bits

Accessory Power (on rear-panel RJ-45 connector)

+5 VDC Pin 3 –5 VDC Pin 5 Ground return Pin 4 and pin 6 Short circuit protection Current limited to 375 mA Polarity clamps Diode clamps prevent polarity inversion

(2 ADC max., 120 A non-rep.)

General

Computer interfaces IEEE-488.2 and RS-232 standard. All instrument functions can be

controlled through the computer inte rf aces . Non-volatile memory Ten sets of instrument configurations can be stored and recalled. Line power Universal input, 90 to 264 VAC,

47 Hz to 63 Hz Standby power <5 W (std. timebase)

<15 W (opt. 02, OCXO timebase)

<25 W (opt. 03, Rb timebase) Operating power <30 W (std. timebase)

<40 W (opt. 02, OCXO timebase)

<50 W (opt. 03, Rb timebase) Dimensions 8.5” × 3.5” × 13” (WHD) Weight <9 lbs. Warranty One year parts and labor on defects in materials and workmanship

CG635 Synthesized Clock Generator

Specifications x

Optional Receiver Modules

General

Inputs RJ-45. Connects to CG635 via standard Category-6 cable. Outputs Q / Q¯ on SMA connectors Dimensions 1 5/8” × 1” × 3” (WHD)

Models

Model Levels Source

Impedance

Termination Impedance

Transition Time (max)

(2)

max

CG640 +5 V CMOS 50  High Z 2.0 ns 105 MHz CG641 +3.3 V CMOS 50  High Z 800 ps 250 MHz CG642 +2.5 V CMOS 50  High Z 800 ps 250 MHz CG643 +5 V PECL 50  High Z 800 ps 250 MHz CG644 +3.3 V PECL 50  50  100 ps 2.05 GHz CG645 +2.5 V PECL 50  50  100 ps 2.05 GHz CG646 +7 dBm RF 50  50  100 ps 2.05 GHz CG647 CML/NIM 50  50  100 ps 2.05 GHz CG648 NEG ECL 50  50  100 ps 2.05 GHz CG649 LVDS 50  50  100 ps 2.05 GHz

Notes: (1) Output is set to logic ‘0’ above F

(2) Except for the CG640, all outputs continue to operate above F

max

with reduced amplitude.

max

Maximum operating frequency is also limited by the CAT-6 cable length. At 2 GHz, cable lengths up to 10 feet may be used. At 10 MHz, cable lengths of up to 200 feet may be used. See Figure 3 on page 11 for the maximum recommended cable lengths at other frequencies.

(1)

CG635 Synthesized Clock Generator

Quick Start Instructions xi

Quick Start Instructions

Step by Step Example

1. With the power button in the Standby position, connect the CG635 to a grounded

outlet using the power cord provided.

2. Push in the power button to turn on the CG635. The CG635 will perform some

start up tests and then recall the instruments’ last known settings from non volatile memory.

3. Reset the CG635 to its default state by pressing sequentially the following 3 keys

located in the ENTRY section of the front panel: ‘SHIFT’, ‘+/-’, ‘Hz’. This performs the INIT function which resets the instrument to its default settings.

The INIT function will set the frequency to 10 MHz, set the phase to 0 degrees, set the output levels for Q and Q¯ to LVDS, set the output levels for CMOS to

3.3 V, and select the frequency for display. The LVDS and +3.3 V LEDs in the OUTPUT LEVELS section of the front panel should be on. The FREQ LED in the DISPLAY section should be on. The seven segment display should show

10.000000000 and the MHz LED should be lit. This indicates that the frequency is 10 MHz.

4. Connect the CMOS output to an oscilloscope with a high impedance input to see

that the output is indeed a 3.3 V square wave with a frequency of 10 MHz.

5. Adjust the frequency to 5 MHz by pressing the following keys sequentially: ‘5’,

‘MHz’. The display should change to 5.000000000 MHz. The oscilloscope should now display a 5 MHz square wave with amplitude 3.3 V.

6. Adjust the CMOS output up to 5.0 V by pressing the CMOS  key in the

OUTPUT LEVELS section of the front panel. The +3.3 V LED should turn off and the +5.0 V LED should turn on. The oscilloscope should now display a 5 MHz square wave with amplitude 5.0 V.

7. Press the ‘CMOS HIGH’ key in the DISPLAY section of the front panel. The

CMOS HIGH LED should turn on and the seven segment display should show

5.00 VDC.

8. Adjust the CMOS output to 4.5 V by pressing the following keys sequentially in

the ENTRY section of the front panel: ‘4’, ‘.’, ‘5’, ‘VOLT’. The seven segment display should now show 4.50 VDC. In the OUTPUT LEVELS section, the +5.0 V and VAR LEDs should be lit. This indicates that the current CMOS output voltage varies from, but is closest to the +5.0 V standard output level.

9. Press the CMOS  key in the OUTPUT LEVELS section of the front panel. The

CMOS output changes to the nearest standard level in the direction of the indicated key, which is 3.3 V in this case. The VAR LED should turn off, indicating that the current output is at a standard level.

CG635 Synthesized Clock Generator

Quick Start Instructions xii

10. Press the ‘FREQ’ key in the DISPLAY section to display the current frequency.

The seven segment display should show 5.000000000 MHz.

11. Press the ‘STEP SIZE’ key in the MODIFY section of the front panel. The

display should now show 1.000 Hz, and the STEP LED should be lit. This indicates that the current step size for frequency is 1.000 Hz.

12. Change the frequency step size to 1 kHz by pressing the following keys

sequentially in the ENTRY section of the front panel: ‘1’, ‘kHz’. The display should now show 1.000000 kHz.

13. Switch back to the frequency display be pressing the ‘STEP SIZE’ key again.

The STEP LED should turn off, and the display should show the current frequency of 5.000000000 MHz. The digit corresponding to 1 kHz should be blinking, indicating that frequency steps will change that digit by one.

14. Step the frequency up by 1 kHz by pressing the MODIFY  key. The frequency

should now display 5.001000000 MHz.

15. For more details about the operation of keys on the front panel, see the Front

Panel Overview (page 2) in the Introduction.

16. For more details about a particular feature, see the chapter Operation (page 13).

CG635 Synthesized Clock Generator

Introduction 1

Introduction

Feature Overview

The CG635 Synthesized Clock Generator provides precise, low-jitter digital clock signals for applications ranging from the development of digital circuits to the testing of communications networks.

The CG635 generates single ended and differential clocks from 1 µHz to 2.05 GHz with sub-picosecond jitter. Clock frequencies may be set with up to 1 pHz resolution and 16 significant digits. Front-panel outputs have continuously adjustable offsets and amplitudes, and may be set to standard logic levels including CMOS, PECL, ECL, and LVDS. A rear-panel output delivers clocks at RS-485 and LVDS over twisted pairs.

Several instrument features support more complex tasks. The phase of the outputs may be adjusted with nanodegree resolution at 2 Hz, and one-degree resolution at 2 GHz. The timing of clock edges may be modulated over ±5 ns by an external analog signal. An optional pseudo-random binary sequence (PRBS) generator (Opt. 01) provides clock and data outputs at LVDS levels for eye-pattern testing of serial data channels. Edge transition times are typically 80 ps.

The standard crystal oscillator timebase of the CG635 provides sufficient accuracy for many applications. An optional ovenized crystal oscillator (Opt. 02), or rubidium frequency standard (Opt. 03), may be added to improve frequency stability and reduce aging. The CG635 may also be locked to an external 10 MHz timebase.

The CG635 delivers a low spurious output signal—bet ter tha n mo st comm ercia l synthesizers. Phase noise for a 622.08 MHz carrier at 100 Hz offset is less than –80 dBc/Hz, and the spurious response is better than –70 dBc.

All instrument functions may be controlled from the front panel or via the GPIB (IEEE-

488.2) or RS-232 interfaces. Up to ten complete instrument configurations can be stored in non-volatile memory and recalled at any time. A universal input AC power supply allows world-wide operation.

Several clock receiver modules are available which may be connected to the rear-panel RS-485/LVDS output via Category-6 cable. These accessories provide complementary high-speed transitions at standard logic levels on SMA connectors, and may be located at a substantial distance from the instrum ent. CMOS (+5 V, +3.3 V, and +2.5 V), PECL (+5 V, +3.3 V and +2.5 V), RF (+7 dBm), CML/NIM, ECL, and LVDS outputs are all available.

CG635 Synthesized Clock Generator

Introduction 2

Front-Panel Overview

The front panel was designed to provide a simple, intuitive, user interface to all the CG635 features (see Figure 1). The power switch is located in the lower right corner of the front panel. Pushing the switch enables power to the instrument. Pushing the switch again places the instrument in stand-by mode, where power is enabled only to optionally installed timebases. Power to the main board is turned off in stand- by mode.

The front panel provides three output drivers for connecting the CG635 clock signals to user applications via standard BNC cables. The two upper outputs are complementary, high-speed, ECL compatible output drivers. The lower output is a CMOS output driver.

Keys on the front panel are divided into four sections to indicate their overall functionality: OUTPUT LEVELS, DISPLAY, ENTRY, and MODIFY. Keys in the OUTPUT LEVELS section modify the amplitude and offset of the clock signals provided by the front panel output drivers. Keys in the DISPLAY section control what is shown in the main display. The user can choose among six standard displays. Keys in the ENTRY section are used for changing the currently displayed item to a specific value. This section is also used to access secondary functions. Keys in the MODIFY section allow the user to increment the currently displayed item by configurable steps.

Figure 1: The CG635 Front Panel

Outputs

Q and Q¯

The CG635 front panel includes three BNC outputs. The upper two outputs, labeled Q and Q¯ , are high-speed drivers that operate from DC to 2.05 GHZ. The outputs provide the user with fast, complementary voltages at the selected frequency, amplitude, and offset.

CG635 Synthesized Clock Generator

Introduction 3

To operate at specification, BOTH outputs should be terminated into 50 , even if only one output is used.

CMOS

The bottom output driver is a CMOS compatible driver that can operate from DC to 250 MHz. It drives the output at the selected frequency, amplitude and offset. At frequencies above 250 MHz, the CMOS driver will be turned off and forced to a low logic state. To operate at specification, the CMOS output driver should be terminated into a high impedance input and NOT terminated into 50 .

Output Levels

Standard Levels

The CG635 provides a simple method for switching among five standard voltage levels for the Q / Q¯ and CMOS outputs. The meaning of the five standard levels is summarized in Table 1 and Table 2 below:

Table 1: Q / Q¯ Standard Output Levels

Label Description V

HIGH

(V) V

LOW

(V)

PECL5V ECL run on +5 VDC supply 4.00 3.20 PECL3.3V ECL run on +3.3 VDC supply 2.30 1.50 LVDS Low voltage differential signaling 1.43 1.07 +7 dBm 1 Vpp with 0.0 VDC offset 0.50 –0.50 ECL ECL run on negative supply –1.00 –1.80

Table 2: CMOS Standard Output Levels

Label Description V

HIGH

(V) V

LOW

(V)

+5.0V 5 V CMOS 5.00 0.00 +3.3V 3.3 V CMOS 3.30 0.00 +2.5V 2.5 V CMOS 2.50 0.00 +1.8V 1.8 V CMOS 1.80 0.00 +1.2V 1.2 V CMOS 1.20 0.00

HIGH

and V

indicate the voltage driven by the Q / Q¯ or CMOS outputs for the high

LOW

and low logic levels.

LEDs in the OUTPUT LEVELS section indicate the standard level that is currently being driven on the output. Pressing the  and  keys in this section will move the standard output level up and down in the table, respectively.

Variable Levels

A sixth LED, labeled VAR, turns on when the current output levels do not correspond to any of the standard levels. In this case, the standard level LED indicates the standard level that is closest to the current level. Pressing the  and  keys when the VAR LED is on, forces the output to the closest standard output in the direction indicated by the key.

CG635 Synthesized Clock Generator

Introduction 4

Display

The DISPLAY section allows the user to select which values are reported in the main front panel display. The LEDs in the display section indicate what is currently being displayed or edited. The meaning of the LEDs and keys are summarized in Table 3.

Table 3: DISPLAY Section Ke ys

Label Value Shown in Main Display When Pressed

FREQ Current frequency PHASE Current phase Q / Q¯ HIGH Voltage for a Q / Q¯ logic high state Q / Q¯ LOW Voltage for a Q / Q¯ logic low state CMOS HIGH Voltage for a CMOS logic high state CMOS LOW Voltage for a CMOS logic low state

The keys are used to change the main display to the indicated item. Pressing ‘FREQ’, for example, will cause the CG635 to display the current frequency. The FREQ LED will turn on, indicating that the current display is frequency.

Entry

Numeric Entry

The ENTRY section is used to modify the current settings of the CG635. In most cases, the currently displayed item can be changed by entering a new value with the numeric keys, and pressing an appropriate units key to complete the entry. For example, if the frequency is currently being displayed, pressing the keys ‘1’, ‘MHz’, sequentially will change the frequency to 1 MHz. Similarly, if the CMOS HIGH voltage is displayed, pressing the keys ‘2’, ‘.’, ‘1’, ‘VOLT’ will set the CMOS logic high voltage to 2.1 VDC.

Store and Recall Settings

Secondary Functions

Many of the keys have secondary functions associated with them. The names of these functions are printed above the key. The ‘4’ key, for example, has FREQx2 above it. The meaning of the secondary functions is summ ariz ed in Table 4.

Table 4: Secondary Functions

Label Function Description

RUN Enables the output. Drives the output at the current frequency. STOP Stops the output. Forces the output to a logic low state.

CG635 Synthesized Clock Generator

Introduction 5

TOGGLE When stopped, toggles the logic state of the output INIT Resets the instrument to its default settings STATUS Displays instrument status PRBS ON If installed, turns on the pseudo-random binary generator PRBS OFF If installed, turns off the pseudo-random binary generator FREQ/2 Divides the current frequency by 2 and displays frequency FREQx2 Multiplies the current frequency by 2 and displays frequency REL  = 0 Defines the current phase to be 0 degrees and displays phase  + 90° Increments the phase by 90 degrees and displays phase GPIB Enables the GPIB remote interface. Disables RS-232. ADDRS Displays / Sets the GPIB primary address for the CG635 RS-232 Enables the RS-232 remote interface. Disables GPIB. DATA Displays the most recent data received over the remote interface  Increases the current step size by the next exact factor of ten

(Located in the MODIFY section.)

 Decrease the current step size by the next exact factor of ten

(Located in the MODIFY section.)

A more detailed description of each of the secondary functions is given in the Secondary Functions section of the Operation chapter (page 22).

The secondary functions can only be accessed when SHIFT mode is active, which is indicated by the SHIFT LED being turned on. The SHIFT mode can be toggled on and off by pressing the ‘SHIFT’ key. Therefore, to increase the frequency by a factor of four, you would press the ‘SHIFT’ key to activate SHIFT mode, and then press ‘4’ twice to execute FREQx2 twice. Pressing ‘SHIFT’ again toggles SHIFT mode off.

Most of the secondary functions will automatically toggle SHIFT mode off when executed. FREQ/2, FREQx2,  + 90°, and TOGGLE are exceptions to this rule. This allows the user to easily sweep frequency or phase without having to continually reactivate SHIFT mode.

Secondary functions that have an arrow ( ) printed after them, such as INIT, GPIB, ADDRS, and RS-232, require that the user press the key ‘Hz’ to complete the action. For example, to initialize the instrument to its default settings, you would sequentially press ‘SHIFT’, ‘INIT’, ‘Hz’.

Cancel

The ‘SHIFT’ key also functions as a general purpose CANCEL key. Any numeric entry which has not been completed by pressing a units key, can be canceled by pressing the ‘SHIFT’ key. Because of the dual role played by the SHIFT key, the user may have to press ‘SHIFT’ twice to reactivate SHIFT mode. The first key press cancels the current action, and the second key press activates SHIFT mode.

CG635 Synthesized Clock Generator

Introduction 6

Modify

Stepping Up and Down

The MODIFY section is used to step the currently displayed item up or down by a programmed amount. Each of the six standard display items listed in the DISPLAY section has a step size associated with it. Normally, pressing the MODIFY  and  keys causes the displayed item to increment and decrement, respectively, by the associated step size.

Step Size

The step size for the current standard display can be viewed by pressing the ‘STEP SIZE’ key. Pressing ‘STEP SIZE’ a second time toggles the view back to the standard display. When the step size is being viewed, the STEP LED in the main display will be turn on. To view the frequency step size, press ‘FREQ’, ‘STEP SIZE’, sequential ly. Pressing ‘FREQ’ ensures that frequency is the current standard display. Pressing ‘STEP SIZE’ then toggles the main display to the step size associated with frequency.

The step size can be changed in a number of ways. If the current step size is being displayed, the user can modify the current step size in one of two ways. First, you can enter a new value with the numeric keys in the ENTRY section and complete the entry by pressing an appropriate units key. Second, you can increment and decrement the current step size by exact factors of ten by pressing the MODIFY  and  keys, respectively. For example, if the currently displayed frequency step size is 1.000 Hz, then the step size can be increased to 10.000 Hz by pressing MODIFY  once.

The step size can also be changed, even when the current step size is not being displayed. This is accomplished by accessing the SHIFTED functions  and  shown above the MODIFY  and  keys, respectively. For example, pressing ‘SHIFT’, MODIFY , sequentially will increase the associated step size to the next exact factor of ten.

When the step size of a standard display item is an exact factor of ten, the corresponding digit in the main display will blink. This provides a convenient visual cue to let the user know which digit will change when the user presses the MODIFY  and  keys. For example, if the frequency step size is 1.000 Hz, and the displayed frequency is

123456.789 Hz, then the ‘6’ will be blinking. Pressing the MODIFY  key will step the frequency up 1 Hz to 123457.789 Hz.

Remote and Local Mode

The REM LED turns on when the CG635 is placed in remote mode by the GPIB bus. In this mode, all the front panel keys are disabled and the instrument can only be controlled via the GPIB bus. The user can return to normal, local mode by pressing the ‘STEP SIZE’ key once. The ‘LOCAL’ label above the key indicates the dual functionality of the ‘STEP SIZE’ key.

CG635 Synthesized Clock Generator

Introduction 7

Clock Status and Interface Indicators

10 MHz & SYNTH

In the upper right portion of the front panel are two groups of LED indicators. The upper group is labeled 10 MHz & SYNTH. This contains the EXT and UNLK LEDs. The EXT LED indicates that the CG635 has detected an external 10 MHz reference at the 10 MHz input BNC on the rear panel of the CG635. The CG635 will lock its internal clock to this external reference.

The UNLK LED indicates that the output has not yet stabilized for some reason. This is usually due to a user request to change frequency or phase. Frequency changes can take roughly 30 ms to stabilize. A backward phase step of 360 degrees at 1 Hz can take as long as 1.5 s to complete. The UNLK LED may also indicate that the internal clock has not locked to the external reference.

INTERFACE

The lower group of LED indicators is labeled INTERFACE. These LEDs indicate the current status of RS-232 or GPIB remote programming interfaces. The RS-232 LED is on if the instrument is configured to accept commands over the RS-232 interface. Alternately, the GPIB LED is on if the instrument is configured to accept commands over the IEEE-488 port. When a character is received or sent over one of the interfaces, the ACT LED will flash. This is helpful when troubleshooting communications problems. If a command received over the remote interface fails to execute due to either a parsing error or an execution error, the ERR LED will flash.

CG635 Synthesized Clock Generator

Introduction 8

Rear-Panel Overview

The rear panel provides connectors for AC power, GPIB/RS-232 computer interfaces, chassis ground, external timing references, clock edge timing modulation, additional clock outputs, and an optional, pseudo-random binary sequence generator (see Figure 2).

AC Po wer

The Power Entry Module is used to connect the CG635 to a power source through the power cord provided with the instrument. The center pin is connected to the CG635 chassis so that the entire box is grounded.

The source voltage requirements are: 90 to 132 VAC or 175 to 264 VAC, 47 to 63 Hz (80 VA total).

Connect the CG635 to a properly grounded outlet. Consult an electrician if necessary.

GPIB

The CG635 comes standard with a GPIB (IEEE-488) communications port for communications over a GPIB bus. The CG635 supports the IEEE-488.1 (1978) interface standard. It also supports the required common commands of the IEEE-488.2 (1987) standard.

Before attempting to communicate with the CG635 over the GPIB interface, the port must be enabled via the front panel. Do this by sequentially pressing the following keys located in the ENTRY section: ‘SHIFT’, ‘GPIB’, ‘Hz’. The GPIB address can be changed by pressing the keys ‘SHIFT’, ‘ADDRS’. Use the MODIFY ‘UP’ and ‘DOWN’ keys to select the desired address. Press ‘Hz’ to complete change.

Figure 2: The CG635 Rear Panel

CG635 Synthesized Clock Generator

Introduction 9

A host computer interfaced to the CG635 can perform virtually any operation that is accessible from the front panel. Programming the CG635 is discussed in the CG635 Remote Programming chapter.

RS-232

The CG635 comes standard with an RS-232 communications port. The RS-232 interface connector is a standard 9 pin, type D, female connector configured as a DCE (transmit on pin 3, receive on pin 2). The communication parameters are fixed at: 9600 Baud, 8 Data bits, 1 Stop bit, No Parity, RTS/CTS Hardware Flow Control.

Before attempting to communicate with the CG635 over RS-232, the port must be enabled via the front panel. Do this by sequentially pressing the following keys located in the ENTRY section: ‘SHIFT’, ‘RS-232’, ‘Hz’.

A host computer interfaced to the CG635 can perform virtually any operation that is accessible from the front panel. Programming the CG635 is discussed in the CG635 Remote Programming chapter.

Chassis Ground

Use this grounding lug to connect the CG635 chassis directly to facility ground

Timebase

10 MHz IN

The CG635 provides a 10 MHz BNC input for synchronizing its internal clock to an external 10 MHz reference. The external reference should provide greater than 0.5 V into a 1 k impedance. The CG635 will automatically detect the presence of an external 10 MHz reference and lock to it if possible. If the CG635 is unable to lock to the external reference, the front-panel UNLK LED will turn on and stay on until the CG635 either successfully locks to the external re fer enc e or the refer ence is removed.

10 MHz OUT

The CG635 provides a 10 MHz BNC output for synchronizing other instrumentation to the CG635’s timebase.

Input

mod

The CG635 clock edges can be modulated over ±5 ns by providing a modulation voltage to the T input swing. The input can accept voltages of ±5 V. Posit iv e inputs adv ance the cl ock outputs, negative inputs retard the clock outputs.

BNC input. The input is calibrated to provide 1 ns of modulation for 1 volt of

mod

The T timing jitter.

input can be very useful for characterizing a circuit’s susceptibility to

mod

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Introduction 10

Clock Output

The CG635 interfaces to a number of optional clock receiver modules which can be used to get a clock signal from the CG635 to where it is needed. The receiver modules regenerate the clock locally providing the user with clean, fast clock edges, even if the CG635 is several meters away. Receiver modules are available for generating most of the standard CMOS and ECL signal levels.

All modules provide both +CLK and –CLK with a source impedance of 50 , and connect to the rear-panel RJ-45 connector using standard Category-6 cable. Table 5 summarizes the features of the optional receiver modules offered by SRS. The maximum frequency (F the module operates at specification. With the exception of the CG640, the modules continue to operate above F

Model Description Termination

CG640 CMOS (+5 Vcc) High Z 2.0 ns 105 MHz CG641 CMOS (+3.3 Vcc) High Z 800 ps 250 MHz CG642 CMOS (+2.5 Vcc) High Z 800 ps 250 MHz CG643 PECL (+5 Vcc) High Z 800 ps 250 MHz CG644 PECL (+3.3 Vcc) 50  100 ps 2.05 GHz CG645 PECL (+2.5 Vcc) 50  100 ps 2.05 GHz CG646 RF (+7 dBm) 50  100 ps 2.05 GHz CG647 CML/NIM 50  100 ps 2.05 GHz CG648 ECL 50  100 ps 2.05 GHz CG649 LVDS 50  100 ps 2.05 GHz

Notes: (1) Output is set to logic ‘0’ above F

(2) Maximum operating frequency is limited by the CAT-6 cable length.

) listed in the table for each module is the maximum frequency at which

max

, but with reduced amplitude.

max

Table 5: Optional Receiver Modules

(2)

max

(1)

Impedance

max

Transition Time(max)

The maximum frequency may also be limited by the CAT-6 cable length. At 2 GHz, the cable may be up to 10 feet long. At 10 MHz, the cable may be up to 200 feet long. Figure 3 summarizes the limitation on maximum frequency due to cable length.

If clock regeneration is not needed, the user can interface directly to the clock signals provided on the various pins of the RJ-45 connector. The clock signals and pin assignments are printed on the rear panel of the CG635 in the CLOCK OUT section.

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Introduction 11

Figure 3: Maximum recommended CAT-6 cable length as a function frequency.

Maximum Recommended CAT-6 Cable Length vs. Frequency

1000

100

Maximum CAT-6 Cable (meters)

1 10 100 1000 10000

Frequency (MHz)

PRBS and Clock Option

An optional pseudo-random binary sequence generator for the CG635 is also available from SRS. If installed, both the PRBS data and the clock are output as LVDS levels on rear-panel SMA connectors.

A Pseudo-Random Binary Sequence (PRBS) generator is used for testing data transmission systems. A typical arrangement is to display an “eye pattern” on an oscilloscope by triggering the oscilloscope with the clock while displaying the (random) data after it passes through the data transmission system. An “open” eye pattern is necessary for reliable data transmission. The eye pattern “closes” from the left and right with jitter, and from the top and bottom with insufficient channel bandwidth, increasing the likelihood for transmission errors.

The most common way to create a PRBS generator is to use a linear shift-register, feeding the input of the shift-register with the exclusive OR of two (particular) data bits as they shift through the system. The CG635 uses a 7-bit ECL shift register that provides a pseudo-random bit sequence which repeats after 2 stream is described by the polynomial x “random”; however, it does repeat itself (exactly) after 127 clock cycles. Another departure from randomness is that the longest string of “1’s” is seven in a row, while the longest string of “0’s” is six in a row.

+ x6 + 1. It satisfies many criteria to qualify as

– 1 = 127 clock cycles. The data bit

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Operation 13

Operation

Front-Panel User Interface

The previous chapter described the function of the front-panel keys based on their location on the front panel. This section provides guidelines for viewing and changing instrument parameters independent of their location on the front panel.

Power On

At power on, the CG635 performs a number of self tests to verify that various internal components are operating correctly. If any of the tests fail, the CG635 will briefly display “Failed” after the test. In such a case, consult the troubleshooting section later in this chapter before contacting SRS or an authorized representative to repair the unit.

After the self tests have completed, the CG635 will recall the latest known instrument settings from nonvolatile memory and be ready for use.

The CG635 continuously monitors front-panel key presses and will save the current instrument settings to nonvolatile memory after approximately ten seconds of inactivity. To prevent the nonvolatile memory from wearing out, however, the CG635 will not automatically save instrument settings that change due to commands executed over the remote interface. The remote commands *SAV and *RCL can be used to explicitly save instrument settings over the remote interface, if desired. See the CG635 Remote Programming chapter for more information about these commands.

The CG635 can be forced to boot up at factory default settings. This is accomplished by pressing and holding the ‘BACK SPACE’ key during power up, until the initialization is complete. All instrument parameters will be set back to their default values, including the enabled remote interface and the GPIB address. See the Default Factory Settings section later in this chapter for a listing of the default settings.

Displaying a Parameter

The CG635 has six main displays which are activated by pressing the keys in the DISPLAY section of the front panel. The function of each key is summariz ed in Table 6.

Table 6: DISPLAY Section Ke ys

Label Value Shown in Main Display When Pressed

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Operation 14

Each of these parameters has an independent step size associated with it. When one of the six main displays is active, the associated step size for the parameter can be displayed by pressing the ‘STEP SIZE’ button in the MODIFY section of the front panel. Pressing the ‘STEP SIZE’ key again toggles the display back to the original parameter. When the step size for a parameter is displayed, the STEP LED in the main display will be highlighted.

For example, to display the frequency, press the ‘FREQ’ key. Now that frequency is displayed you can display the frequency step size by pressing the ‘STEP SIZE’ key. The STEP LED should be highlighted in the main display. Pressing ‘STEP SIZE’ once more toggles the display back to frequency. The STEP LED should now be off.

Changing a Parameter

To change a parameter, enter a new value using the numeric keys in the ENTRY section of the front panel, and complete the entry by pressing an appropriate units key. Generally speaking, only displayed parameters can be changed. For example, to change the frequency to 10 kHz, press the following keys sequentially: ‘FREQ’, ‘1’, ‘0’, ‘kHz’. Pressing ‘FREQ’ selects it for display and editing. Pressing ‘1’ initiates the parameter change. Pressing ‘kHz’ completes the numeric entry and sets the frequency to 10 kHz.

The same techniques can be used to change the step size of a parameter. The only difference is that the parameter step size must be displayed first, before entering a new value.

If the user enters extra digits beyond the allowed resolution of a parameter, the extra digits will be ignored. For example, the phase has a resolution of 1 degree at 1 GHz. Entering a step size of 2.5 degrees will result in the step size being truncated to 2 degrees.

Stepping a Parameter

The six main parameters can be stepped up and down by their associated step sizes by respectively pressing the  and  keys in the MODIFY section of the front panel. For example, if frequency is currently being displayed as 10.000000000 MHz, and the frequency step size is 1.000 Hz, then pressing MODIFY  will change the frequency to

10.000001000 MHz. Pressing MODIFY  will bring the frequency back to 10 MHz.

Step Sizes of Exact Factors of Ten

If a parameter’s step size is an exact factor of ten, then the corresponding digit in the main display of the parameter will blink. This provides a visual cue to inform the user of the digit that will change when the parameter is stepped up or down. For example, if the frequency step size is 1.000 Hz, and the displayed frequency is 123456.789 Hz, then the ‘6’ will be blinking. Pressing the MODIFY  key will step the frequency up 1 Hz to

123457.789 Hz.

When a parameter step size is being displayed, the user can increase or decrease the step size to the nearest exact factor of ten by pressing the MODIFY  and  keys, respectively. For example, if the current frequency step size is being displayed as

1.000 Hz, then pressing MODIFY  will increase to the step size to 10.000 Hz.

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Operation 15

The same behavior can also be achieved even when the current step size is NOT being displayed. This is accomplished by accessing the SHIFTED functions  and  shown above the MODIFY  and  keys, respectively. For example, if the frequency is being displayed as 123456.789 Hz, and the frequency step size is 1 Hz, then sequentially pressing ‘SHIFT’, MODIFY  will increase the associated step size to 10 Hz. The ‘6’ will stop blinking and the ‘5’ will start blinking to indicate the new step size.

Changing Units

Frequency has the option of being displayed in units of GHz, MHz, kHz, or Hz. When the user enters a frequency using the front panel, the CG635 will display the frequency in the units used to complete the entry. For example, pressing the keys ‘FREQ’, ‘1’, ‘0’, ‘kHz’ sequentially, to change the frequency to 10 kHz, will cause the CG635 to display the result as 10.000000 kHz. The user can change the displayed units by pressing a different units key. Continuing with the previous example, if the user presses ‘Hz’, the CG635 will change the display to 10000.000 Hz.

Store and Recall Settings

The ‘STO’ and ‘RCL’ keys are for storing and recalling instrument settings, respectively. The instrument saves the frequency, phase, Q / Q¯ and CMOS output levels, all the associated step sizes, the run/stop state, the PRBS state, and the current display. Up to ten different instrument settings may be stored in the locations 0 to 9. To save the current settings to location 5, for example, press the keys ‘STO’, ‘5’, ‘Hz’ sequentially. To recall instrument settings from location 5, press the keys ‘RCL’, ‘5’, ‘Hz’ sequentially. The user may also use the MODIFY  and  keys to select the desired location, rather than enter the location directly with the numeric keys. The CG635 will remember the last location used for store and recall. To reuse the remembered location, simply skip the numeric entry when storing or recalling settings. For example, to recall settings from the remembered location, the user should simply press ‘RCL’, ’Hz.’

Secondary Functions

Most of the keys in the ENTRY section of the front panel have secondary functions associated with them. The names of these functions are printed above the key. The ‘4’ key, for example, has FREQx2 above it.

Secondary functions that have an arrow ( ) printed after them, such as INIT, GPIB, ADDRS, and RS-232, require that the user press the key ‘Hz’ to complete the action. For

CG635 Synthesized Clock Generator

Operation 16

example, to initialize the instrument to its default settings, you would press ‘SHIFT’, ‘INIT’, ‘Hz’ sequentially.

Detailed descriptions of each of the secondary functions can be found later in this chapter.

Q and Q¯ Outputs

The Q and Q¯ outputs on the front panel are high-speed, differential, ECL-compatible drivers that operate from DC to 2.05 GHz with a nominal 50 % duty cycle. The rise and fall times of these outputs are <100 ps. The outputs provide the user with fast, complementary voltages at the selected frequency, amplitude, and offset. To operate at specification, BOTH outputs should be terminated into 50 , even if only one output is used.

The user can easily switch between five standard output voltage levels by pressing the Q / Q¯  and  keys in the OUTPUT LEVELS section of the front panel. When the Q / Q¯ outputs are at a standard level, the appropriate standard level LED will be highlighted. The meaning of the five standard levels is summarized in Table 7.

Table 7: Q / Q¯ Standard Output Levels

Label Description V

HIGH

(V) V

LOW

(V)

HIGH

and V

indicate the voltage driven by the Q and Q¯ outputs for the high and low

LOW

logic levels, respectively.

Various ECL logic families have different logic thresholds that may vary with temperature. The ECL levels in the table above were chosen to lie between the levels for the 10 k and 100 k ECL logic families when operated at 25 ºC. The differences are small: at 25 ºC the typical V 10 k series) and –1.020 V (for the 100 k series), while V

for an ECL part run off a negative supply is -0.945 V (for the

HIGH

is –1.745 V (for the 10 k

LOW

series) and –1.820 V (for the 100 k series). As seen in Table 7, the CG635 will provide a

of –1.00 V and a V

HIGH

of –1.80 V.

LOW

The user also has the ability to set the Q / Q¯ outputs to nonstandard levels. When the outputs differ from the standard levels, the Q / Q¯ VAR LED in the OUTPUT LEVELS section will turn on. In this case, the highlighted standard LED indicates the standard level nearest the current output levels. Pressing the Q / Q¯  and  keys when the VAR LED is on will force the outputs to the nearest standard level in the direction indicated by the key.

The voltages for Q / Q¯ high and low states can be viewed in the main display by pressing ‘Q/Q¯ HIGH’ and ‘Q/Q¯ LOW’ keys in the DISPLAY section of the front panel.

CG635 Synthesized Clock Generator

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Stanford Research Systems CG635 User Manual

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