Datasheet STBB2 Datasheet (ST)

800 mA 2.5 MHz, high efficiency dual mode

Features

■ Operating input voltage range from 2.3 V to

5.5 V

■ ± 2% output voltage tolerance over process

and temperature variations

■ Bypass power save function

■ Selectable output voltage with dedicated VSEL

pin

■ Very fast line and load transients

■ 2.5 MHz switching frequency

■ Power save mode (PS) at light load

■ Typical efficiency higher than 90%

■ 50 µA max. quiescent current

■ Flip Chip 20 bumps 0.4 mm pitch 2.1 x 1.8 mm

Applications

■ Memory card supply

■ Cellular phones

Description

STBB2

buck-boost DC-DC converter

Datasheet − production data

Flip Chip 20 (2.1x1.8 mm)

selection between auto mode and forced PWM
mode, therefore benefiting from either lower
power consumption or best dynamic
performance. The bypass function allows battery
power saving. In this operating mode the high­side switches are turned on so that the output
voltage is equal to the input voltage; in this
condition the current consumption is reduced to a
maximum of 5 µA. The device includes also soft­start control, thermal shutdown, and current limit.
The STBB2 is packaged in Flip Chip 20 bumps
with 0.4 mm pitch.

The STBB2 is a fixed frequency, high efficiency,
buck-boost DC-DC converter able to provide
output voltages from 1.2 V to 4.5 V starting from
input voltage of 2.3 V to 5.5 V. The device can
operate with input voltages higher than, equal to,
or lower than the output voltage making the
product suitable for single Li-Ion, multi-cell
alkaline or NiMH applications where the output
voltage is within the battery voltage range. The
low-R

N-channel and P-channel MOSFET

DSon

switches are integrated and contribute to
achieving high efficiency. The MODE pin allows

Table 1. Device summary

Order codes Markings Packaging Output voltages

STBB2JAD-R BB2 Tape and reel Adjustable

STBB2J29-R B229 Tape and reel 2.9 V / 3.4 V

July 2012 Doc ID 022745 Rev 4 1/24

This is information on a product in full production.

www.st.com

24

Contents STBB2

Contents

1 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

4 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

6 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

7 General description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

7.1 Dual mode operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

7.2 Enable pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

7.3 Bypass operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

7.4 VSEL pin operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

7.5 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

7.5.1 Soft-start and short-circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

7.5.2 Undervoltage lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

7.5.3 Overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

8 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

8.1 Programming the output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

8.2 Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

8.3 Input and output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

8.4 Layout guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

8.5 Demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

8.6 Thermal consideration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

2/24 Doc ID 022745 Rev 4

STBB2 Application schematic

1 Application schematic

Figure 1. Application schematic for fixed version

L1

SW2SW1

PGND GND

L1

SW2SW1

PGND GND

VOUT

VOUT

FB

C3 C4

FB

C4

C3

R1

R2

VBAT

C1

C2

VIN

VINA

VINA1

MODE

EN

BP

VSEL

Figure 2. Application schematic for adjustable version

VBAT

C1

C2

VIN

VINA

VINA1

MODE

EN

BP

VSEL

Table 2. Typical external components

Component Manufacturer Part number Value Size

Murata GRM188R60J106M

C1

10 µF 0603

TDK-EPC C1608X5R0J106M

C2 Murata GRM188R61C105K 1 µF 0603

Murata GRM188R60J106M

C3, C4

10 µF 0603

TDK-EPC C1608X5R0J106M

Murata LQH3NPN1R0NM0

(1)

L

Coilcraft LPS3015-102ML 3.0 x 3.0 x 1.5 mm

1.0 µH

3 x 3 x 1.4 mm

TDK-EPC VLS252010ET1R0N 2.5 x 2 x 1 mm

R1 Depending on the output voltage, 0 Ω for fixed output version

R2

1. Inductor used for the maximum power capability. Optimized choice can be done according to the
application conditions (see

Depending on the output voltage, not used for fixed output

version

Section 8

).

Note: All the above components refer to a typical application. Operation of the device is not limited

to the choice of these external components.

Doc ID 022745 Rev 4 3/24

Block diagram STBB2

2 Block diagram

Figure 3. Block diagram adjustable

SW1

SW2

VIN

VINA1

+

-

Σ

FB

-

EA

+

VREF and

Soft start

GND

Figure 4. Block diagram fixed

VIN

OSC

VSUM

Burst

Control 1

Level shift

Burst

Control 2

+

COMP 1

-

-

SW1

Driv er

LOGIC

CONTROL

+

COMP 2

VSUM

Gate

DMD

VSEL

VOUT

+

-

DMD

UVLO

SHUT

DOWN

OSC

DEVICE

CONTROL

BP

SW2

OTP

OSC

VINA

EN

MODE

BP

VSEL

AM10455v1

VOUT

VINA1

+

VREF and

Soft start

-

Σ

OSC

VSUM

-

EA

+

Burst

Contr ol 1

Level shift

Burst

Control 2

+

COMP 1

-

-

FB

VSEL

BP

GND

4/24 Doc ID 022745 Rev 4

Gate
Driver

LOGIC

CONTROL

+

COMP 2

VSUM

DMD

VSEL

+

-

DMD

UVLO

SHUT

DOWN

OSC

DEVICE

CONTROL

BP

OTP

OSC

VINA

EN

MODE

BP

VSEL

AM10456v1

STBB2 Absolute maximum ratings

3 Absolute maximum ratings

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

VIN, VINA, VINA1 Supply voltage -0.3 to 7.0 V

SW1,SW2 Switching nodes -0.3 to 7.0 V

VOUT Output voltage -0.3 to 7.0 V

MODE, EN, BP, VSEL Logic pins -0.3 to 7.0 V

FB Feedback pin -0.3 to 6.0 V

ESD

T

AMB

T

T

STG

J

Human body model ± 2000

V

Charged device model ± 500

Operating ambient temperature -40 to 85 °C

Maximum operating junction temperature 150 °C

Storage temperature -65 to 150 °C

Note: Absolute maximum ratings are those values beyond which damage to the device may occur.

Functional operation under these conditions is not implied.

Table 4. Thermal data

Symbol Parameter Value Unit

R

thJA

1. PCB condition: JEDEC standard 2s2P(4-layer).

Thermal resistance junction-ambient 80

(1)

°C/W

Doc ID 022745 Rev 4 5/24

Pin configuration STBB2

4 Pin configuration

Figure 5. Pin connections (top view)

A4

[EN]

A3

[VINA]

A2

[VIN]

A1

[VIN]

B4

[BP]

B3

[VINA1]

B2

[SW1]

B1

[SW1]

C4

[MODE]

C3

[GND]

C2

[PGND]

C1

[PGND]

D4

[VSEL]

D3

[GND]

D2

[SW2]

D1

[SW2]

E4

[GND]

E3

[FB]

E2

[VO]

E1

[VO]

A1

A1

[VIN]

[VIN]

A2

A2

[VIN]

[VIN]

A3

A3

[VINA]

[VINA]

A4

A4

[EN]

[EN]

TOP VIEW

Table 5. Pin description

Pin name Pin n° Description

VOUT E1, E2 Output voltage

SW2 D1, D2

Switch pin - internal switches C and D are connected to this pin. Connect inductor
between SW1 to SW2

PGND C1, C2 Power ground

SW1 B1, B2

Switch Pin - internal switches A and B are connected to this pin. Connect inductor
between SW1 and SW2

B1

B1

[SW1]

[SW1]

B2

B2

[SW1]

[SW1]

B3

B3

[VINA1]

[VINA1]

B4

B4

[BP]

[BP]

[MODE]

[MODE]

BOTTOM VIEW

C1

C1

[PGND]

[PGND]

C2

C2

[PGND]

[PGND]

C3

C3

[GND]

[GND]

C4

C4

D1

D1

[SW2]

[SW2]

D2

D2

[SW2]

[SW2]

D3

D3

[GND]

[GND]

D4

D4

[VSEL]

[VSEL]

E1

E1

[VO]

[VO]

E2

E2

[VO]

[VO]

E3

E3

[FB]

[FB]

E4

E4

[GND]

[GND]

EN A4

Enable pin. Connect this pin to GND or a voltage lower than 0.4 V to shut down the IC. A
voltage higher than 1.2 V is required to enable the IC. Do not leave this pin floating.

When in normal operation, the MODE pin selects between auto mode and forced PWM

MODE C4

mode. If the MODE pin is low, the STBB2 automatically switches between pulse-skipping
and standard PWM according to the load level. If the MODE pin is pulled high, the STBB2
works always in PWM mode. Do not leave this pin floating.

VINA A3 Supply voltage for control stage.

A 100 Ω resistor is internally connected between VIN and VINA1. Connecting a 1 µF

VINA1 B3

capacitor between VINA1 and GND, an input filter is realized suitable to provide a clean
supply to VINA.

VIN A1, A2

Power input voltage. Connect a ceramic bypass capacitor (10 µF min.) between this pin
and PGND

GND C3, D3, E4 Signal ground

FB E3 Feedback voltage. For the fixed version this pin must be connected to VOUT.

Bypass mode selection.

BP B4

When EN is high, connecting this pin to a voltage higher than 1.2 V, the device works in
bypass mode. A voltage lower than 0.4 V is required to disable bypass mode. In bypass
mode VIN is shorted to VOUT through the internal switches. Do not leave this pin floating.

VSEL D4

Selection of output voltage for fixed versions (0 V

= 2.9 V / 1 V

OUT

This feature is not present in the adjustable version where the VSEL pin must be

OUT

= 3.4 V).

connected to VINA. Do not leave this pin floating.

6/24 Doc ID 022745 Rev 4

STBB2 Electrical characteristics

5 Electrical characteristics

- 40 °C < TA < 85 °C, VIN = 3.6 V; V

= 25 °C, unless otherwise specified.

T

A

Table 6. Electrical characteristics

= 3.4 V, VEN = VIN, VBP = 0 V; typical values are at

OUT

Symbol Parameter Test conditions Min. Typ. Max. Unit

General section

V

V

UVLO

f

I

OUT

I

I

PS-PWM

Operating power input voltage

IN

range

Shutdown mode V

Pulse-skipping I

Iq

PWM mode I

Bypass mode

Undervoltage lockout threshold

Switching frequency 2 2.5 3 MHz

SW

Continuous output current

Switch current limitation 2.3 2.5 2.7 A

PK

(1)

PS to PWM transition V

= 0 V 0.5 2 µA

EN

= 0 A, V

OUT

= 0 A, V

OUT

V

= VIN; I

BP

V

= 0, V

MODE

rising; V

V

IN

I

= 100 mA

OUT

VIN falling; V
I

= 100 mA

OUT

2.5 V ≤ V

IN

IN

= 3.6 V 100

= 0 35 50 µA

MODE

= V

MODE

OUT

IN

MODE

MODE

IN

= 0 A;

= 2.3 to 5.5 V

= V

IN;

= V

IN;

≤ 5.5 V 800 mA

2.3 5.5 V

810mA

510µA

1.6 2.2

1.5 2

PWM to PS transition 80

V

mA

Efficiency

η

(V

IN

ON

Tu r n- on t im e

T

Thermal shutdown 150 °C

T

SHDN

Hysteresis 20 °C

Output voltage

V

Output voltage range 1.2 4.5 V

OUT

Output voltage accuracy in PWM
mode

%V

OUT

Output voltage accuracy in power
save mode

= 3.6 V; V

(2)

OUT

= 3.4 V)

I

=1 0 mA (PS mode) 85

OUT

I

= 50 mA (PS mode) 90

OUT

= 150 mA (PWM) 90

I

OUT

I

= 250 mA (PWM) 91

OUT

I

= 500 mA (PWM) 92

OUT

= 800 mA (PWM) 92

I

OUT

VEN from low to high;

= 10 mA

I

OUT

V

= 2.5 to 5.5 V,

IN

= VIN V

V

MODE

V

= 2.5 to 5.5 V, V

IN

V

= GND/VIN suitable output

SEL

= GND/V

SEL

MODE

IN

= GND

-1.5 +1.5 %

260 300 µs

-3 +3 %

%

current to keep PS operation

Doc ID 022745 Rev 4 7/24

Electrical characteristics STBB2

Table 6. Electrical characteristics (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

%V

V

OPP-PS

I

LKFB

Feedback voltage accuracy Adj version 493 500 507 mV

FB

Maximum load regulation I

OUT

Peak-to-peak ripple in PS mode I

FB pin leakage current V

= from 10 mA to 800 mA ±0.5 %

LOAD

= 100 mA 100 mV

OUT

= 5.5 V 9 µA

FB

Logic inputs

V

V

I

LK-I

Low-level input voltage (EN,

IL

MODE, BP, VSEL pins)

High-level input voltage (EN,

IH

MODE, BP, VSEL pins)

Input leakage current (EN,
MODE, BP, VSEL pins)

V

EN=VMODE=VBP=VSEL

1.2 V

= 5.5 V 0.01 1 µA

0.4 V

Power switches

P-channel on-resistance 130 350 mΩ

R

DSON

I

LKG-P

I

LKG-N

1. Not tested in production. This value is guaranteed by correlation with rds_on, peak current limit and operating input voltage.

2. Not tested in production.

N-channel on-resistance 130 350 mΩ

P-channel leakage current V

N-channel leakage current V

= V

IN

SW1

OUT

= V

= 5.5 V; V

= 5.5 V; V

SW2

= 0 1 µA

EN

= 0 1 µA

EN

8/24 Doc ID 022745 Rev 4

STBB2 Typical performance characteristics

6 Typical performance characteristics

Table 7. Table of graphs

Maximum output

current

vs. input voltage

Figure 5

Efficiency

Waveforms

vs. output current (power save enabled, VIN = 2.5 V, 3.6 V, 4.5 V/V

vs. output current (power save disabled, V

vs. output current (power save enabled, V

vs. output current (power save disabled, V

vs. input voltage power save enabled, V

= 2.5 V, 3.6 V, 4.5 V/V

OUT

= 2.5 V, 3.6 V, 4.5 V/V

IN

= 2.5 V, 3.6 V, 4.5 V/V

OUT

= 3.4 V, I

OUT

OUT

= (10; 50; 150; 500;

800 mA}

vs. input voltage power save disabled, V

OUT

= 3.4 V, I

= (10; 500; 1000; 2000

OUT

mA)

3vs. output current (PWM/Auto mode)

Load transient response V

Load transient response VIN > V

Line transient response (V

Startup after enable (V

Startup after enable (V

< V

IN

OUT

OUT

= 3.3 V, I

OUT

= 3.3 V, VIN = 2.3 V, I

OUT

= 3.3 V, VIN = 4.2 V, I

OUT

= 1500 mA)

OUT

= 300 mA)

OUT

= 300 mA)

OUT

Figure 6. Maximum output current vs. input voltage

2200

2000

1800

1600

1400

1200

max [mA]

1000

OUT

I

800

600

400

200

0

22.533.5 4 4.5 5 5.5

VIN[V]

= 3.4 V)

OUT

OUT

= 2.9 V)

OUT

OUT

VOUT = 2.9 V

VOUT = 3.4 V

= 3.4 V)

= 2.9 V)

AM10444v1

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Figure 14

Figure 15

Figure 16

Figure 17

Doc ID 022745 Rev 4 9/24

Typical performance characteristics STBB2

Figure 7. Efficiency vs. output current (power save mode enabled V

= 3.4 V

OUT

Vin = 2.5 V

Vin = 3.6 V

Vin = 4.5 V

AM10436v1

100

90

80

70

60

50

Eff [%]

40

30

20

10

Power save mode enabled

0

1 10 100 1000

I

[mA]

OUT

V

Figure 8. Efficiency vs. output current (power save mode disabled V

V

OUT

Vin = 2.5V

Vin = 3.6V

Vin = 4.5V

AM10437v1

= 3.4 V

100

90

80

70

60

50

Eff [%]

40

30

20

10

0

1 10 100 1000

Power save mode disabled

I

OUT

[mA]

OUT

OUT

= 3.4 V)

= 3.4 V)

Figure 9. Efficiency vs. output current (power save mode enabled V

100

90

80

70

60

50

Eff [%]

40

30

20

10

0

10/24 Doc ID 022745 Rev 4

Power save mode enabled

1 10 100 1000

I

OUT

[mA]

V

OUT

AM10438v1

= 2.9 V

Vin = 2.5V

Vin = 3.6V

Vin = 4.5V

OUT

= 2.9 V)

STBB2 Typical performance characteristics

Figure 10. Efficiency vs. output current (power save mode disabled V

100

90

80

70

60

50

Eff [%]

40

30

20

10

0

1 10 100 1000

Power save mode disabled

I

[mA]

OUT

V

Table 8. Efficiency vs. input voltage (power save enabled, V

100

90

80

70

60

50

Eff [%]

40

30

20

Power save mode

10

0

2.5 3.0 3.5 4.0 4.5 5.0 5. 5

VIN[V]

V

AM10439v1

= 2.9 V

OUT

Vin=2.5V

Vin=3.6V

Vin=4.5V

= 3.4 V)

OUT

AM10440v1

= 3.4 V

OUT

Iout = 10 mA
Iout = 50 mA
Iout = 150 mA
Iout = 500 mA
Iout = 800 mA

OUT

= 2.9 V)

Figure 11. Efficiency vs. input voltage (power save disabled, V

100

90

80

70

60

50

Eff [%]

40

30

20

10

Iout=10 mA

Iout=50 mA

Iout =150 mA

Iout=500 mA

Iout=800 mA

0

2.5 3.0 3.5 4.0 4.5 5.0 5.5

Power save mode

VIN[V]

Doc ID 022745 Rev 4 11/24

V

OUT

OUT

AM10441v1

= 3.4 V

= 3.4 V)

Typical performance characteristics STBB2

Figure 12. Efficiency vs. output current (PWM / auto mode)

100

90

80

70

60

50

Eff [%]

40

30

20

10

0

1 10 100 1000

I

OUT

[mA]

Vin=2.5V PWM mode

Vin=2.5V Auto mode

AM10442v1

V

= 3.4 V

OUT

Figure 13. V

Figure 14. V

= 2.4 V, V

IN

= 4.2 V, V

IN

= 3.4 V, I

OUT

V

= 3.4 V

OUT

= 3.4 V, I

OUT

V

= 3.4 V

OUT

= from 80 mA to 630 mA

OUT

Input voltage 200 mV/div,
DC Offset 2.46

Output Voltage

200 mV/div

Output Current
500 mA/div

Time base 1 msec

= from 80 mA to 1100 mA

OUT

Input voltage
200 mV/div, DC offset 4.2 V

Output Voltage
200 mV/div, AC

, AC

Time base 1 msec

12/24 Doc ID 022745 Rev 4

Output Current
500 mA/div

STBB2 Typical performance characteristics

Figure 15. V

= from 3.6 V to 4 V, V

IN

Input Voltage 400 mV/div,
Offset = 3.6 V

Output voltage
20 mV/div

Figure 16. Startup after enable (V

SW2

SW1

= 3.4 V, I

OUT

Timebase 1 msec

= 3.3 V, VIN = 2.4 V, I

OUT

OUT

= 300 mA

OUT

= 300 mA)

V

OUT

I

SW

Figure 17. Startup after enable (V

SW2

SW1

V

OUT

I

SW

= 3.3 V, VIN = 4.2 V, I

OUT

= 300 mA)

OUT

Doc ID 022745 Rev 4 13/24

General description STBB2

7 General description

The STBB2 is a high efficiency dual mode buck-boost switch mode converter. Thanks to the
4 internal switches, 2 P-channels and 2 N-channels, it is able to deliver a well-regulated
output voltage using a variable input voltage which can be higher than, equal to, or lower
than the desired output voltage. This solves most of the power supply problems that circuit
designers face when dealing with battery powered equipment.

The controller uses an average current mode technique in order to obtain good stability in all
possible conditions of input voltage, output voltage and output current. In addition, the peak
inductor current is monitored to avoid saturation of the coil.

The STBB2 can work in two different modes: PWM mode or power save mode. In the first
case the device operates with a fixed oscillator frequency in all line/load conditions. This is
the suitable condition to obtain the maximum dynamic performance. In the second case the
device operates in burst mode allowing a drastic reduction of power consumption.

Top-class line and load transients are achieved thanks to a feed-forward technique and due
to the innovative control method specifically designed to optimize the performances in the
buck-boost region where input voltage is very close to the output voltage.

The STBB2 is self-protected from short-circuit and overtemperature. Undervoltage lockout
and soft-start guarantee proper operation during startup.

Input voltage and ground connections are split into power and signal pins. This allows
reduction of internal disturbances when the 4 internal switches are working. The switch
bridge is connected between the V
between V

and GND.

INA

7.1 Dual mode operation

The STBB2 works at fixed frequency pulse width modulation (PWM) or in power save mode
(PS) according to the different operating conditions. If the MODE pin is pulled high the
device works only at fixed frequency pulse width modulation (PWM) even at light or no load.
In this condition, the STBB2 provides the best dynamic performance. If the MODE pin is
logic low, the STBB2 operation changes according to the average input current handled by
the device. At low average current the STBB2 enters into PS mode allowing very low power
consumption and therefore obtaining very good efficiency event at light load. When the
average current increases, the device automatically switches to fixed switching frequency
mode in order to deliver the power needed by the load. In PS mode the STBB2 implements
a burst mode operation: if the output voltage increases above its nominal value the device
stops switching; as soon the V
switching.

7.2 Enable pin

The device turns on when the EN pin is pulled high. If the EN pin is low the device goes into
shutdown mode and all the internal blocks are turned off. In shutdown mode the load is
electrically disconnected from the input to avoid unwanted current leakage from the input to
the load and the current drawn from the battery is lower than 1 µA in the whole temperature
range.

and PGND pins while all logic blocks are connected

IN

falls below the nominal value the device restarts

OUT

14/24 Doc ID 022745 Rev 4

STBB2 General description

7.3 Bypass operation

In bypass mode the output is connected directly to the battery by the two P-channels and
the inductor. The bypass function has been implemented in order to save energy when the
application is in idle mode. At light load condition it is possible to put the device into bypass
mode to reduce the current drained from the battery. In bypass mode the quiescent current
is around 5 µA. Without bypass function, the buck-boost would work in pulse-skipping mode
with around 50 µA of current consumption. The device can be placed in bypass mode by the
BYP pin.

Table 9. Bypass and enable matrix

EN BP MODE Status

00 0 Shutdown

00 1 Shutdown

01 0 Shutdown

01 1 Shutdown

1 0 0 Auto mode

10 1 PWM mode

11 0 Bypass

11 1 Bypass

7.4 VSEL pin operation

For the fixed output voltage version the FB pin must be connected to the V
fixed output voltage versions have two different output voltages programmed internally
which are selected by programming high or low at VSEL. The higher output voltage is
selected by programming VSEL high and the lower output voltage is selected by
programming VSEL low. This feature is not present in the adjustable version, where the
VSEL pin must be connected to V

Table 10. Output selection

P/N V

Low 2.9 V

STBB2J-29

High 3.4 V

Low 2.8 V

STBB2J-33

High 3.3 V

SEL

INA

pin. Only the

OUT

.

V

OUT

Doc ID 022745 Rev 4 15/24

General description STBB2

7.5 Protection features

7.5.1 Soft-start and short-circuit

After the EN pin is pulled high, the device initiates the startup phase. The average current
limit is set to 400 mA at the beginning and is gradually increased while the output voltage
increases. As soon as the output voltage reaches 1.0 V, the average current limit is set to its
nominal value.

This method allows for a current limit proportional to the output voltage. If there is a short in
the V
timer so the device is also able to start up even with large capacitive loads.

7.5.2 Undervoltage lockout

The undervoltage lockout function prevents improper operation of the STBB2 when the input
voltage is not high enough. When the input voltage is below the VUVLO threshold, the
device is in shutdown mode. The hysteresis of 100 mV prevents unstable operation when
the input voltage is close to the UVLO threshold.

7.5.3 Overtemperature protection

pin, the output current does not exceed 400 mA. This process is not handled by a

OUT

An internal temperature sensor continuously monitors the IC junction temperature. If the IC
temperature exceeds 150 °C (typ.), the device stops operating. As soon as the temperature
falls below 130 °C (typ.), normal operation is restored.

16/24 Doc ID 022745 Rev 4

STBB2 Application information

8 Application information

8.1 Programming the output voltage

The STBB2 is available in two versions: fixed output voltage (STBB2-xx) and adjustable
output voltage (STBB2-x).

In the first case the device integrates the resistor divider needed to set the correct output
voltage and the FB pin must be connected directly to V
possible to select two different output voltages programmed internally by the VSEL pin. For
the adjustable version the VSEL pin must be connected to V
connected between V
FB as shown in

Figure 18

and GND and the middle point of the divider must be connected to

OUT

.

Equation 1

OUT

V

FB

−×= 1

⎞
⎟

⎟
⎠

⎛

V

⎜

2R1R

⎜
⎝

Figure 18. Adjustable output voltage

L1

. Only for the fixed version is it

OUT

. The resistor divider must be

IN

C1

C2

GND GND

A suggested value for R2 is 100 kΩ. To reduce the power consumption a maximum value of
500 kΩ can be used.

8.2 Inductor selection

The inductor is the key passive component for switching converters. With a buck-boost
device, the inductor selection must take into consideration the following two conditions in
which the converter works:

● as buck at the maximum operative input voltage of the application

● as a boost at the minimum operative input voltage of the application.

B1

SW1

B2

SW1

A1

VIN

A2

VIN

A3

VINA

VINA1

EN

BP

MOD E

VSEL

STBB2

GND GND

B3

A4

B4

C4

D4

SW2
SW2

VOUT
VOUT

PGND
PGND

GND
GND
GND

D1
D2

E1
E2

E3

FB

C1
C2

C3
D3
E4

GND GND

GND

R1

C4

C3

R2

GND

AM10443v1

Two critical inductance values are then obtained according to the following formulas:

Equation 2

Doc ID 022745 Rev 4 17/24

Application information STBB2

−×

L

−

=

BUCKMIN

MAX

Δ××

)VOUTVIN(VOUT

IfsVIN

LMAX

Equation 3

L

BOOSTMIN

−

MIN

=

−×

Δ××

where fs is the minimum value of the switching frequency and ΔI

)VINVOUT(VIN

MIN

IfsVOUT

L

is the peak-to-peak

L

inductor ripple current. As a rule of thumb, the peak-to-peak ripple can be set at 10% or 20%
of the output current.

The minimum inductor value for the application is the higher between

Equation 3

. In addition to the inductance value, also the maximum current which the

Equation 2

and

inductor can handle must be calculated in order to avoid saturation.

Equation 4

−×

)/I(I

−

OUTBUCKPEA K

+η=

MAX

MAX

)VOUTVIN(VOUT

LfsVIN2

×××

Equation 5

IVOUT

×

I

−

=

BOOSTPEAK

OUT

VIN

×η

+

MIN

−×

)VINVOUT(VIN

MINMIN

LfsVOUT2

×××

where η is the estimated efficiency. The maximum of the two values above must be
considered when selecting the inductor.

8.3 Input and output capacitor selection

It is recommended to use ceramic capacitors with low ESR as input and output capacitors in
order to filter any disturbance present in the input line and to obtain stable operation.

Minimum values of 10 µF for both capacitors are needed to achieve good behavior of the
device. The input capacitor must be placed as close as possible to the device.

8.4 Layout guidelines

Due to the high switching frequency and peak current, the layout is an important design step
for all switching power supplies. If the layout is not done carefully, important parameters
such as efficiency and output voltage ripple may be compromised.

Short and wide traces must be implemented for main current and for power ground paths.
The input capacitor must be placed as close as possible to the device pins as well as the
inductor and output capacitor.

The feedback pin (FB) is a high impedance node, so the interference can be minimized by
placing the routing of the feedback node as far as possible from the high current paths. A
common ground node minimizes ground noise.

18/24 Doc ID 022745 Rev 4

STBB2 Application information

8.5 Demonstration board

Figure 19. Assembly layer

Figure 20. Top layer

Figure 21. Bottom layer

Doc ID 022745 Rev 4 19/24

Application information STBB2

8.6 Thermal consideration

To enhance the thermal performance it is recommended to improve the power dissipation
capability of the PCB design by traces that are as wide as possible. The maximum
recommended junction temperature (T
thermal resistance of this 20-pin WLCSP package is 80 °C/W, if all pins are soldered.

) of the devices is 125 °C. The junction ambient

J

To the maximum ambient temperature T
package is given by:

Equation 6

P

DISS_MAX

= (T

JMAX

- T

) / RJA = (125 - 85) / 80 = 500 mW

AMAX

= 85 °C the maximum power dissipated inside the

A

20/24 Doc ID 022745 Rev 4

STBB2 Package mechanical data

9 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of

®

ECOPACK

packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com. ECOPACK
is an ST trademark.

Table 11. Flip Chip 20 (2.1 x 1.8 mm) mechanical data

mm.

Dim.

Min. Typ. Max.

A 0.52 0.56 0.60

A1 0.17 0.20 0.23

A2 0.35 0.36 0.37

b 0.23 0.25 0.29

D 2.033 2.053 2.083

D1 1.6

E 1.701 1.731 1.761

E1 1.2

e0.4

fD 0.2

fE 0.227

SE 0.266

ccc 0.075

Doc ID 022745 Rev 4 21/24

Package mechanical data STBB2

Figure 22. Flip Chip 20 (2.1 x 1.8 mm) package dimensions

7504889_G

22/24 Doc ID 022745 Rev 4

STBB2 Revision history

10 Revision history

Table 12. Document revision history

Date Revision Changes

27-Jan-2012 1 First release.

27-Mar-2012 2

09-May-2012 3

26-Jul-2012 4

Datasheet promoted from preliminary data to production data.
Removed: order code STBB2J28-R

Modified: marking BB2

on page 6

Modified: C2 value
Updated:

.

Figure 19, Figure 20

Table 1 on page 1

Table 2 on page 3

Table 1 on page 1

, description pin B4 and D4

.

and

Figure 21 on page 19

.

.

Ta b l e 5

Doc ID 022745 Rev 4 23/24

STBB2

Please Read Carefully:

Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.

All ST products are sold pursuant to ST’s terms and conditions of sale.

Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.

No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.

UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.

UNLESS EXPRESSLY APPROVED IN WRITING BY TWO AUTHORIZED ST REPRESENTATIVES, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.

Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.

ST and the ST logo are trademarks or registered trademarks of ST in various countries.

Information in this document supersedes and replaces all information previously supplied.

The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.

© 2012 STMicroelectronics - All rights reserved

STMicroelectronics group of companies

Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -

Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America

www.st.com

24/24 Doc ID 022745 Rev 4