Datasheet STCN75 Datasheet (ST)

Digital temperature sensor and thermal watchdog

Features

■ Measures temperatures from –55 °C to

+125 °C (–67 °F to +257 °F)
–

±0.5 °C (typ) accuracy

–

±2 °C (max) accuracy from –25 °C to

+100

°C

■ Low operating current:125 µA (typ)

■ No external components required

■ 2-wire I

– Selectable bus address allows connection

■ Wide power supply range - operating voltage

range: 2.7 V to 5.5 V

■ Conversion time is 45 ms (typ)

■ Programmable temperature threshold and

hysteresis set points

■ Pin- and software-compatible with TCN75

(drop-in replacement)

■ Power-up defaults permit standalone operation

as a thermostat

■ Shutdown mode to minimize power

consumption

■ Output pin (open drain) can be configured for

interrupt or comparator/thermostat mode (dual
purpose event pin)

■ MSOP8 (TSSOP8) package

2

C/SMBus-compatible serial interface

of up to eight devices on the bus

STCN75

Datasheet − production data

MSOP8

(TSSOP8)

March 2012 Doc ID 13307 Rev 9 1/36

This is information on a product in full production.

www.st.com

1

Contents STCN75

Contents

1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.1 Serial communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.2 Temperature sensor output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.3 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

1.3.1 SDA (open drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

1.3.2 SCL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

1.3.3 OS

1.3.4 GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.3.5 A2, A1, A0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.3.6 V

2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.1 Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

/INT (open drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

DD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.2 Thermal alarm function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.3 Comparator mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.4 Interrupt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.5 Fault tolerance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.6 Shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.7 Temperature data format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.1 Registers and register set formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.1.1 Command/pointer register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.1.2 Configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.1.3 Temperature register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.1.4 Overlimit temperature register (T

3.1.5 Hysteresis temperature register (T

3.2 Power-up default conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.3 Serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.4 2-wire bus characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

) . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

OS

) . . . . . . . . . . . . . . . . . . . . . . . . . 18

HYS

3.4.1 Bus not busy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.4.2 Start data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.4.3 Stop data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2/36 Doc ID 13307 Rev 9

STCN75 Contents

3.4.4 Data valid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.4.5 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.5 READ mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.6 WRITE mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

4 Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

5 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

6 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

8 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Doc ID 13307 Rev 9 3/36

List of tables STCN75

List of tables

Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 2. Fault tolerance setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 3. Relationship between temperature and digital output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 4. Command/pointer register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 5. Register pointers selection summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 6. Configuration register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 7. Temperature register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 8. T

Table 9. STCN75 serial bus slave addresses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Table 10. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 11. Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Table 12. DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Table 13. AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Table 14. MSOP8 (TSSOP8) – 8-lead, thin shrink small outline (3 mm x 3 mm) package

Table 15. Carrier tape dimensions for MSOP8 (TSSOP8) package. . . . . . . . . . . . . . . . . . . . . . . . . . 32

Table 16. Reel dimensions for 12 mm carrier tape - MSOP8 (TSSOP8) package . . . . . . . . . . . . . . . 33

Table 17. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Table 18. Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

and T

OS

mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

HYS

4/36 Doc ID 13307 Rev 9

STCN75 List of figures

List of figures

Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 2. Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 3. Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 4. Typical 2-wire interface connections diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 5. Serial bus data transfer sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 6. Acknowledgement sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 7. Slave address location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 8. Typical 2-byte READ from preset pointer location (e.g. temp - T

Figure 9. Typical pointer set followed by an immediate READ for 2-byte register (e.g. temp). . . . . . 22

Figure 10. Typical 1-byte READ from the cofiguration register with preset pointer . . . . . . . . . . . . . . . 22

Figure 11. Typical pointer set followed by an immediate READ from the configuration register . . . . . 23

Figure 12. Configuration register WRITE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 13. T

OS

and T

WRITE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

HYS

Figure 14. Temperature variation vs. voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 15. Bus timing requirements sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 16. MSOP8 (TSSOP8) – 8-lead, thin shrink small outline (3 mm x 3 mm) package

mechanical drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 17. Carrier tape for MSOP8 (TSSOP8) package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 18. Reel schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

OS

, T

) . . . . . . . . . . . . 22

HYS

Doc ID 13307 Rev 9 5/36

Description STCN75

1 Description

The STCN75 is a high-precision digital CMOS temperature sensor IC with a sigma-delta

temperature-to-digital converter and an I

for general applications such as personal computers, system thermal management,

electronics equipment, and industrial controllers, and is packaged in the industry-standard

8-lead TSSOP package.

The device contains a bandgap temperature sensor and 9-bit ADC which monitor and

digitize the temperature to a resolution up to 0.5 °C. The STCN75 is typically accurate to

(±3 °C - max) over the full temperature measurement range of –55 °C to 125 °C with ±2 °C

accuracy in the –25 °C to +100 °C range. The STCN75 is pin-for-pin and software

compatible with the TCN75.

The STCN75 is specified for operating at supply voltages from 2.7 V to 5.5 V. Operating at

3.3 V, the supply current is typically (125 µA).

The onboard sigma-delta analog-to-digital converter (ADC) converts the measured

temperature to a digital value that is calibrated in degrees centigrade; for Fahrenheit

applications a lookup table or conversion routine is required.

The STCN75 is factory-calibrated and requires no external components to measure

temperature.

1.1 Serial communications

The STCN75 has a simple 2-wire I2C-compatible digital serial interface which allows the

user to access the data in the temperature register at any time. It communicates via the

serial interface with a master controller which operates at speeds up to 400 kHz. Three pins

(A0, A1, and A2) are available for address selection, and enable the user to connect up to 8

devices on the same bus without address conflict.

2

C-compatible serial digital interface. It is targeted

In addition, the serial interface gives the user easy access to all STCN75 registers to

customize operation of the device.

6/36 Doc ID 13307 Rev 9

STCN75 Description

1.2 Temperature sensor output

The STCN75 Temperature Sensor has a dedicated open drain overlimit signal/interrupt

(OS

/INT) output which features a thermal alarm function. This function provides a user­programmable trip and turn-off temperature. It can operate in either of two selectable
modes:

● Section 2.3: Comparator mode

● Section 2.4: Interrupt mode.

At power-up the STCN75 immediately begins measuring the temperature and converting
the temperature to a digital value.

The measured temperature value is compared with a temperature limit (which is stored in
the 16-bit (T
the 16-bit (T
OS

/INT pin is activated (see Figure 3 on page 8).

Note: See Pin descriptions on page 8 for details.

Figure 1. Logic diagram

) READ/WRITE register), and the hysteresis temperature (which is stored in

OS

) READ/WRITE register). If the measured value exceeds these limits, the

HYS

V

DD

SDA

(1)

OS/INT

SCL

A

0

A

1

A

2

STCN75

GND

1. SDA and OS/INT are open drain.

Table 1. Signal names

Pin Sym Type/direction Description

1SDA

(1)

Input/output Serial data input/output

2 SCL Input Serial clock input

3OS/INT

(1)

Output Overlimit signal/interrupt alert output

4 GND Supply ground Ground

5A

6A

7A

8V

1. SDA and OS/INT are open drain.

2

1

0

DD

Input Address2 input

Input Address1 input

Input Address0 input

Supply power Supply voltage (2.7 V to 5.5 V)

(1)

AI11899

Doc ID 13307 Rev 9 7/36

Description STCN75

Figure 2. Connections

(1)

SDA

SCL

OS/INT

(1)

GND

1. SDA and OS/INT are open drain.

Figure 3. Functional block diagram

Temperature

Sensor and
Analog-to-Digital
Converter (ADC)

S-D

V

DD

A

0

A

1

Configuration Register

Temperature Register

THYS Set Point Register

TOS Set Point Register

2-wire I2C Interface

8

1
2
3
4

V

DD

7

A

0

6

A

1

5

A

2

Pointer Register

Control and Logic

Comparator

AI11841

OS/INT

SDA

A

2

1.3 Pin descriptions

See Figure 1 on page 7 and Table 1 on page 7 for a brief overview of the signals
connected to this device.

1.3.1 SDA (open drain)

This is the serial data input/output pin for the 2-wire serial communication port.

1.3.2 SCL

This is the serial clock input pin for the 2-wire serial communication port.

1.3.3 OS/INT (open drain)

This is the overlimit signal/interrupt alert output pin. It is open drain, so it needs a pull-up
resistor. In Interrupt mode, it outputs a pulse whenever the measured temperature exceeds
the programmed threshold (T
the measured temperature is above or below the threshold and hysteresis (T

SCL

GND

). It behaves as a thermostat, toggling to indicate whether

OS

HYS

).

AI11833a

8/36 Doc ID 13307 Rev 9

STCN75 Description

1.3.4 GND

Ground; it is the reference for the power supply. It must be connected to system ground.

1.3.5 A2, A1, A0

A2, A1, and A0 are selectable address pins for the 3 LSBs of the I2C interface address.
They can be set to V

or GND to provide 8 unique address selections.

DD

1.3.6 V

DD

This is the supply voltage pin, and ranges from +2.7 V to +5.5 V.

Doc ID 13307 Rev 9 9/36

Operation STCN75

2 Operation

After each temperature measurement and analog-to-digital conversion, the STCN75 stores
the temperature as a 16-bit two’s complement number (see Table 5: Register pointers

selection summary on page 16) in the 2-byte temperature register (see Table 7 on page 17).

The most significant bit (S) indicates if the temperature is positive or negative:

● for positive numbers S = 0, and

● for negative numbers S = 1.

The most recently converted digital measurement can be read from the temperature register
at any time. Since temperature conversions are performed in the background, reading the
temperature register does not affect the operation in progress.

The temperature data is provided by the 9 MSBs (bits 15 through 7). Bits 6 through 0 are
unused. Table 3 on page 14 gives examples of the digital output data and corresponding
temperatures. The data is compared to the values in the T
the OS

/INT is updated based on the result of the comparison and the operating mode.

The alarm fault tolerance is controlled by the FT1 and FT0 bits in the configuration register.
They are used to set up a fault queue. This prevents false tripping of the OS
the STCN75 is used in a noisy environment (see Table 2 on page 13).

OS

and T

registers, and then

HYS

/INT pin when

The active state of the OS

/INT output can be changed via the polarity bit (POL) in the

configuration register. The power-up default is active-low.

If the user does not wish to use the thermostat capabilities of the STCN75, the
OS

/INToutput should be left floating.

Note: If the thermostat is not used, the T

system data.

OS

and T

registers can be used for general storage of

HYS

10/36 Doc ID 13307 Rev 9

STCN75 Operation

2.1 Applications information

STCN75 digital temperature sensors are optimal for thermal management and thermal
protection applications. They require no external components for operations except for pull­up resistors on SCL, SDA, and OS
recommended. The sensing device of STCN75 is the chip itself. The typical interface
connection for this type of digital sensor is shown in Figure 4 on page 11.

Intended applications include:

● System thermal management

● Computers/disk drivers

● Electronics/test equipment

● Power supply modules

● Consumer products

● Battery management

● Fax/printers management

● Automotive

Figure 4. Typical 2-wire interface connections diagram

/INT outputs. A 0.1 µF bypass capacitor on VDD is

Pull-up

V

DD

10kΩ

1. SDA and OS/INT are open drain.

STCN75

O.S./INT

A

0

A

1

A

2

(1)

SDA

2.2 Thermal alarm function

The STCN75 thermal alarm function provides user-programmable thermostat capability and
allows the STCN75 to function as a standalone thermostat without using the serial interface.
The OS
this pin is configured with active-low polarity by default.

/INT output is the alarm output. This signal is an open drain output, and at power-up,

V

DD

SCL

(1)

GND

0.1µF

V

DD

Pull-up

V

DD

10kΩ 10kΩ

I2C Address = 1001000 (1001A2A1A0)

Master

Device

AI12200

Doc ID 13307 Rev 9 11/36

Operation STCN75

2.3 Comparator mode

In comparator mode, each time a temperature-to-digital (T-to-D) conversion occurs, the new
digital temperature is compared to the value stored in the T
tolerance number of consecutive temperature measurements are greater than the value
stored in the T

register, the OS/INT output will be asserted.

OS

For example, if the FT1 and FT0 bits are equal to “10” (fault tolerance = 4), four consecutive
temperature measurements must exceed T
OS

/INT output is active, it will remain active until the first time the measured temperature

drops below the temperature stored in the T

to activate the OS/INT output. Once the

OS

register, whereupon it will reset to its

HYS

inactive state.

OS

and T

registers. If a fault

HYS

Putting the device into shutdown mode does not clear OS

2.4 Interrupt mode

In interrupt mode, the OS/INT output becomes active when the measured temperature
exceeds the T
bits (FT1, FT0) value in the configuration register. Once activated, the OS
cleared by reading from any register (temperature, configuration, T
device. Once the OS
measured temperature falls below the T
the FT value. This mode is better suited for interrupt driven microprocessor based systems.

value a consecutive number of times as determined by the fault tolerance

OS

/INT in comparator mode.

/INT can only be

OS

, or T

HYS

) on the

/INT has been deactivated, it will only be reactivated when the

value a consecutive number of times equal to

HYS

12/36 Doc ID 13307 Rev 9

STCN75 Operation

2.5 Fault tolerance

For both comparator and interrupt modes, the alarm “fault tolerance” setting plays a role in
determining when the OS
of consecutive times an error condition must be detected before the user is notified. Higher
fault tolerance settings can help eliminate false alarms caused by noise in the system. The
alarm fault tolerance is controlled by the bits (4 and 3) in the configuration register. These
bits can be used to set the fault tolerance to 1, 2, 4, or 6 as shown in Ta b le 2 . At power-up,
these bits both default to logic '0'.

Table 2. Fault tolerance setting

FT1 FT0 STCN75 (consecutive faults) Comments

0 0 1 Power-up default

01 2

10 4

11 6

/INT output will be activated. Fault tolerance refers to the number

Note: OS output will be asserted one t

condition remains.

2.6 Shutdown mode

For power-sensitive applications, the STCN75 offers a low-power shutdown mode. The SD
bit in the configuration register controls shutdown mode. When SD is changed to logic '1,'
the conversion in progress will be completed and the result stored in the temperature
register, after which the STCN75 will go into a low-power standby state. The OS
will be cleared if the thermostat is operating in Interrupt mode and the OS
unchanged in comparator mode. The 2-wire interface remains operational in shutdown
mode, and writing a '0' to the SD bit returns the STCN75 to normal operation.

after fault tolerance is met, provided that the error

CONV

/INT will remain

/INT output

Doc ID 13307 Rev 9 13/36

Operation STCN75

2.7 Temperature data format

Ta bl e 3 shows the relationship between the output digital data and the external temperature.

Temperature data for the temperature, T
two’s complement word.

The left-most bit in the output data stream contains temperature polarity information for
each conversion. If the sign bit is '0', the temperature is positive and if the sign bit is '1,' the
temperature is negative.

Table 3. Relationship between temperature and digital output

Temperature

+125 °C 0 1111 1010 0FAh

+25 °C 0 0011 0010 032h

+0.5 °C 0 0000 0001 001h

0 °C 0 0000 0000 000h

–0.5 °C 1 1111 1111 1FFh

–25 °C 1 1100 1110 1CEh

–40 °C 1 1011 0000 1B0h

–55 °C 1 1001 0010 192h

, and T

OS

Binary HEX

registers is represented as a 9-bit,

HYS

Digital output

14/36 Doc ID 13307 Rev 9

STCN75 Functional description

3 Functional description

The STCN75 registers have unique pointer designations which are defined in Tab le 5 o n

page 16. Whenever any READ/WRITE operation to the STCN75 register is desired, the

user must “point” to the device register to be accessed.

All of these user-accessible registers can be accessed via the digital serial interface at
anytime (see Section 3.3: Serial interface on page 19), and they include:

● Command register/address pointer register

● Configuration register

● Temperature register

● Overlimit signal temperature register (T

● Hysteresis temperature register (T

HYS

3.1 Registers and register set formats

3.1.1 Command/pointer register

The most significant bits (MSBs) of the command register must always be zero. Writing a '1'
into any of these bits will cause the current operation to be terminated (bit 2 through bit 7
must be kept '0', see Ta bl e 4 ).

Table 4. Command/pointer register format

)

OS

)

MSB LSB

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0

000000P1P0

These bits must be ‘O’

Pointer/register

select bits

The command register retains pointer information between operations (see Tab le 5 ).
Therefore, this register only needs to be updated once for consecutive READ operations
from the same register. All bits in the command register default to '0' at power-up.

Doc ID 13307 Rev 9 15/36

Functional description STCN75

Table 5. Register pointers selection summary

Pointer

value (H)

00 0 0 TEMP

01 0 1 CONF

02 1 0 T

03 1 1 T

P1 P0 Name Description

Temperature

register

Configuration

register

Hysteresis register 16 R/W 4B00 Default = 75 °C

HYS

Overtemperature

OS

shutdown

Width

(bits)

16

8R/W 00

16 R/W 5000

3.1.2 Configuration register

The configuration register is used to store the device settings such as device operation
mode, OS

The configuration register allows the user to program various options such as thermostat
fault tolerance, thermostat polarity, thermostat operating mode, and shutdown mode. The
user has READ/WRITE access to all of the bits in the configuration register except the MSB
(Bit7), which is reserved as a “Read only” bit (see Ta bl e 6 ). The entire register is volatile and
thus powers-up in its default state only.

Table 6. Configuration register format

/INT operation mode, OS/INT polarity, and OS/INT fault queue.

Typ e

(R/W)

Read-

only

Power-on

default

N/A

Comments

To store measured temperature
data

Set point for overtemperature
shutdown (T

) limit default = 80

OS

°C

MSB LSB

Byte

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0

STCN75 0 0 0 FT1 FT0 POL M SD

Default00000000

Keys: SD = shutdown control bit FT1 = fault tolerance1 bit

(2)

(1)

Bit 5 = must be set to '0'.

Bit 6 = must be set to '0'.

M = thermostat mode

POL = output polarity

FT0 = fault tolerance0 bit Bit 7 = must be set to '0'.

1. Indicates operation mode; 0 = comparator mode, and 1 = interrupt mode (see Section 2.3: Comparator mode and

Section 2.4: Interrupt mode).

2. The OS

is active-low ('0').

16/36 Doc ID 13307 Rev 9

STCN75 Functional description

3.1.3 Temperature register

The temperature register is a two-byte (16-bit) “Read only” register (see Ta bl e 7 ). Digital
temperatures from the T-to-D converter are stored in the temperature register in two’s
complement format, and the contents of this register are updated each time the T-to-D
conversion is finished.

The user can read data from the temperature register at any time. When a T-to-D
conversion is completed, the new data is loaded into a comparator buffer to evaluate fault
conditions and will update the temperature register if a read cycle is not ongoing. If a READ
is ongoing, the previous temperature will be read. Accessing the STCN75 continuously
without waiting at least one conversion time between communications will prevent the
device from updating the temperature register with a new temperature conversion result.
Consequently, the STCN75 should not be accessed continuously with a wait time of less
than t

All unused bits following the digital temperature will be zero. The MSB position of the
temperature register always contains the sign bit for the digital temperature, and bit 14
contains the temperature MSB. All bits in the temperature register default to zero at power­up.

Table 7. Temperature register format

Bytes HS byte LS byte

CONV

(max).

(1)

MSB TMSB TLSB LSB

Bits

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

STCN75

Keys: S = two’s complement sign bit

1. These are comparable formats to the LM75.

TD8

(S)

TMSB = temperature MSB

TLSB = temperature LSB

TDx = temperature data bits

TD7

(TMSB)TD6TD5TD4TD3TD2TD1

3.1.4 Overlimit temperature register (TOS)

TOS register is a two-byte (16-bit) READ/WRITE register that stores the user-programmable
upper trip-point temperature for the thermal alarm in two’s complement format (see Ta bl e 8

on page 18). This register defaults to 80 °C at power-up (i.e., 0101 0000 0000 0000).

The format of the T
position contains the sign bit for the digital temperature and Bit14 contains the temperature
MSB.

For 9-bit conversions, the trip-point temperature is defined by the 9 MSBs of the T
register, and all remaining bits are “Don’t cares” (x).

register is identical to that of the temperature register. The MSB

OS

TD0

(TLSB)

xxxxxx x

OS

Doc ID 13307 Rev 9 17/36

Functional description STCN75

3.1.5 Hysteresis temperature register (T

T

register is a two-byte (16-bit) READ/WRITE register that stores the user-

HYS

programmable lower trip-point temperature for the thermal alarm in two’s complement
format (see Ta bl e 8 ). This register defaults to 75 °C at power-up
(i.e., 0100 1011 0000 0000).

The format of this register is the same as that of the temperature register. The MSB position
contains the sign bit for the digital temperature and bit 14 contains the temperature MSB.

Table 8. T

Bytes HS byte LS byte

Bits

STCN75 S TMSB TD TD TD TD TD TD

Keys: S = two’s complement sign bit

TMSB = temperature MSB

TLSB = temperature LSB

TD = temperature Data

and T

OS

MSB TMSB TLSB LSB

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

register format

HYS

HYS

(1)

)

9-bit

TLSB

000000 0

1. These are comparable formats to the DS75 and LM75.

3.2 Power-up default conditions

The STCN75 always powers up in the following default states:

● Thermostat mode = comparator mode

● Polarity = active-low

● Fault tolerance = 1 fault (i.e., relevant bits set to '0' in the configuration register)

● T

● T

● Register pointer = 00 (temperature register)

Note: After power-up these conditions can be reprogrammed via the serial interface.

= 80 °C

OS

= 75 °C

HYS

18/36 Doc ID 13307 Rev 9

STCN75 Functional description

3.3 Serial interface

Writing to and reading from the STCN75 registers is accomplished via the two-wire serial
interface protocol which requires that one device on the bus initiates and controls all READ
and WRITE operations. This device is called the “master” device. The master device also
generates the SCL signal which provides the clock signal for all other devices on the bus.
These other devices on the bus are called “slave” devices. The STCN75 is a slave device
(see Ta bl e 9 ). Both the master and slave devices can send and receive data on the bus.

During operations, one data bit is transmitted per clock cycle. All operations follow a
repeating, nine-clock-cycle pattern that consists of eight bits (one byte) of transmitted data
followed by an acknowledge (ACK) or not acknowledge (NACK) from the receiving device.

Note: There are no unused clock cycles during any operation, so there must not be any breaks in

the data stream and ACKs/NACKs during data transfers. Consequently, having too few
clock cycles can lead to incorrect operation if an inadvertent 8-bit READ from a 16-bit
register occurs. So, the entire word must be transferred out regardless of the superflous
trailing zeroes.

Table 9. STCN75 serial bus slave addresses

MSB LSB

Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0

1 0 0 1 A2 A1 A0 R/W

3.4 2-wire bus characteristics

The bus is intended for communication between different ICs. It consists of two lines: a bi­directional data signal (SDA) and a clock signal (SCL). Both the SDA and SCL lines must be
connected to a positive supply voltage via a pull-up resistor.

The following protocol has been defined:

● Data transfer may be initiated only when the bus is not busy.

● During data transfer, the data line must remain stable whenever the clock line is high.

● Changes in the data line, while the clock line is high, will be interpreted as control

signals.

Accordingly, the following bus conditions have been defined (see Figure 5 on page 20):

3.4.1 Bus not busy

Both data and clock lines remain high.

3.4.2 Start data transfer

A change in the state of the data line, from high to low, while the clock is high, defines the
START condition.

3.4.3 Stop data transfer

A change in the state of the data line, from low to high, while the clock is high, defines the
STOP condition.

Doc ID 13307 Rev 9 19/36

Functional description STCN75

3.4.4 Data valid

The state of the data line represents valid data when after a start condition, the data line is
stable for the duration of the high period of the clock signal. The data on the line may be
changed during the low period of the clock signal. There is one clock pulse per bit of data.

Each data transfer is initiated with a start condition and terminated with a stop condition.
The number of data bytes transferred between the start and stop conditions is not limited.
The information is transmitted byte-wide and each receiver acknowledges with a ninth bit.

By definition a device that gives out a message is called “transmitter”, the receiving device
that gets the message is called “receiver”. The device that controls the message is called
“master”. The devices that are controlled by the master are called “slaves”.

Figure 5. Serial bus data transfer sequence

DATA LINE

STABLE

DATA VALID

CLOCK

DATA

START

CONDITION

3.4.5 Acknowledge

Each byte of eight bits is followed by one acknowledge bit. This acknowledge bit is a low
level put on the bus by the receiver whereas the master generates an extra acknowledge
related clock pulse (see Figure 6 on page 21). A slave receiver which is addressed is
obliged to generate an acknowledge after the reception of each byte that has been clocked
out of the slave transmitter.

The device that acknowledges has to pull down the SDA line during the acknowledge clock
pulse in such a way that the SDA line is a stable low during the high period of the
acknowledge related clock pulse. Of course, setup and hold times must be taken into
account. A master receiver must signal an end of data to the slave transmitter by not
generating an acknowledge on the last byte that has been clocked out of the slave. In this
case the transmitter must leave the data line high to enable the master to generate the
STOP condition.

CHANGE OF

DATA ALLOWED

STOP

CONDITION

AI00587

20/36 Doc ID 13307 Rev 9

STCN75 Functional description

Figure 6. Acknowledgement sequence

CLOCK PULSE FOR

ACKNOWLEDGEMENT

SCL FROM
MASTER

START

12 89

DATA OUTPUT
BY TRANSMITTER

DATA OUTPUT
BY RECEIVER

MSB LSB

3.5 READ mode

In this mode the master reads the STCN75 slave after setting the slave address (see

Figure 7). Following the WRITE mode control bit (R/W

address 'An' is written to the on-chip address pointer.

There are two READ modes:

● Preset pointer locations (e.g. temperature, T

● Pointer setting (the pointer has to be set for the register that is to be read)

Note: The temperature register pointer is usually the default pointer.

These modes are shown in the READ mode typical timing diagrams (see Figure 8, Figure 9,
and Figure 10 on page 22).

Figure 7. Slave address location

=0) and the acknowledge bit, the word

and T

OS

HYS

AI00601

registers), and

R/W

START A

SLAVE ADDRESS

MSB

0 1 A2 A1 A010

LSB

Doc ID 13307 Rev 9 21/36

AI12226

Functional description STCN75

Figure 8. Typical 2-byte READ from preset pointer location (e.g. temp - TOS, T

119199

0 0 1 A2 A1 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0

1

Start

by

Master

Address Byte

Most Significant Data Byte Least Significant Data Byte

ACK

by

STCN75

ACK

by

Master

HYS

No ACK

by

Master

)

Stop

Cond.

by

Master

AI12227

Figure 9. Typical pointer set followed by an immediate READ for 2-byte register (e.g. temp)

1199

0 0 1 A2 A1 A0 R/W 0 0 0 0 0 0 D1 D0

1

Start

by

Master

Address Byte

ACK

by

STCN75

119199

Pointer Byte

ACK

by

STCN75

0 0 1 A2 A1 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0

1

Repeat

Start

by

Master

Address Byte

Most Significant Data Byte Least Significant Data Byte

ACK

by

STCN75

ACK

by

Master

No ACK

Figure 10. Typical 1-byte READ from the cofiguration register with preset pointer

1199

1

0 0 1 A2 A1 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0

Stop

Start

by

Master

Address Byte

ACK

by

STCN75

Data Byte

No ACK

Master

Cond.

by

Master

by

by

Master

Stop

Cond.

by

Master

AI12228

AI12229

22/36 Doc ID 13307 Rev 9

STCN75 Functional description

3.6 WRITE mode

In this mode the master transmitter transmits to the STCN75 slave receiver. Bus protocol is
shown in Figure 11. Following the START condition and slave address, a logic '0' (R/W
is placed on the bus and indicates to the addressed device that word address will follow and
is to be written to the on-chip address pointer.

These modes are shown in the WRITE mode typical timing diagrams (see Figure 11, and

Figure 12, and Figure 13 on page 24).

Figure 11. Typical pointer set followed by an immediate READ from the

configuration register

1199

1

0 0 1 A2 A1 A0 R/W 0 0 0 0 0 0 D1 D0

= 0)

Start

by

Master

Repeat

Start

by

Master

Address Byte

1919

1 0 0 1 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0

Address Byte Data Byte

ACK

by

STCN75

R/W

ACK

by

STCN75

Pointer Byte

ACK

by

STCN75

No ACK

by

STCN75

Stop

Cond.

by

Master

AI12230

Figure 12. Configuration register WRITE

119919

1

001A2A1A0R/W 000000 000D4D3D2D1D0D1 D0

Start

by

Master

Address Byte

ACK

by

STCN75

Pointer Byte

ACK

by

STCN75

Configuration Byte

STCN75

ACK

by

Stop

Cond.

by

Master

AI12231

Doc ID 13307 Rev 9 23/36

Functional description STCN75

Figure 13. TOS and T

1199

0 0 1 A2 A1 A0 R/W 0 0 0 0 0 0 D1 D0

1

Start

by

Master

1919

D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0

Most Significant Data Byte Least Significant Data Byte

WRITE

HYS

Address Byte

ACK

by

STCN75

ACK

by

STCN75

Pointer Byte

ACK

by

STCN75

ACK

by

STCN75

Stop

Cond.

by

Master

AI12232

24/36 Doc ID 13307 Rev 9

STCN75 Typical operating characteristics

4 Typical operating characteristics

Figure 14. Temperature variation vs. voltage

140

120

100

80

60

40

20

0

Temperature (°C)

–20

–40

–60

23456

Voltage (V)

–20

0.5

85

110

125

AI12258

Doc ID 13307 Rev 9 25/36

Maximum ratings STCN75

5 Maximum ratings

Stressing the device above the ratings listed in the absolute maximum ratings table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.

Table 10. Absolute maximum ratings

Symbol Parameter Value Unit

T

STG

(1)

T

SLD

V

IO

V

DD

V

OUT

I

O

P

D

θ

JA

1. Reflow at peak temperature of 260 °C. The time above 255 °C must not exceed 30 seconds.

Storage temperature (VCC off, V

off) –60 to 150 °C

BAT

Lead solder temperature for 10 seconds 260 °C

Input or output voltage VCC +0.5 V

Supply voltage 7.0 V

Output voltage VDD + 0.5 V

Output current 10 mA

Power dissipation 320 mW

Thermal resistance 216.3 °C/W

26/36 Doc ID 13307 Rev 9

STCN75 DC and AC parameters

6 DC and AC parameters

This section summarizes the operating measurement conditions, and the DC and AC
characteristics of the device. The parameters in the DC and AC characteristics tables that
follow, are derived from tests performed under the measurement conditions summarized in

Ta bl e 1 1 , Operating and AC measurement conditions. Designers should check that the

operating conditions in their circuit match the operating conditions when relying on the
quoted parameters.

Table 11. Operating and AC measurement conditions

Parameter Conditions Unit

V

supply voltage 2.7 to 5.5 V

DD

Ambient operating temperature (T

Input rise and fall times ≤ 5ns

Input pulse voltages 0.2 to 0.8V

Input and output timing reference voltages 0.3 to 0.7V

) –55 to 125 °C

A

CC

CC

V

V

Doc ID 13307 Rev 9 27/36

DC and AC parameters STCN75

Table 12. DC and AC characteristics

Sym Description Test condition

T

= –55 to +125

V

Supply voltage

DD

VDD supply current, active
temperature conversions

I

DD

VDD supply current,
communication only

A

°C

= 3.3 V 125 150 µA

V

DD

T

= 25 °C 70 100 µA

A

(1)

Min Typ

2.7 5.5 V

(2)

Max Unit

Shutdown mode supply

I

DD1

current, serial port inactive

Accuracy for

= 25 °C 1.0 µA

T

A

–25 °C < T

< 100 ±0.5 ±2.0 °C

A

corresponding range 2.7 V

–55 °C < T

temperature data

4 mA sink current 0.5 V

Digital pins

(SCL, SDA, A2-A0)

t

CONV

T

OS

T

HYS

V

OL1

V

IH

≤ 5.5 V

≤ V

DD

Resolution

Conversion time 9 45 85 ms

Overtemperature shutdown Default value 80 °C

Hysteresis Default value 75 °C

OS/INT saturation voltage

= 5 V)

(V

DD

Input logic high

VILInput logic low Digital pins –0.45

V

Output logic low (SDA) IOL = 3 mA 0.4 V

OL2

< 125 ±0.5 ±3.0 °C

A

9-bit

0.5 °C/LSB

9bits

0.7 x V

DD

VDD + 0.5

0.3 x V

DD

CIN Capacitance 5 pF

SDA output low current 6 mA

I

OL

1. Valid for ambient operating temperature: TA = –55 to 125 °C; VDD = 2.7 V to 5.5 V (except where noted).

2. Typical numbers taken at VDD= 3.0 V, TA = 25 °C.

V

V

28/36 Doc ID 13307 Rev 9

STCN75 DC and AC parameters

Figure 15. Bus timing requirements sequence

SDA

t

BUF

SCL

Table 13. AC characteristics

t

HD:STA

t

R

t

SP

t

LOW

Sym Parameter

f

SCL

t

BUF

t

HD:DAT

t

HD:STA

t

HIGH

t

LOW

t

SU:DAT

t

SU:STA

t

SU:STO

SCL clock frequency 0 400 kHz

Time the bus must be free before a new transmission can start 1.3 µs

t

SDA and SCL fall time 300 ns

F

(3)

Data hold time 0 µs

START condition hold time
(after this period the first clock pulse is generated)

Clock high period 600 ns

Clock low period 1.3 µs

t

SDA and SCL rise time 300 ns

R

Data setup time 100 ns

START condition setup time
(only relevant for a repeated start condition)

STOP condition setup time 600 ns

t

F

HIGH

(1)(2)

t

HD:DAT

t

SU:DAT

SR

t

HD:STA

t

SU:STA

Min Max Unit

600 ns

600 ns

t

SU:STO

P

1. Valid for ambient operating temperature: TA = –55 to 125 °C; VDD = 2.7 V to 5.5 V (except where noted).

2. Devices are tested at maximum clock frequency of 400 kHz.

3. Transmitter must internally provide a hold time to bridge the undefined region (300 ns max) of the falling
edge of SCL

AI00589

Doc ID 13307 Rev 9 29/36

Package mechanical data STCN75

7 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK®

®

is an ST trademark.

30/36 Doc ID 13307 Rev 9

STCN75 Package mechanical data

Figure 16. MSOP8 (TSSOP8) – 8-lead, thin shrink small outline (3 mm x 3 mm) package

mechanical drawing

D

8

1

ccc

5

EE1

4

A2A

A1

eb

L

L2

L1

c

k

E3_ME

1. Drawing is not to scale.

Table 14. MSOP8 (TSSOP8) – 8-lead, thin shrink small outline (3 mm x 3 mm)

package mechanical data

mm inches

Sym

Typ Min Max Typ Min Max

A1.100.043

A1 0.00 0.15 0.000 0.006

A2 0.85 0.75 0.95 0.034 0.030 0.037

b 0.22 0.40 0.009 0.016

c 0.08 0.23 0.003 0.009

D 3.00 2.80 3.20 0.118 0.110 0.126

E 4.90 4.65 5.15 0.193 0.183 0.203

E1 3.00 2.80 3.10 0.118 0.110 0.122

e0.65 0.026

L 0.60 0.40 0.80 0.024 0.016 0.032

L1 0.95 0.037

L2 0.25 0.010

k 0°8° 0°8°

ccc 0.10 0.004

Doc ID 13307 Rev 9 31/36

Package mechanical data STCN75

Figure 17. Carrier tape for MSOP8 (TSSOP8) package

P

D

T

A

TOP COVER

TAPE

K

0

0

CENTER LINES
OF CAVITY

P

2

B

0

0

P

1

E

F

W

USER DIRECTION OF FEED

Table 15. Carrier tape dimensions for MSOP8 (TSSOP8) package

Package W D E P

MSOP8

(TSSOP8)

12.00
±0.30

1.50

+0.10/

–0.00

1.75

±0.10

4.00

±0.10

P

0

2.00

±0.10

FA0B

2

5.50

±0.05

5.30

±0.10

0

3.40

±0.10

K

0

1.40

±0.10

P

1

8.00

±0.10

AM03073v1

TUnit

0.30

±0.05

mm 4000

Bulk

Qty

32/36 Doc ID 13307 Rev 9

STCN75 Package mechanical data

Figure 18. Reel schematic

T

40mm min.

Access hole

At slot location

B

D

C

A

Tape slot

Full ra dius

In core for

Tape s tart

2.5mm min.width

N

G measured

At hub

Table 16. Reel dimensions for 12 mm carrier tape - MSOP8 (TSSOP8) package

A

(max)

330 mm

(13 inch)

B

(min)

1.5 mm

C

13 mm

± 0.2 mm

D

(min)

N

(min)

20.2 mm 60 mm

G

12.4 mm

+ 2 / –0 mm

AM04928v1

T

(max)

18.4 mm

Doc ID 13307 Rev 9 33/36

Part numbering STCN75

8 Part numbering

Table 17. Ordering information scheme

Example: STCN75 DS 2 F

Device type

STCN75

Package

M = SO8

DS = MSOP8 (TSSOP8)

Temperature range

2 = –55 to 125 °C

(1)

Shipping method

F = ECOPACK

E = ECOPACK

1. Not recommended for new design, contact local ST sales office for availability. Refer to the STTS75M2F
replacement part.

2. Not recommended for new design, contact local ST sales office for availability.

®

package, tape & reel

®

package, tube

(2)

For other options, or for more information on any aspect of this device, please contact the
ST sales office nearest you.

34/36 Doc ID 13307 Rev 9

STCN75 Revision history

9 Revision history

Table 18. Revision history

Date Revision Changes

25-Jul-2006 1 Initial release

Changed document to new template; document status
updated from target specification to preliminary data; updated

17-Nov-2006 2

22-Jan-2007 3

02-Mar-2007 4

footnotes in Table 1: Signal names; updated footnotes, V
V

, V

IL

deleted t

and IOL in Table 12: DC and AC characteristics;

OL2

TIME-OUT

from Table 13: AC characteristics; updated

package mechanical data for the SO8N package in Section 7.

Updated information in features and cover page, DC and AC
characteristics (Ta bl e 1 2 ), package mechanical information
(Figure 16 and Ta bl e 1 4 ) and part numbering (Tab le 1 7 ).

Updated cover page (package information); Section 2:

Operation; Section 2.3: Comparator mode; Section 2.4:
Interrupt mode; Ta b le 4 ; Ta bl e 1 2; package mechanical data

(Figure 16, Tab le 1 4 ); and part numbering (Ta bl e 1 7 ).

OL1

,

06-Jun-2007 5

17-Jul-2008 6

09-Apr-2009 7

10-May-2010 8

07-Mar-2012 9

Updated cover page, document status upgraded to full
datasheet, updated Tab le 1 2 .

Minor text changes; updated Section 3.1.3: Temperature

register; cover page, and Ta bl e 1 7 .

Updated Features, Ta bl e 1 0 , 12, 13, text in Section 7:

Package mechanical data; added tape and reel information
Figure 17, Ta bl e 1 5 ; minor reformatting.

Updated Section 2.5, Section 5; added reel information
(Figure 18, Tab le 1 6 ); minor textual changes; reformatted
document.

Removed SO8 package and references from document;
indicated that shipping method in tubes is not recommended
for new design (Tab l e 1 7).

Doc ID 13307 Rev 9 35/36

STCN75

Please Read Carefully:

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right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
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All ST products are sold pursuant to ST’s terms and conditions of sale.

Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
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