Siemens BTS 775 G Technical data

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TrilithIC BTS 775 G
Overview
Features
• Quad switch driver
• Free configurable as bridge or quad-switch
• Ultra low
R
High-side switch: typ.85 m, Low-side switch: typ. 45 m
• Very high peak current capability
DS ON
@25°C:
P-DSO-28-9
• Very low quiescent current
• Space- and thermal optimized power P-DSO-Package
• Full short-circuit-protection
• Operates up to 40 V
• Status flag diagnosis
• Overtemperature shut down with hysteresis
• Short-circuit detection and diagnosis
• Open-load detection and diagnosis
• C-MOS compatible inputs
• Internal clamp diodes
• Isolated sources for external current sensing
• Over- and under-voltage detection with hysteresis
Type Ordering Code Package
BTS 775 G Q67007-A9350 P-DSO-28-9
Description
The BTS 775 G is a TrilithIC contains one double high-side switch and two low-side switches in one P-DSO-28-9 -Package.
“Silicon instead of heatsink”
becomes true
The ultra low
R
of this device avoids powerdissipation. It saves costs in mechanical
DS ON
construction and mounting and increases the efficiency.
®
The high-side switches are produced in the SIEMENS SMART SIPMOS
technology. It is fully protected and contains the signal conditioning circuitry for diagnosis. (The comparable standard high-side product is the BTS 621L1.)
Semiconductor Group 1 1999-01-07
BTS 775 G
For minimized R
SIEMENS SMART SIPMOS
the two low-side switches are N channel vertical power FETs in the
DS ON
®
technology. Fully protected by embedded protection
functions. (The comparable standard product is the BSP 78). Each drain of these three chips is mounted on separated leadframes (see P-DSO-28-9
pin configuration). The sources of all four power transistors are connected to separate pins.
So the BTS 775 G can be used in H-Bridge configuration as well as in any other switch configuration.
Moreover, it is possible to add current sense resistors. All these features open a broad range of automotive and industrial applications.
Semiconductor Group 2 1999-01-07
BTS 775 G
DL1 GL1 DL1
N.C.
DHVS GND
GH1 ST
GH2
DHVS
N.C. DL2
1 2 3 425 5
6 7 8
9 10
11 12
LS-Lead Frame 1
HS-Lead Frame
LS-Lead Frame 2
28 27 26
24 23
22 21 20 19 18 17
DL1 SL1 SL1 DL1 DHVS
SH1 SH1 SH2 SH2 DHVS DL2 SL2
GL2
DL2
13 14
AEP02071
16 15
SL2 DL2
Figure 1 Pin Configuration (top view)
Semiconductor Group 3 1999-01-07
BTS 775 G
Pin Definitions and Functions Pin No. Symbol Function 1, 3, 25, 28 DL1 Drain of low-side switch1
Leadframe 1
2 GL1 Gate of low-side switch1 4 N.C. not connected
5, 10, 19, 24 DHVS Drain of high-side switches and power supply voltage
Leadframe 2
6 GND Ground 7 GH1 Gate of high-side switch1 8 ST Status of high-side switches; open Drain output 9 GH2 Gate of high-side switch2
1)
1)
11 N.C. not connected
12, 14, 15, 18 DL2 Drain of low-side switch2
Leadframe 3
1)
13 GL2 Gate of low-side switch2
16, 17 SL2 Source of low-side switch2 20, 21 SH2 Source of high-side switch2 22, 23 SH1 Source of high-side switch1 26, 27 SL1 Source of low-side switch1
1)
To reduce the thermal resistance these pins are direct connected via metal bridges to the leadframe.
Bold type: Pin needs power wiring
Semiconductor Group 4 1999-01-07
ST
BTS 775 G
DHVS
2419,10,5,
8
GH1
GH2
GND
GL1
Diagnosis
7
9
6
2
Driver
IN OUT
00
0
1
0
1
11
Protection
Gate
Driver
LL HL LH HH
Biasing and Protection
R
O1 O2
Protection
R
2120,
1815,14,12,
22, 23 25, 283,1,
SH2
DL2 SH1
DL1
GL2
13
SL1 SL2
Gate
Driver
26, 16,27 17
AEB02676
Figure 2 Block Diagram
Semiconductor Group 5 1999-01-07
BTS 775 G
Circuit Description
Input Circuit
The control inputs GH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into the necessary form for driving the power output stages.
The inputs GL1 and GL2 are connected to the internal gate-driving units of the fully protected N-channel vertical power-MOS-FETs.
Output Stages
The output stages consist of an ultra low
R
Power-MOS H-Bridge. Embedded
DS ON
protective circuits make the outputs short circuit proof to ground, to the supply voltage and load short circuit proof. Positive and negative voltage spikes, which occur when driving inductive loads, are limited by integrated power clamp diodes.
Short Circuit Protection
The outputs are protected against – output short circuit to ground
– output short circuit to the supply voltage, and – overload (load short circuit).
An internal OP-Amp controls the Drain-Source-Voltage by comparing the DS-Voltage­Drop with an internal reference voltage. Above this trippoint the OP-Amp reduces the output current depending on the junction temperature and the drop voltage.
In the case of overloaded high-side switches the status output is set to low.
R
If the HS-Switches are in OFF-state-Condition internal resistors
from SH1,2 to GND
O1,2
pull the voltage at SH1,2 to low values. On each output pin SH1 and SH2 an output examiner circuit compares the output voltages with the internal reference voltage VEO. This results in switching the status output to low. The fully protected low-side switches have no status output.
Overtemperature Protection
The highside and the lowside switch also incorporates an overtemperature protection circuit with hysteresis which switches off the output transistors and sets the status output to low.
Undervoltage-Lockout (UVLO)
V
When
reaches the switch-on voltage V
S
The High-Side output transistors are switched off if the supply voltage the switch off value
Semiconductor Group 6 1999-01-07
V
UVOFF
.
the IC becomes active with a hysteresis.
UVON
V
drops below
S
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