Siemens BSS84 Datasheet

BSS 84
SIPMOS
®
Small-Signal Transistor
• P channel
• Enhancement mode
• Logic Level
Type
BSS 84 -50 V -0.13 A 10
= -0.8...-2.0 V
GS(th)
V
DS
I
D
R
DS(on)
Package Marking
SOT-23 SPs
Type Ordering Code Tape and Reel Information
BSS 84 Q62702-S568 E6327 BSS 84 Q67000-S243 E6433
Pin 1 Pin 2 Pin 3
G S D
Maximum Ratings Parameter Symbol Values Unit
Drain source voltage Drain-gate voltage
R
= 20 k
GS
Gate source voltage Continuous drain current
T
= 30 °C
A
DC drain current, pulsed
T
= 25 °C
A
Power dissipation
T
= 25 °C
A
V
DS
V
DGR
V
GS
I
D
I
Dpuls
P
tot
-50 V
-50
±
20
-0.13
-0.52
0.36
A
W
Semiconductor Group 1 18/02/1997
BSS 84
Maximum Ratings Parameter Symbol Values Unit
Chip or operating temperature Storage temperature Thermal resistance, chip to ambient air
1)
Therminal resistance, chip-substrate- reverse side
1)
T
j
T
stg
R
thJA
R
thJSR
-55 ... + 150 °C
-55 ... + 150
350 K/W
285 DIN humidity category, DIN 40 040 E IEC climatic category, DIN IEC 68-1 55 / 150 / 56
1) For package mounted on aluminium 15 mm x 16.7 mm x 0.7 mm
Electrical Characteristics, at
T
= 25°C, unless otherwise specified
j
Parameter Symbol Values Unit
min. typ. max.
Static Characteristics
Drain- source breakdown voltage
V
= 0 V,
GS
I
= -0.25 mA,
D
T
= 25 °C
j
Gate threshold voltage
=
V
GS
V
DS, ID
= -1 mA
Zero gate voltage drain current
V V V
DS DS DS
= -50 V, = -50 V, = -25 V,
V V V
GS GS GS
= 0 V, = 0 V, = 0 V,
T
= 25 °C
j
T
= 125 °C
j
T
= 25 °C
j
Gate-source leakage current
V
= -20 V,
GS
V
DS
= 0 V
Drain-Source on-state resistance
V
= -10 V,
GS
I
= -0.13 A
D
V
(BR)DSS
V
GS(th)
I
DSS
I
GSS
R
DS(on)
-50 - -
-0.8 -1.5 -2
-
-
-
-0.1
-2
-
-1
-60
-0.1
- -1 -10
- 5 10
V
µA
nA
Semiconductor Group 2 18/02/1997
BSS 84
Electrical Characteristics, at
T
= 25°C, unless otherwise specified
j
Parameter Symbol Values Unit
min. typ. max.
Dynamic Characteristics
Transconductance
V
2
DS
I
*
D * RDS(on)max, ID
= -0.13 A
Input capacitance
V
= 0 V,
GS
V
= -25 V, f = 1 MHz
DS
Output capacitance
V
= 0 V,
GS
V
= -25 V, f = 1 MHz
DS
Reverse transfer capacitance
V
= 0 V,
GS
V
= -25 V, f = 1 MHz
DS
Turn-on delay time
V R
DD
GS
= -30 V,
= 50
V
GS
= -10 V,
I
D
= -0.27 A
g
fs
C
iss
C
oss
C
rss
t
d(on)
S
0.05 0.085 ­pF
- 30 40
- 17 25
- 8 12 ns
- 7 10
Rise time
V R
DD
GS
= -30 V,
= 50
V
GS
Turn-off delay time
V R
DD
GS
= -30 V,
= 50
V
GS
Fall time
V R
DD
GS
= -30 V,
= 50
V
GS
= -10 V,
= -10 V,
= -10 V,
I
= -0.27 A
D
I
= -0.27 A
D
I
= -0.27 A
D
t
r
t
d(off)
t
f
- 12 18
- 10 13
- 20 27
Semiconductor Group 3 18/02/1997
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