Sharp LH5164ASHN, LH5164ASHT Datasheet
LH5164ASH
CMOS 6 4K (8 K × 8) S tatic RA M
FEATURES
•• 8,192 × 8 bit orga niza ti on
•• Access time: 500 ns (MAX.)
•• Power consu mption :
Operating:
60 mW (MAX.) @ 3 V
Standb y:
3 µW (MAX.) @ 70°C @ 3 V
9 µW (MAX.) @ 85°C @ 3 V
•• Fully-static operatio n
•• Three-state outputs
•• Wide o pera tin g voltage range:
2.5 V to 5.5 V
•• TTL compatible I/O
•• Wide temp . range
t
OPR
: -40 to +85°C
•• Packages:
28-pi n , 450 -mil S OP
28-pi n , 8 × 13 mm
2
TSOP (Type I)
DESCRIPTION
The LH5164ASH is a static RAM organized as
8,192 × 8 bits. It is fabricated using silicon-gate CMOS
process technology.
It is desi gned for 2.5 to 5.5 V low voltage operation
and wide temperature range from -40 to +85°C.
PIN CONNECTIONS
1
2
3
4
7
8
A
2
A
5
26
25
24
23
22
21
18
15
A
7
A
6
5
6
A
3
A
4
20
19
A
12
GND
A
8
A
11
A
10
CE
1
9
10
11
28
27
WE
A
1
V
CC
12
17
16
A
0
I/O
1
A
9
13
14
NC
OE
I/O
2
I/O
3
I/O
7
I/O
6
I/O
5
I/O
4
I/O
8
CE
2
5164ASH-1
TOP VIEW
28-PIN SOP
Figure 1. Pin Connections for SOP Package
2
3
4
5
6
9
10
7
8
A
11
11
1
28
27
26
25
22
21
24
23
20
19
A
10
28-PIN TSOP (Type I)
12
13
14
17
16
18
15
OE
A
8
A
9
CE
2
WE
A
12
NC
I/O
3
I/O
2
A
1
I/O
8
CE
1
I/O
6
I/O
7
GND
I/O
5
I/O
4
I/O
1
A
0
5164ASH-8
V
CC
A
7
A
6
A
5
A
4
A
3
A
2
TOP VIEW
Figure 2. Pin Connect ions for TSOP Package
1
I/O
8
A
8
A
9
A
12
25
24
2
11
15
18
5164ASH-2
MEMORY
ARRAY
(256 x 256)
13
17
12
16
A
7
3
ROW ADDRESS
BUFFERS
WE
A
6
4
A
5
5
27
A
4
6
ROW DECODERS
I/O
CIRCUITS
COLUMN DECODERS
V
CC
GND
OE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
I/O
2
I/O
1
22
19
COLUMN ADDRESS
BUFFERS
10
A
0A1A2A10
21
9
8
28
14
A
3
7
CE
1
20
26
CE
2
DATA CONTROL
A
11
23
Figure 3. LH5164ASH Block Diagram
PIN DESCRIPTION
SIGNA L PIN N AME
A0 - A
12
Addre ss inputs
CE1 - CE
2
Chip Ena ble in put
WE Write E na ble inp ut
OE Outpu t E nab le inp ut
SIGNAL PIN NAME
I/O1 - I/O
8
Data i npu ts and ou tpu ts
V
CC
Power sup ply
GND Ground
NC No connec tion
LH5164A SH CMOS 64K (8 K × 8) Static RAM
2
TRUTH TABLE
CE
1
CE
2
WE OE MODE I/O1 - I/O
8
SUPPLY CURRENT NOTE
H X X X Deselect High-Z Standby (ISB)1
X L X X Deselect High-Z Standby (I
SB
)1
L H L X Write D
IN
Operating (ICC)1
L H H L Read D
OUT
Operating (ICC)
L H H H Output disable High-Z Operating (I
CC
)
NOTE:
1. X = H or L
ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL RATING UNIT NOTE
Suppl y v olt age V
CC
-0.3 to +7.0 V 1
Input vol tage V
IN
-0.3 to VCC +0.3 V 1, 2
Operat ing te mpe ratu re
Topr -40 to +85 °C
Storag e t emp era ture
Tstg -65 to +150 °C
NOTES:
1. The maximum appl ic able voltage on any pin with respect to GND.
2.
VIN (MIN.) = -3.0 V f or pulse width ≤50 ns.
RECOMMENDED OPERATING CONDITIONS (TA = -40 to +85°C)
PARAMETER SYMBOL MIN. TYP. MAX. UNIT NOTE
Suppl y v olt age V
CC
2.5 3.0 5.5 V
Input vol tage
(V
CC
= 2.5 to 4.5 V)
V
IH
VCC - 0.5 VCC + 0.3 V
V
IL
-0.3 0.2 V 1
Input vol tage
(VCC = 4.5 to 5.5 V)
V
IH
2.2 VCC + 0.3 V
V
IL
-0.3 0.8 V
NOTE:
1.
V
IN
(MIN.) = -3.0 V f or pulse width ≤50 ns.
DC CHARACTERISTICS (TA = -40 to +85°C, VCC = 2.5 to 5.5 V)
PARAMETER SYMBOL CONDITIONS MIN. MAX. UNIT NOTE
Input lea kag e c urr ent I
LI
VIN = 0 to V
CC
-1.0 1.0
µA
Output le aka ge
curren t
I
LO
CE1 = VIH or CE2 = V
IL
or OE = VIH or WE = V
IL
V
I/O
= 0 to V
CC
-1.0 1.0
µA
Operat ing su ppl y
curren t
I
CC
CE1 = 0.2 V, VIN = 0.2 V or
V
CC
- 0.2 V
CE
2
= VCC - 0.2 V,
Output open
t
CYCLE
=
500 ns
20
mA
CE1 = 0.2 V, VIN = 0.2 V or
V
CC
- 0.2 V
CE
2
= VCC - 0.2 V,
Output open
t
CYCLE
=
1.0 µs
10
CE1 = 0.2 V, VIN = 0.2 V or
V
CC
- 0.2 V
CE
2
= VCC - 0.2 V,
Output open, V
CC
= 3.3 V
t
CYCLE
=
1.0 µs
8
Standb y c urr ent
I
SB
CE2 ≤ 0.2 V or
CE1 ≥ VCC - 0.2 V
T
A
≤ +70°C
1.0
µA
1
T
A
≤ +85°C
3.0
I
SB 1
CE1 = V
IH or CE2
= V
IL
5mA
Output Lo w v olt age V
OL
IOL = 500 µA
0.5 V
Output Hi gh vol tag e V
OH
IOH = -500 µA
V
CC
- 0.5 V 2
NOTES:
1.
CE
2
should be ≥ VCC - 0.2 V or ≤ 0.2 V when CE1 ≥ VCC - 0.2
V.
2. V
OH
is 4.5 V (M in.) at VCC > 5 V.
CMOS 64K (8K × 8) Static RAM LH5164ASH
3
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