Samsung S3C9432, S3C9434, S3P9432, S3P9434 Datasheet

S3C9432/C9434/P9434 PRODUCT OVERVIEW
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1 PRODUCT OVERVIEW
SAM87RI PRODUCT FAMILY
Samsung's SAM87Ri family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-programmable ROM sizes.
A address/data bus architecture and a large number of bit-configurable I/O ports provide a flexible programming environment for applications with varied memory and I/O requirements. Timer/counters with selectable operating modes are included to support real-time operations.
S3C9432/C9434 MICROCONTROLLER
The S3C9432/C9434 single-chip 8-bit microcontroller is fabricated using an advanced CMOS process. It is built around the powerful SAM87Ri CPU core. The S3C9432/C9434 is a versatile microcontroller, with its A/D converter, timer, PWM, and SIO it can be used in a wide range of general purpose applications.
Stop and Idle power-down modes were implemented to reduce power consumption. To increase on-chip register space, the size of the internal register file was logically expanded. The S3C9432/C9434 have 2K-bytes or 4K­bytes of program memory on-chip (ROM) and 112-bytes of general purpose register area RAM.
Using the SAM87Ri design approach, the following peripherals were integrated with the SAM87Ri core: — Three configurable I/O ports (13 pins)
— Five interrupt sources with one vector and one interrupt level — One 8-bit timer/counter with time interval mode — Analog to digital converter with five input channels and 10-bit resolution — One synchronous SIO module — One 12-bit PWM output
The S3C9432/C9434 microcontroller is ideal for use in a wide range of electronic applications requiring simple timer/counter, PWM, ADC, and SIO. S3C9432/C9434 is available in a 20/18/16-pin DIP and a 20-pin SOP package.
OTP
The S3P9434 is an OTP (One Time Programmable) version of the S3C9432/C9434 microcontroller. The S3P9434 has on-chip 4K-byte one-time-programmable EPROM instead of masked ROM. The S3P9434 is fully compatible with the S3C9432/C9434, in function, in D.C. electrical characteristics and in pin configuration.
PRODUCT OVERVIEW S3C9432/C9434/P9434
1-2
FEATURES
CPU
SAM87RI CPU core
Memory
2/4K-byte internal program memory (ROM)
112-byte general purpose register area (RAM)
Instruction Set
41 instructions
The SAM87RI core provides all the SAM87 core instruction except the word-oriented instruction, multiplication, division, and some one-byte instruction.
Instruction Execution Time
600 ns at 10 MHz f
OSC
(minimum cycles)
375 ns at 16 MHz f
OSC
(minimum cycles)
Interrupts
5 interrupt sources with one vector and one level interrupt structure
General I/O
Two I/O ports (Toatal 13 pins)
One output only port (port 2)
Bit programmable ports
Serial I/O
One synchronius serial I/O module
Selectable transmit and receive rates
Built-in reset Circuit (LVD)
Low voltage detector for safe reset
Timer/Counters
One 8-bit basic timer for watchdog function
One 8-bit timer/counter for the time interval mode
PWM Module
12-bit PWM 1-ch (Max: 250 kHz)
6-bit base + 6-bit extension frame
A/D Converter
Five analog input pins
10-bit conversion resolution
Buzzer Frequency Range
200 Hz to 20 kHz signal can be generated
Oscillation Frequency
1 MHz to 16 MHz external crystal oscillator
Maximum 16 MHz CPU clock
4 MHz RC oscillator
Operating Temperature Range
- 40°C to + 85°C
Operating Voltage Range
3.0 V to 5.5 V
OTP Interface Protocol Spec
Serial OTP
Package Types
20-pin DIP-300
20-pin SOP-375
18-pin DIP-300
16-pin DIP-300
S3C9432/C9434/P9434 PRODUCT OVERVIEW
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BLOCK DIAGRAM
SAM87RI CPU
P0.0-P0.3
BUZ, PWM, INT0, INT1
I/O Port and
Interrupt Control
2-KB ROM 4-KB ROM
112-Byte
Register File
Port 0 Port 1
P1.0-P1.4
ADC0-ADC4
SCK, SO, SI, CLO
Port 2
SIO
Timer 0
BUZ
ADC
PWM
OSC
Basic Timer
P2.0/SCK P2.1/SO P2.2 P2.3
SCK (P1.3 or P2.0) SO (P1.2 or P2.1)
SI (P1.1)
X
IN
XOUT
P0.2/T0CK
P0.0/BUZ
ADC0-ADC4
P0.1/PWM
Figure 1-1. Block Diagram
PRODUCT OVERVIEW S3C9432/C9434/P9434
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PIN ASSIGNMENTS
S3C9432/C9434
20-DIP
(Top View)
VDD P0.3/INT1 (SCL) P1.0/ADC0 (SDA) P1.1/ADC1/SI P1.2/ADC2/SO P1.3/ADC3/SCK P1.4/ADC4/CL0 AVREF P2.1/SO P2.3
20 19 18 17 16 15 14 13 12 11
VSS
XIN
XOUT
TEST (VPP)
P0.2/T0CK/INT0
P0.1/PWM
RESET P0.0/BUZ P2.0/SCK
P2.2
1 2 3 4 5 6 7 8 9 10
Figure 1-2. Pin Assignment Diagram (20-Pin DIP Package)
S3C9432/C9434/P9434 PRODUCT OVERVIEW
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S3C9432/C9434
20-SOP
(Top View)
VDD P0.3/INT1 P1.0/ADC0 P1.1/ADC1/SI P1.2/ADC2/SO P1.3/ADC3/SCK P1.4/ADC4/CLO AVREF P2.1/SO P2.3
20 19 18 17 16 15 14 13 12 11
VSS
XIN
XOUT
TEST
P0.2/T0CK/INT0
P0.1/PWM
RESET
P0.0/BUZ P2.0/SCK
P2.2
1 2 3 4 5 6 7 8 9 10
Figure 1-3. Pin Assignment Diagram (20-Pin SOP Package)
PRODUCT OVERVIEW S3C9432/C9434/P9434
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S3C9432/C9434
18-DIP
(Top View)
VDD P0.3/INT1 P1.0/ADC0 P1.1/ADC1/SI P1.2/ADC2/SO P1.3/ADC3/SCK P1.4/ADC4/CL0 AVREF P2.1/SO
18 17 16 15 14 13 12 11 10
VSS
XIN
XOUT
TEST
P0.2/T0CK/INT0
P0.1/PWM
RESET P0.0/BUZ P2.0/SCK
1 2 3 4 5 6 7 8 9
Figure 1-4. Pin Assignment Diagram (18-Pin DIP Package)
S3C9432/C9434
16-DIP
(Top View)
VSS
XIN
XOUT
TEST
P0.2/T0CK/INT0
P0.1/PWM
RESET
P0.0/BUZ
VDD P0.3/INT1 P1.0/ADC0 P1.1/ADC1/SI P1.2/ADC2/SO P1.3/ADC3/SCK P1.4/ADC4/CLO AVREF
16 15 14 13 12 11 10
9
1 2 3 4 5 6 7 8
Figure 1-5. Pin Assignment Diagram (16-Pin DIP Package)
S3C9432/C9434/P9434 PRODUCT OVERVIEW
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PIN DESCRIPTIONS
Table 1-1. S3C9432/C9434 Pin Descriptions
Pin
Names
Pin
Type
Pin
Description
Circuit
Type
Share
Pins
P0.0-P0.3 I/O
Bit-programmable I/O port for Schmitt trigger input or push-pull, open-drain output. Pull-up resistors are assignable by software. Port 0 pins can also be used as alternative function.
E BUZ
PWM
INT0/T0CK
INT1
P1.0-P1.4 I/O Bit-programmable I/O port for Schmitt trigger
input or push-pull, open-drain output. Pull-up resistors are assignable by software. Port 1 pins can also be used as alternative function.
E-1 ADC0-ADC4
SI
SO SCK CLO
P2.0-P2.3 O Push-pull or open-drain output port. Pull up
resistors are assignable by software. Port 2.0-2.1 pins can also be used as alternative function.
E-2 SCK
SO
XIN, X
OUT
Crystal/ceramic, or RC oscillator signal for system
clock.
RESET
I
System RESET signal input pin.
B
TEST I Test signal input pin (for factory use only: must be
connected to VSS)
V
DD, VSS
Voltage input pin and ground
AV
REF
A/D converter reference voltage input and ground
AV
SS
Bonded to VSS internally
SCK I/O Serial interface clock I/O E-1
E-2
P1.3 or
P2.0
SO O Serial data output E-1
E-2
P1.2 or
P2.1
SI I Serial data input E-1 P1.1 CLO O System clock output port E-1 P1.4 BUZ O 200 Hz- 20 kHz frequency output for buzzer
sound
E P0.0
PWM O 12-bit PWM output E P0.1 INT0-INT1 I External interrupt input port E P0.2
P0.3
T0CK I Timer 0 external clock input E P0.2 ADC0-ADC4 I A/D converter input E-1 P1.0-P1.4
PRODUCT OVERVIEW S3C9432/C9434/P9434
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PIN CIRCUITS
P-Channel
N-Channel
In
VDD
Figure 1-6. Pin Circuit Type A
In
VDD
Pull-Up Resistor
Figure 1-7. Pin Circuit Type B
P-Channel
N-Channel
VDD
Out
Output
DIsable
Data
Figure 1-8. Pin Circuit Type C
I/O
Output
DIsable
Data
Circuit
Type C
Pull-up Enable
VDD
Data
P-Channel
Figure 1-9. Pin Circuit Type D
S3C9432/C9434/P9434 PRODUCT OVERVIEW
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N-CH
VDD
P-CH
Output
DIsable
Output
Data
Open-Drain
Input
Pull-up Enable
VDD
I/O
Pull-up Resistor
Figure 1-10. Pin Circuit Type E
Analog
Input
N-CH
VDD
P-CH
Output
DIsable
Output
Data
Open-Drain
Digital
Input
Pull-up
Enable
VDD
I/O
Pull-up Resistor
Figure 1-11. Pin Circuit Type E-1
N-CH
VDD
P-CH
Output
DIsable
Output
Data
Open-Drain
Pull-up Enable
VDD
I/O
Pull-up
Resistor
Figure 1-12. Pin Circuit Type E-2
S3C9432/C9434/P9434 ELECTRICAL DATA
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14 ELECTRICAL DATA
OVERVIEW
In this section, the following S3C9432/C9434 electrical characteristics are presented in tables and graphs: — Absolute maximum ratings
— D.C. electrical characteristics — A.C. electrical characteristics — Input Timing Measurement Points — Oscillator characteristics — Oscillation stabilization time — Operating Voltage Range — Schmitt trigger input characteristics — Data retention supply voltage in Stop mode — Stop mode release timing when initiated by a RESET — A/D converter electrical characteristics — LVD circuit characteristics — LVD reset Timing — Serial I/O timing characteristics — Serial data transfer timing
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