Philips PCF8576CU-5-F1, PCF8576CU-7-F1, PCF8576CU-F1, PCF8576CU-10-F1, PCF8576CU-12-F1 Datasheet
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DATA SH EET
Product specification
Supersedes data of 1997 Nov 14
File under Integrated Circuits, IC12
1998 Jul 30
INTEGRATED CIRCUITS
PCF8576C
Universal LCD driver for low
multiplex rates
1998 Jul 30 2
Philips Semiconductors Product specification
Universal LCD driver for low multiplex
rates
PCF8576C
CONTENTS
1 FEATURES
2 GENERAL DESCRIPTION
3 ORDERING INFORMATION
4 BLOCK DIAGRAM
5 PINNING
6 FUNCTIONAL DESCRIPTION
6.1 Power-on reset
6.2 LCD bias generator
6.3 LCD voltage selector
6.4 LCD drive mode waveforms
6.4.1 Static drive mode
6.4.2 1 : 2 multiplex drive mode
6.4.3 1 : 3 multiplex drive mode
6.4.4 1 : 4 multiplex drive mode
6.5 Oscillator
6.5.1 Internal clock
6.5.2 External clock
6.6 Timing
6.7 Display latch
6.8 Shift register
6.9 Segment outputs
6.10 Backplane outputs
6.11 Display RAM
6.12 Data pointer
6.13 Subaddress counter
6.14 Output bank selector
6.15 Input bank selector
6.16 Blinker
7 CHARACTERISTICS OF THE I2C-BUS
7.1 Bit transfer (see Fig.12)
7.2 Start and stop conditions (see Fig.13)
7.3 System configuration (see Fig.14)
7.4 Acknowledge (see Fig.15)
7.5 PCF8576C I2C-bus controller
7.6 Input filters
7.7 I2C-bus protocol
7.8 Command decoder
7.9 Display controller
7.10 Cascaded operation
8 LIMITING VALUES
9 HANDLING
10 DC CHARACTERISTICS
11 AC CHARACTERISTICS
11.1 Typical supply current characteristics
11.2 Typical characteristics of LC D outputs
12 APPLICATION INFORMATION
12.1 Chip-on-glass cascadability in single plane
13 BONDING PAD LOCATIONS
14 PACKAGE OUTLINES
15 SOLDERING
15.1 Introduction
15.2 Reflow soldering
15.3 Wave soldering
15.3.1 LQFP
15.3.2 VSO
15.3.3 Method (LQFP and VSO)
15.4 Repairing soldered joints
16 DEFINITIONS
17 LIFE SUPPORT APPLICATIONS
18 PURCHASE OF PHILIPS I2C COMPONENTS
1998 Jul 30 3
Philips Semiconductors Product specification
Universal LCD driver for low multiplex
rates
PCF8576C
1 FEATURES
• Single-chip LCD controller/driver
• Selectable backplane drive configuration: static or 2/3/4
backplane multiplexing
• Selectable display bias configuration: static, 1/2 or 1/3
• Internal LCD bias generation with voltage-follower
buffers
• 40 segment drives: up to twenty 8-segment numeric
characters; up to ten 15-segment alphanumeric
characters; or any graphics of up to 160 elements
• 40 × 4-bit RAM for display data storage
• Auto-incremented display data loading across device
subaddress boundaries
• Display memory bank switching in static and duplex
drive modes
• Versatile blinking modes
• LCD and logic supplies may be separated
• Wide power supply range: from 2 V for low-threshold
LCDs and up to 6 V for guest-host LCDs and
high-threshold (automobile) twisted nematic LCDs.
A 9 V version is also available on request.
• Low power consumption
• Power-saving mode for extremely low power
consumption in battery-operated and telephone
applications
• I
2
C-bus interface
• TTL/CMOS compatible
• Compatible with any 4-bit, 8-bit or 16-bit
microprocessors/microcontrollers
• May be cascaded for large LCD applications (up to
2560 segments possible)
• Cascadable with 24-segment LCD driver PCF8566
• Optimized pinning for plane wiring in both and multiple
PCF8576C applications
• Space-saving 56-lead plastic very small outline package
(VSO56) or 64-lead low profile quad flat package
(LQFP64)
• No external components
• Compatible with chip-on-glass technology
• Manufactured in silicon gate CMOS process.
2 GENERAL DESCRIPTION
The PCF8576C is a peripheral device which interfaces to
almost any Liquid Crystal Display (LCD) with low multiplex
rates. It generates the drive signals for any static or
multiplexed LCD containing up to four backplanes and up
to 40 segments and can easily be cascaded for larger LCD
applications. The PCF8576C is compatible with most
microprocessors/microcontrollers and communicates via a
two-line bidirectional I2C-bus. Communication overheads
are minimized by a display RAM with auto-incremented
addressing, by hardware subaddressing and by display
memory switching (static and duplex drive modes).
3 ORDERING INFORMATION
TYPE NUMBER
PACKAGE
NAME DESCRIPTION VERSION
PCF8576CT VSO56 plastic very small outline package; 56 leads SOT190-1
PCF8576CU − chip in tray −
PCF8576CU/2 − chip with bumps in tray −
PCF8576CU/5 − unsawn wafer −
PCF8576CU/7 − chip with bumps on tape −
PCF8576CU/10 FFC chip-on-film frame carrier −
PCF8576CU/12 FFC chip with bumps on film frame carrier −
PCF8576CH LQFP64 plastic low profile quad flat package; 64 leads; body 10 × 10 × 1.4 mm SOT314-2
1998 Jul 30 4
Philips Semiconductors Product specification
Universal LCD driver for low multiplex
rates
PCF8576C
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4 BLOCK DIAGRAM
handbook, full pagewidth
MLD332
LCD
VOLTAGE
SELECTOR
V
LCD
12
V
DD
5
TIMING BLINKER
OSCILLATOR
INPUT
FILTERS
I C - BUS
CONTROLLER
2
POWER-
ON
RESET
CLK
4
SYNC
3
OSC
6
V
SS
11
SCL
2
SDA
1
SA0
10
DISPLAY
CONTROLLER
COMMAND
DECODER
BACKPLANE
OUTPUTS
13
BP014BP215BP116BP3
INPUT
BANK
SELECTOR
DISPLAY
RAM
40 x 4 BITS
OUTPUT
BANK
SELECTOR
DATA
POINTER
SUBADDRESS
COUNTER
DISPLAY SEGMENT OUTPUTS
DISPLAY LATCH
SHIFT REGISTER
17 to 56
S0 to S39
A07A18A2
9
PCF8576C
LCD BIAS
GENERATOR
40
Fig.1 Block diagram; VSO56.
1998 Jul 30 5
Philips Semiconductors Product specification
Universal LCD driver for low multiplex
rates
PCF8576C
5 PINNING
SYMBOL
PIN
DESCRIPTION
SOT190 SOT314
SDA 1 10 I
2
C-bus serial data input/output
SCL 2 11 I
2
C-bus serial clock input
SYNC 3 12 cascade synchronization input/output
CLK 4 13 external clock input
V
DD
5 14 supply voltage
OSC 6 15 oscillator input
A0 to A2 7 to 9 16 to 18 I
2
C-bus subaddress inputs
SA0 10 19 I
2
C-bus slave address input; bit 0
V
SS
11 20 logic ground
V
LCD
12 21 LCD supply voltage
BP0, BP2, BP1, BP3 13 to 16 25 to 28 LCD backplane outputs
S0 to S39 17 to 56 29 to 32, 34 to 47, 49 to 64, 2 to 7 LCD segment outputs
n.c. − 1, 8, 9, 22 to 24, 33 and 48 not connected
1998 Jul 30 6
Philips Semiconductors Product specification
Universal LCD driver for low multiplex
rates
PCF8576C
Fig.2 Pin configuration; VSO56.
handbook, halfpage
PCF8576CT
MLD334
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
SDA
SCL
SYNC
CLK
V
OSC
A0
A1
A2
SA0
V
V
BP0
BP2
BP1
BP3
S0
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S11
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
S39
S38
S37
S36
S35
S34
S33
S32
S31
S30
S29
S28
S27
S26
S25
S24
S23
S22
S21
S20
S19
S18
S17
S16
S15
S14
S13
S12
DD
SS
LCD
1998 Jul 30 7
Philips Semiconductors Product specification
Universal LCD driver for low multiplex
rates
PCF8576C
handbook, full pagewidth
PCF8576CH
MLD333
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
n.c.
S34
S35
S36
S37
S38
S39
n.c.
n.c.
SDA
SCL
SYNC
CLK
V
OSC
A0
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
n.c.
S17
S16
S15
S14
S13
S12
S11
S10
S9
S8
S7
S6
S5
S4
n.c.
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
A1
A2
SA0
V
V
n.c.
n.c.
n.c.
BP0
BP2
BP1
BP3
S0
S1
S2
S3
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
S33
S32
S31
S30
S29
S28
S27
S26
S25
S24
S23
S22
S21
S20
S19
S18
DD
SS
LCD
Fig.3 Pin configuration; LQFP64.
1998 Jul 30 8
Philips Semiconductors Product specification
Universal LCD driver for low multiplex
rates
PCF8576C
6 FUNCTIONAL DESCRIPTION
The PCF8576C is a versatile peripheral device designed
to interface to any microprocessor/microcontroller to a
wide variety of LCDs. It can directly drive any static or
multiplexed LCD containing up to four backplanes and up
to 40 segments. The display configurations possible with
the PCF8576C depend on the number of active backplane
outputs required; a selection of display configurations is
given in Table 1.
All of the display configurations given in Table 1 can be
implemented in the typical system shown in Fig.4.
The host microprocessor/microcontroller maintains the
2-line I
2
C-bus communication channel with the
PCF8576C. The internal oscillator is selected by tying
OSC (pin 6) to VSS (pin 11). The appropriate biasing
voltages for the multiplexed LCD waveforms are
generated internally. The only other connections required
to complete the system are to the power supplies (VDD,
VSS and V
LCD
) and the LCD panel chosen for the
application.
Table 1 Selection of display configurations
NUMBER OF 7-SEGMENTS NUMERIC
14-SEGMENTS
ALPHANUMERIC
DOT MATRIX
BACKPLANES SEGMENTS DIGITS
INDICATOR
SYMBOLS
CHARACTERS
INDICATOR
SYMBOLS
4 160 20 20 10 20 160 dots (4 × 40)
3 120 15 15 8 8 120 dots (3 × 40)
2 80 10 10 5 10 80 dots (2 × 40)
1 40 5 5 2 12 40 dots (1 × 40)
Fig.4 Typical system configuration.
handbook, full pagewidth
HOST
MICRO-
PROCESSOR/
MICRO-
CONTROLLER
R
t
r
2C
B
SDA
SCL
OSC
1 17 to 56
13 to 16
2
6
78
512
91011
40 segment drives
4 backplanes
LCD PANEL
(up to 160
elements)
PCF8576CT
A0 A1 A2SSSA0 V
SS
V
DD
V
DD
V
LCD
V
MBE524
1998 Jul 30 9
Philips Semiconductors Product specification
Universal LCD driver for low multiplex
rates
PCF8576C
6.1 Power-on reset
At power-on the PCF8576C resets to a starting condition
as follows:
1. All backplane outputs are set to VDD.
2. All segment outputs are set to VDD.
3. The drive mode ‘1 : 4 multiplex with1⁄3bias’ is selected.
4. Blinking is switched off.
5. Input and output bank selectors are reset (as defined
in Table 5).
6. The I2C-bus interface is initialized.
7. The data pointer and the subaddress counter are
cleared.
Data transfers on the I
2
C-bus should be avoided for 1 ms
following power-on to allow completion of the reset action.
6.2 LCD bias generator
The full-scale LCD voltage (V
op
) is obtained from
VDD− V
LCD
. The LCD voltage may be temperature
compensated externally through the V
LCD
supply to pin 12.
Fractional LCD biasing voltages are obtained from an
internal voltage divider of the three series resistors
connected between VDD and V
LCD
. The centre resistor can
be switched out of the circuit to provide a1⁄2bias voltage
level for the 1 : 2 multiplex configuration.
6.3 LCD voltage selector
The LCD voltage selector co-ordinates the multiplexing of
the LCD in accordance with the selected LCD drive
configuration. The operation of the voltage selector is
controlled by MODE SET commands from the command
decoder. The biasing configurations that apply to the
preferred modes of operation, together with the biasing
characteristics as functions of V
op=VDD
− V
LCD
and the
resulting discrimination ratios (D), are given in Table 2.
A practical value for Vop is determined by equating V
off(rms)
with a defined LCD threshold voltage (Vth), typically when
the LCD exhibits approximately 10% contrast. In the static
drive mode a suitable choice is Vop>3Vth approximately.
Multiplex drive ratios of 1 : 3 and 1 : 4 with
1
⁄2bias are
possible but the discrimination and hence the contrast
ratios are smaller ( = 1.732 for 1 : 3 multiplex or
= 1.528 for 1 : 4 multiplex).
The advantage of these modes is a reduction of the LCD
full-scale voltage V
op
as follows:
• 1 : 3 multiplex (
1
⁄2bias):
Vop= = 2.449 V
off(rms)
• 1 : 4 multiplex (1⁄2bias):
V
op
= = 2.309 V
off(rms)
These compare with Vop=3V
off(rms)
when1⁄3bias is used.
3
21
3
----------
6V
off rms〈〉
×
43×()
3
----------------------- -
Table 2 Preferred LCD drive modes: summary of characteristics
LCD DRIVE MODE
NUMBER OF
LCD BIAS
CONFIGURATION
BACKPLANES LEVELS
static 1 2 static 0 1 ∞
1:2 2 3
1
⁄
2
0.354 0.791 2.236
1:2 2 4
1
⁄
3
0.333 0.745 2.236
1:3 3 4
1
⁄
3
0.333 0.638 1.915
1:4 4 4
1
⁄
3
0.333 0.577 1.732
V
off(rms)
V
op
-------------------- -
V
on(rms)
V
op
-------------------- -
D
V
on(rms)
V
off(rms)
-------------------- -
=
1998 Jul 30 10
Philips Semiconductors Product specification
Universal LCD driver for low multiplex
rates
PCF8576C
6.4 LCD drive mode waveforms
6.4.1 S
TATIC DRIVE MODE
The static LCD drive mode is used when a single backplane is provided in the LCD. Backplane and segment drive
waveforms for this mode are shown in Fig.5.
Fig.5 Static drive mode waveforms (Vop=VDD− V
LCD
).
V
state1
t() V
S
n
t() V
BP0
t()–=
V
on(rms)Vop
=
V
state2
t() V
S
n1+
t() V
BP0
t()–=
V
off(rms)
0V=
MBE539
V
DD
V
LCD
V
LCD
V
DD
V
LCD
V
op
V
op
state 1 0
BP0
S
n
S
n 1
V
op
V
op
state 2 0
(a) waveforms at driver
(b) resultant waveforms
at LCD segment
LCD segments
state 1
(on)
state 2
(off)
T
frame
V
DD
1998 Jul 30 11
Philips Semiconductors Product specification
Universal LCD driver for low multiplex
rates
PCF8576C
6.4.2 1 : 2 MULTIPLEX DRIVE MODE
When two backplanes are provided in the LCD, the 1 : 2 multiplex mode applies. The PCF8576C allows use of1⁄2bias or
1
⁄3bias in this mode as shown in Figs 6 and 7.
Fig.6 Waveforms for the 1 : 2 multiplex drive mode with1⁄2bias (Vop=VDD− V
LCD
).
V
state1
t() V
S
n
t() V
BP0
t()–=
V
on(rms)
0.791V
op
=
V
state2
t() V
S
n
t() V
BP1
t()–=
V
off(rms)
0.354V
op
=
MBE540
V
(V )/2V
DD
V /2
op
V
op
state 1 0
BP0
S
n 1
(a) waveforms at driver
(b) resultant waveforms
at LCD segment
LCD segments
state 2
T
frame
DD LCD
V
LCD
BP1
S
n
V
op
V /2
op
V /2
op
V
op
state 2
0
V
op
V /2
op
state 1
V
(V )/2V
DD
DD
LCD
V
LCD
V
LCD
V
LCD
V
DD
V
DD
1998 Jul 30 12
Philips Semiconductors Product specification
Universal LCD driver for low multiplex
rates
PCF8576C
Fig.7 Waveforms for the 1 : 2 multiplex drive mode with1⁄3bias (Vop=VDD− V
LCD
).
V
state1
t() V
S
n
t() V
BP0
t()–=
V
on(rms)
0.745V
op
=
V
state2
t() V
S
n
t() V
BP1
t()–=
V
off(rms)
0.333V
op
=
MBE541
V
DD
2V /3
op
V
op
state 1 0
BP0
S
n 1
(a) waveforms at driver
(b) resultant waveforms
at LCD segment
LCD segments
state 2
T
frame
V V /3
DD
op
V
LCD
BP1
S
n
V
op
state 1
V 2V /3
DD
op
V
DD
V V /3
DD
op
V
LCD
V 2V /3
DD
op
V
DD
V V /3
DD
op
V
LCD
V 2V /3
DD
op
V
DD
V V /3
DD
op
V
LCD
V 2V /3
DD
op
V /3
op
2V /3
op
V /3
op
2V /3
op
V
op
state 2 0
V
op
V /3
op
2V /3
op
V /3
op
1998 Jul 30 13
Philips Semiconductors Product specification
Universal LCD driver for low multiplex
rates
PCF8576C
6.4.3 1 : 3 MULTIPLEX DRIVE MODE
When three backplanes are provided in the LCD, the 1 : 3 multiplex drive mode applies, as shown in Fig.8.
Fig.8 Waveforms for the 1 : 3 multiplex drive mode (Vop=VDD− V
LCD
).
V
state1
t() V
S
n
t() V
BP0
t()–=
V
on(rms)
0.638V
op
=
V
state2
t() V
S
n
t() V
BP1
t()–=
V
off(rms)
0.333V
op
=
MBE542
2V /3
op
V
op
state 1 0
BP0
(b) resultant waveforms
at LCD segment
LCD segments
state 2
T
frame
BP1
V
op
state 1
V /3
op
2V /3
op
V /3
op
2V /3
op
V
op
state 2 0
V
op
V /3
op
2V /3
op
V /3
op
S
n 1
S
n 2
(a) waveforms at driver
S
n
BP2/S23
V
DD
V V /3
DD
op
V
LCD
V 2V /3
DD
op
V
DD
V V /3
DD
op
V
LCD
V 2V /3
DD
op
V
DD
V V /3
DD
op
V
LCD
V 2V /3
DD
op
V
DD
V V /3
DD
op
V
LCD
V 2V /3
DD
op
V
DD
V V /3
DD
op
V
LCD
V 2V /3
DD
op
V
DD
V V /3
DD
op
V
LCD
V 2V /3
DD
op
1998 Jul 30 14
Philips Semiconductors Product specification
Universal LCD driver for low multiplex
rates
PCF8576C
6.4.4 1 : 4 MULTIPLEX DRIVE MODE
When four backplanes are provided in the LCD, the 1 : 4 multiplex drive mode applies, as shown in Fig.9.
MBE543
2V /3
op
V
op
state 1 0
BP0
(b) resultant waveforms
at LCD segment
LCD segments
state 2
T
frame
BP1
V
op
state 1
V /3
op
2V /3
op
V /3
op
2V /3
op
V
op
state 2 0
V
op
V /3
op
2V /3
op
V /3
op
S
n 1
BP2
S
n 2
S
n 3
(a) waveforms at driver
S
n
BP3
V
DD
V V /3
DD
op
V
LCD
V 2V /3
DD
op
V
DD
V V /3
DD
op
V
LCD
V 2V /3
DD
op
V
DD
V V /3
DD
op
V
LCD
V 2V /3
DD
op
V
DD
V V /3
DD
op
V
LCD
V 2V /3
DD
op
V
DD
V V /3
DD
op
V
LCD
V 2V /3
DD
op
V
DD
V V /3
DD
op
V
LCD
V 2V /3
DD
op
V
DD
V V /3
DD
op
V
LCD
V 2V /3
DD
op
V
DD
V V /3
DD
op
V
LCD
V 2V /3
DD
op
Fig.9 Waveforms for the 1 : 4 multiplex drive mode (Vop=VDD− V
LCD
).
V
state1
t() V
S
n
t() V
BP0
t()–=
V
on(rms)
0.577V
op
=
V
state2
t() V
S
n
t() V
BP1
t()–=
V
off(rms)
0.333V
op
=
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