ON Semiconductor NTMD4102PR2 Technical data

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NTMD4102PR2

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Trench Power MOSFET

-20 V, P-Channel, SO-8 Dual

This P-Channel device was designed using ON Semiconductor’s
leading edge trench technology for low R
SO-8 dual package for high power and current handling capability.
The low R

performance is particularly suited for game systems,

DS(on)

notebook and desktop computers, and printers.

Features & Benefits

• Leading -20 V Trench for Low R

DS(on)

• SO-8 Package Provides Excellent Thermal Performance

• Surface Mount SO-8 Package Saves Board Space

• Pb Free Package for Green Manufacturing

performance in the

DS(on)

R

DS(on)

R

DS(on)

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V

BR(DSS)

= -20 VOLTS

(max) = 19 m @ -10 V

I

D(max)

(Note 1) = -8.5 A

(max) = 30 m @ -4.5 V

I

D(max)

(Note 1) = -6.5 A

Applications

• Load/Power Management

• Battery Switching for Multi Cell Li-Ion

• Buck-Boost Synchronous Rectification

MAXIMUM RATINGS (T

Rating Symbol Value Unit

Drain-to-Source Voltage V
Gate-to-Source Voltage V
Drain Current

- Continuous @ T

- Pulsed Drain Current (t = 10 µs)

Steady State Power Dissipation

@ T

= 25°C (Note 1)

A

Operating Junction and Storage Temperature

Range
Continuous Source Current (Body Diode) I
Lead Temperature for Soldering Purposes

(1/8″ from case for 10 seconds)

THERMAL RESISTANCE RATINGS

Thermal Resistance

- Junction- to- Ambient - Steady State (Note 1)

- Junction-to-Ambient - t ≤ 10 s (Note 1)

- Junction-to-Lead - Steady State (Note 2)

1. Surface-mounted on FR4 board using 1″ sq pad size (Cu area = 1.127 in sq
[1 oz] including traces)

2. Surface-mounted on FR4 board using the minimum recommended pad size
(Cu area = TBD in sq)

This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.

= 25°C unless otherwise noted)

A

= 25°C (Note 1)

A

DSS

I

I

DM

P

TJ, T

T

R
R
R

GS







-20 V
±20 V

A

°C

°C/W

D

stg

L

JA
JA

JL

-6.5

-30

1.1 W

-55 to
150

-0.9 A
260 °C

TBD
TBD
TBD

D

S

P-Channel MOSFET

S

G

D

MARKING DIAGRAM &

PIN ASSIGNMENT

8

SO-8
CASE 751
STYLE 12

Source-1

1

Gate-1

Source-2

Gate-2

XXX = Specific Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week

18

XXXXXX

ALYW

Top View

Drain-1
Drain-1
Drain-2
Drain-2

ORDERING INFORMATION

Device Package Shipping

NTMD4102PR2 SO-8 2500/Tape & Reel

 Semiconductor Components Industries, LLC, 2003

March, 2003 - Rev. 0

1 Publication Order Number:

NTMD4102PR2/D

NTMD4102PR2

)

V

S

V)

(V

GS

5 V, V

DS

)

dISD/dt

100 A/s, I

A)

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

A

Characteristic Symbol Min Typ Max Unit

OFF CHARACTERISTICS

Drain-to-Source Breakdown Voltage (Note 3)

= 0 V, ID = 250 A)

(V

GS

Zero Gate Voltage Drain Current (Note 3)

(V

= 0 V, VDS = -16 V)

GS

Gate-to-Source Leakage Current

(V

= ±20 V, VDS = 0 V)

GS

ON CHARACTERISTICS

Gate Threshold Voltage (Note 3)

= VDS, ID = -250 A)

(V

GS

Drain-to-Source On-Resistance

(V

= -10 V, ID = -8.5 A)

GS

= -4.5 V, ID = -6.5 A)

(V

GS

Forward Transconductance (VDS = -10 V, ID = -8.4 A) g

CHARGES, CAPACITANCES & GATE RESISTANCE

Input Capacitance
Output Capacitance
Reverse Transfer Capacitance

(VGS = 0 V, f = 1 MHz,

= -10

V

= -10 V

D

Total Gate Charge (VGS = -4.5 V, VDS = -10 V,

I

= -8.4 A)

D

Threshold Gate Charge (VGS = -4.5 V, VDS = -10 V,

= -8.4 A)

I

D

Gate-to-Source Gate Charge (VDS = -10 V, ID = -8.4 A) Q
Gate-to-Drain “Miller” Charge (VDS = -10 V, ID = -8.4 A) Q
Output Charge (VDS = -10 V, VGS = 0 V) Q
Gate Resistance R

SWITCHING CHARACTERISTICS (Note 4)

Turn-On Delay Time
Rise Time
Turn-Off Delay Time

(VGS = -4.5 V, VDS = -10 V,

4.

I

= -1.0 A, RG = 6.0 Ω)

D

10 V,

Fall Time t

DRAIN-SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage

(VGS = 0 V, ISD = -1.7 A) V
Reverse Recovery Time
Charge Time

(VGS = 0 V, VDS = -10 V,

dI

/dt = 100 A/s, I

=

= -1.7 A

= -1.7

SD

Discharge Time
Reverse Recovery Charge Q

3. Pulse Test: Pulse Width ≤300 µs, Duty Cycle ≤ 2%.

4. Switching characteristics are independent of operating junction temperature.

V

(BR)DSS

I

DSS

I

GSS

V

GS(th)

R

DS(on)

C
C
C

Q

G(tot)

Q

G(th)

OSS

t

d(on)

t

d(off)

t

FS

iss

oss

rss

GS
GD

t

SD

rr

t

a

t

b

-20 - - V

- - -1.0 A

- - ±100 nA

-1.0 - - V

m

-

-

TBD
TBD

19
30

- TBD - S

- TBD - pF

- TBD -

- TBD -

- TBD TBD nC

- TBD TBD nC

- TBD - nC

- TBD - nC

- TBD - nC

G

r

- TBD - 

- TBD -

- TBD -

ns

- TBD -

f

- TBD -

- TBD TBD V

- TBD TBD ns

- TBD - ns

- TBD - ns

rr

- TBD - nC

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