ON Semiconductor NCP5603 Technical data
NCP5603
High Efficiency Charge Pump
Converter
The NCP5603 is an integrated circuit dedicated to the medium
power White LED applications. The power conversion is achieved by
means of a charge pump structure, using two external ceramic
capacitors, making the system extremely tiny. The device supplies a
constant voltage to the load from a low battery voltage source. It is
particularly suited for the High Efficiency LED used in low cost, low
power applications, with high extended battery life.
Features
•Wide Battery Supply Voltage Range: 2.7 < V
•Automatic Operating Mode 1X, 1.5X and 2X Improves Efficiency
•Dimmable Output Current
•Up to 350 mA Output Pulsed Current
•Selectable Output Voltage
•High Efficiency Up To 90%
•Supports 2.5 kV ESD, Human Body Model
•Supports 200 V Machine Model ESD
•Low 40 mA Short Circuit Current
•Pb-Free Package is Available
< 5.5 V
CC
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MARKING
DIAGRAM
5603
DFN10, 3x3
MN SUFFIX
CASE 485C
5603 = Specific Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb-Free Package
(Note: Microdot may be in either location)
ALYWG
G
Applications
•High Power LED
•Back Light Display
•High Power Flash
PIN CONNECTIONS
C2P
V
1
out
2
C1P
V
3
bat
Fsel
4
Vsel
5
(Top View)
ORDERING INFORMATION
Device Package Shipping
NCP5603MNR2 DFN10 3000/ Tape & Reel
NCP5603MNR2G
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
DFN10
(Pb-Free)
10
9
C1N
GND
8
7
C2N
EN
6
†
3000/ Tape & Reel
© Semiconductor Components Industries, LLC, 2007
July, 2007 - Rev. 2
1 Publication Order Number:
NCP5603/D
GND
C3
4.7 mF/16 V
1 mF/16 V
PWM
FSEL
VSEL
NCP5603
V
bat
U1
3
V
C1
GND
2
C1P
9
C1N
6
EN/PWM
4
Fsel
5
Vsel
8
GND
bat
NCP5603
C2N
C2P
V
out
7
10
1
D1
C2
1 mF/16 V
LWT67C
D2
C4
1 mF/16 V
LWT67C
D3
GND
LWT67C
LWT67C
D4
R1
10 W
Figure 1. Typical Application
R2
10 W
GND
R3
R4
10 W
10 W
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NCP5603
V
bat
3
V
bat
Fsel
Vsel
V
bat
10
C2P
7
C2N
Thermal Shutdown
9
C1N
V
bat
POWER SWITCHES
2
C1P
LEVEL SHIFTER AND MOSFET DRIVE
CONTROL
4
GND
V
bat
V
out
1
V
out
LOGIC AND ANALOG
5
-
+
EN
6
GND
BANDGAP
GND
8
GND
Figure 2. Block Diagram
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NCP5603
PIN FUNCTION DESCRIPTION
Pin Symbol Type Description
1 V
out
2 C1N POWER One side of the external charge pump capacitor (C
3 V
bat
4 Fsel INPUT, Digital This pin is used to program the operating frequency:
5 Vsel INPUT, Digital This pin setup the output voltage:
6 EN/PWM INPUT, Digital This pin controls the activity of the NCP5603 chip:
7 C2N POWER One side of the external charge pump capacitor (C
8 GND GROUND This pin combines the Signal ground and the Power ground and must be connected to the
9 C1P POWER One side of the external charge pump capacitor (C
10 C2P POWER One side of the external charge pump capacitor is connected to this pin, associated with
1. Using ceramic 16 V working voltage capacitors is recommended to compensate the DC bias effect encountered with such type of capacitors.
2. Any external impedance connected to pin 6 shall be 10 kW or higher.
OUTPUT, PWR This pin supplies the regulated voltage to the external LED. Since high current transients
are present in this pin, care must be observed to avoid voltage spikes in the system. Good
high frequency layout technique must be observed.
) is connected to this pin, associated
FLY
with C1P, pin 9. Using low ESR ceramic capacitor is recommended to optimize the Charge
Pump efficiency.
POWER This pin shall be connected to the power source, and must be decoupled to Ground by a
low ESR capacitor (2.2 mF/6.3 V ceramic or better (see Note 1)).
Fsel = 0 → Fop = 262 kHz
Fsel = 1 → Fop = 650 kHz
Vsel = 0 → V
Vsel = 1 → V
= 4.5 V
out
= 5.0 V
out
EN/PWM = Low → the chip is deactivated, the load is disconnected
EN/PWM = High → the chip is activated and the load is connected to the
regulated output current.
The NCP5603 can operate either in a continuous mode (EN/PWM = High), or can be
controlled by a PWM pulse applied to EN/PWM to dim the output light. When EN/PWM is
Low, the external load is disconnected from the converter, providing a very low standby
current. The pull down built-in resistance makes sure the chip is deactivated even if the
EN/PWM pin is disconnected (see Note 2).
) is connected to this pin, associated
FLY
with C2P, pin 10. Using low ESR ceramic capacitor is recommended to optimize the
Charge Pump efficiency.
system ground. Using good quality ground plane is mandatory to avoid spikes on the logic
signal lines.
) is connected to this pin, associated
FLY
with C1N, pin 2. Using low ESR ceramic capacitor is recommended to optimize the Charge
Pump efficiency.
C2N, pin 7. Using low ESR ceramic capacitor is recommended to optimize the Charge
Pump efficiency.
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