ON Semiconductor NCP5602 Technical data

NCP5602

l

High Efficiency Ultra Small
Thinnest White LED Driver

The NCP5602 product is a dual output LED driver dedicated to the

LCD display backlighting.

The built−in DC−DC converter is based on a high efficient charge
pump structure with operating mode 1x and 1.5x. It provides a peak
87% efficiency together with a 0.2% LED to LED matching.

Features

• 2.7 to 5.5 V Input Voltage Range

• 87% Peak Efficiency with 1x and 1.5x Mode

• ICON Function Implemented

• Built−in Short Circuit Protection

• Provides Two Independent LED Drives

• Support I2C Protocol

• Smallest Available Package on the Market

• Tight 0.2% LED to LED Matching

• This is a Pb−Free Device

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MARKING
DIAGRAM

LLGA12 (2x2 mm)

MU SUFFIX

CASE 513AA

1

ZA = Specific Device Code
M = Date Code
G = Pb−Free Package

(Note: Microdot may be in either location)

ZA M G

G

T ypical Applications

• Portable Back Light

• Digital Cellular Phone Camera Photo Flash

• LCD and Key Board Simultaneously Drive

GND

I2C−SCL

I2C−SDA

C3

1 mF/6.3 V

10 k

GND

220 nF/10 V

Vbat

12

Vbat

SCL
SDA

IREF

GND

C1N

R1

11

6
5

4

1

Figure 1. Typical Multiple White LED Driver

10

C1P

U1
NCP5602

220 nF/10 V

9

C2N

8

C2P

Vout

LED1

LED/ICON

1 mF/10 V

7

D1

2

LWY87SG

D2

LWY87SG

3

C4

PIN CONNECTIONS

GND

C1N

LED1
LED2

IREF

SDA

SCL

GND

1

2 12 11
3
4
5
6

(Top View)

ORDERING INFORMATION

Device Package Shipping†

NCP5602MUTBG LLGA12

(Pb−Free)

†For information on tape and reel specifications,

including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.

3000 Tape & Ree

10

9
8
7

Vbat
C1P

C2N
C2P
VOUT

© Semiconductor Components Industries, LLC, 2006

July, 2006 − Rev . 1

1 Publication Order Number:

NCP5602/D

Vbat

C1

NCP5602

220 nF 220 nF

12 10C29 8

C4

GND

1 mF/6.3 V

C3

GND

1 mF/6.3 V

SCL

SDA

R1

GND 4

100 k

GND

11

6
5

Vbat

DIGITAL CONTROL

CHARGE PUMP

DC−DC CONVERTER

OVERVOLTAGE

Vbat

Q1

Q2

Vout

7

LWT67C

LWT67C

D1

D2

2

3

ANALOG CONTROL

1

OVERTEMPERATURE

CURRENT CONTROL

GND

ICON

Figure 2. Simplified Block Diagram

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2

NCP5602

PIN FUNCTION DESCRIPTION

Pin No. Symbol Function Description

1 GND POWER This pin is the GROUND signal for the analog and digital blocks and must be

2 LED1 INPUT, POWER This pin sinks to ground and monitors the current flowing into the first LED,

3 LED2 INPUT, POWER This pin sinks to ground and monitors the current flowing into the second

4 I

REF

INPUT, ANALOG This pin provides the reference current, based on the internal bandgap

5 SDA INPUT, DIGITAL This pin carries the data provided by the I2C protocol. The content of the

6 SCL INPUT, DIGITAL This pin carries the I2C clock to control the DC−DC converter and to set up

7 VOUT OUTPUT, POWER This pin provides the output voltage supplied by the DC−DC converter. The

8 C2P POWER One side of the external charge pump capacitor (C

9 C2N POWER One side of the external charge pump capacitor (C

10 C1P POWER One side of the external charge pump capacitor (C

11 VBAT INPUT, POWER Input Battery voltage to supply the analog and digital blocks. The pin must be

12 C1N POWER One side of the external charge pump capacitor (C

1. Using low ESR ceramic capacitor is mandatory to optimize the Charge Pump efficiency.

2. Total DC−DC output current is limited to 60 mA.

connected to the system ground. This pin is the GROUND reference for the
DC−DC converter and the output current control. The pin must be connected
to the system ground, a ground plane being strongly recommended.

intended to be used in backlight application. The current is limited to 30 mA
maximum (see Note 2). When the ICON bit of the LED−REG register is
High, the LED2 fulfills the ICON function. In this case, LED1 is deactivated.

LED, intended to be used in backlight application. The current is limited to
30 mA maximum (see Note 2). When the ICON bit of the LED−REG register
is High, the LED2 fulfills the ICON function. In this case, LED1 is
deactivated. The ICON current is 600 mA typical.

voltage reference, to control the output current flowing in the LED. A 1%
tolerance, or better, resistor shall be used to get the highest accuracy of the
LED biases. An external current source can be used to bias this pin to dim
the light coming out of the LED.

In no case shall the voltage at pin 4 be forced either higher or lower than the
600 mV provided by the internal reference.

SDA byte is used to program the mode of operation and to set up the output
current (see Table 2).

the output current. The SCL clock is associated with the SDA signal.

Vout pin must be bypassed by 1.0 mF ceramic capacitor located as close as
possible to the pin to properly bypass the output voltage to ground. The
circuit shall not operate without such bypass capacitor properly connected to
the Vout pin.

The output voltage is internally clamped to 5.5 V maximum in the event of no
load situation. On the other hand, the output current is limited to 40 mA
(typical) in the event of a short circuit to ground.

) is connected to this

FLY

pin, associated with C2N (see Note 1).

) is connected to this

FLY

pin, associated with C2P (see Note 1).

) is connected to this

FLY

pin, associated with C1N, pin 11 (see Note 1).

decoupled to ground by a 1.0 mF ceramic capacitor.

) is connected to this

FLY

pin, associated with C1P, pin 10 (see Note 1).

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NCP5602

MAXIMUM RATINGS

Rating Symbol Value Unit

Power Supply V

BAT

Output Power Supply Vout 7.0 V
Digital Input Voltage

SCL, SDA −0.3 < V < V

Digital Input Current
Human Body Model: R = 1500 W, C = 100 pF (Note 3)

ESD 2.0

Machine Model
LLGA12 Package

Power Dissipation @ TA = +85°C (Note 4)
Thermal Resistance, Junction−to−Case

Thermal Resistance, Junction−to−Air
Operating Ambient Temperature Range T
Operating Junction Temperature Range T
Maximum Junction Temperature T
Storage Temperature Range T

R

R

P

D

q

JC

q

JA
A
J

Jmax

stg

Latchup Current Maximum Rating per JEDEC Standard: JESD78 − "100 mA

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.

3. This device series contains ESD protection and exceeds the following tests:
Human Body Model (HBM) "2.0 kV per JEDEC standard: JESD22−A114.
Machine Model (MM) "200V per JEDEC standard: JESD22−A115.

4. The maximum package power dissipation limit must not be exceeded.

5. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A.

−0.3 <V < 7.0 V

BAT

1.0

mA

200

200

51

200

mW

°C/W
°C/W

−40 to +85 °C

−40 to +125 °C
+150 °C

−65 to +150 °C

V

kV

V

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4

NCP5602

POWER SUPPLY SECTION (Typical values are referenced to T

= +25°C, Min & Max values are referenced −40°C to +85°C ambient

A

temperature, operating conditions 2.85 V < Vbat < 5.5 V , unless otherwise noted.)

Rating Pin Symbol Min Typ Max Unit

Power Supply 11 V
Continuous DC Current in the Load @ Vf = 3.0 V , ICON = L

7 I
@ 3.2 V < Vbat < 5.5 V
@ 3.0 V < Vbat < 5.5 V

Output ICON Current (ICON = H) @ Tj = + 25°C, Vf = 2.8 V,

7 I

ICONTROL

bat

out

2.7 − 5.5 V
mA

60
45

−

−

−

−

− 600 850 mA

Vbat = 3.6 V
Continuous Output Short Circuit Current 7 Isch − 45 150 mA
Output Voltage Compliance (OVP) 7 Vout 4.8 − 5.7 V
DC−DC Start Time (Cout = 1.0 mF) 3.0 V < Vbat = Nominal < 5.5 V

12 Tstart − 150 − ms

from Last ACK Bit to Full Load Operation
Output Voltage T urn Off Time from Last ACK Bit to V out = 5% 12 Toff − 300 − ms
Standby Current, Vbat = 3.6 V , Iout = 0 mA, ICON = L

@ SCL = SDA = L

@ SCL = SDA = H (No Port Activity)
Operating Current, @ Iout = 0 mA, ICON = H, Vbat = 3.6 V 11 I
Output LED to LED Current Matching, @ 3.0 V < Vbat < 4.2 V ,

I

= 10 mA, LED1 & LED2 are Identical −25°C < Ta < 85°C

LED

Output Current Tolerance @ Vbat = 3.6 V, I

= 10 mA −25°C < Ta

LED

11 I

2, 3 I

2, 3 I

stdb

op

MAT

TOL

− −

mA

6.0
12

− 750 − mA

1.0 "0.2 1.0 %

− "3.0 − %

< 85°C
Charge Pump Operating Frequency −40°C < Ta < 85°C − Fpwr − 1.0 − MHz
Thermal Shutdown Protection − T
Thermal Shutdown Protection Hysteresis − T
Efficiency

− LED1 = LED2 = 10 mA, Vf = 3.2 V , Vbat = 3.2 V (Total = 20 mA)

− LED1 = LED2 = 30 mA, Vf = 3.4 V , Vbat = 3.75 V (Total = 60 mA)

−

−

E

SD

SDH

PWR

− 160 − °C

− 30 − °C

−

−

87
84

−

−

%

ANALOG SECTION (Typical values are referenced to T

= +25°C, Min & Max values are referenced −40°C to +85°C ambient

A

temperature, operating conditions 2.85 V < Vbat < 5.5 V , unless otherwise noted.)

Rating Pin Symbol Min Typ Max Unit

Reference Current @ Vref = 600 mV (Note 7) 4 I
Reference Voltage (Note 7) 4 V
Reference Current (IREF) Current Ratio (see Table 2) − I

REF

REF

LEDR

1.0 − 60 mA

−3% 600 +3% mV

− 16 − −

6. The overall output current tolerance depends upon the accuracy of the external resistor. Using 1% or better resistor is recommended.

7. The external circuit must not force the I
one can force to run the normal operation.

DIGITAL PARAMETERS SECTION (Typical values are referenced to T

pin voltage either higher or lower than the 600 mV specified. The limits represent the min/max values

REF

= +25°C, Min & Max values are referenced −40°C to +85°C

A

ambient temperature, operating conditions 2.85 V < Vbat < 5.5 V , unless otherwise noted.) Note: Digital inputs undershoot < − 0.30 V to
ground, Digital inputs overshoot < 0.30 V to V

BAT

.

Rating Pin Symbol Min Typ Max Unit

InputI2C Clock Frequency (Note 8) 6 F
Positive Going Input High Voltage Threshold, SCL, SDA Signals 5, 6 V
Negative Going Input High Voltage Threshold, SCL, SDA

5, 6 V

SCK

IH

IL

− − 400 kHz

1.3 − V

BAT

0 − 0.4 V

Signals

8. Parameter not tested in production, guaranteed by design.

V

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NCP5602

VBandgap

APPLICATION INFORMATION

DC−DC Operation

The converter is based on a charge pump technique to
generate a DC voltage capable to supply the White LED
load. The system regulates the current flowing into each
LED by means of internal current mirrors associated with
the white diodes. Consequently, the output voltage will be
equal to the Vf of the LED, plus the drop voltage (ranging
from 200 mV to 400 mV, depending upon the output
current) developed across the internal NMOS mirror.
Typically, assuming a standard white LED forward biased
at 10 mA, the output voltage will be 3.8 V.

The built−in OVP circuit continuously monitor each
output and stops the converter when the voltage is above

5.0 V. The converter resumes to normal operation when the
voltage drops below 5.0 V (no latchup mechanism).
Consequently, the chip can operate with no load during any
test procedures.

Load Current Calculation

The load current is derived from the 600 mV reference
voltage provided by the internal Bandgap associated to the
external resistor connected across I
Figure 3). In any case, no voltage shall be forced at I

pin and Ground (see

REF

REF

pin, either downward or upward.

The reference current is multiplied by the constant
k = 250 to yield the output load current. Since the reference
voltage is based on a temperature compensated Bandgap,
a tight tolerance resistor will provide a very accurate load
current. The resistor is calculated from the Ohm’s law
(R

= Vref/I

bias

) and a more practical equation can be

REF

arranged to define the resistor value for a given output
current:

R

+ (Vref * k)ńIout

bias

R

+ (0.6*250)ńIout

bias

(eq. 1)

R

+ 150ńIout

bias

(eq. 2)

Consequently, the resistor value will range between

R

= 150/30 mA = 5000 W and R

bias

= 150/0.5 mA =

bias

300 kW. Obviously, the tolerance of such a resistor must be
1% or better, with a 100 ppm thermal coefficient, to get the
expected overall tolerance.

LED Return

+

600mV

−

I

REF

Pin 4

R1

Note: The I

GND

Figure 3. Basic Reference Current Source

biased by an external voltage.

pin must never be

REF

GND

Pin 2 & 3

Load Connection

The NCP5602 chip is capable to drive the two LED
simultaneously, as depicted in Figure 1, but the load can be
arranged to accommodate one or two LED if necessary in
the application (see Figure 4). In this case, the two current
mirrors can be connected in parallel to drive a single power
full LED, thus yielding 60 mA current capability in a single
LED.

7

NCP5602

2
3

7

D1

Figure 4. Typical Single and Double LED Connections

LWY8SG

C4

GND

1 mF/6.3 V

NCP5602

2
3

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6

D1

LWY8SG

D2

LWY8SG

C4

1 mF/6.3 V

GND

NCP5602

Finally, an external network can be connected across
Vout and ground , but the current through such network will
not be regulated by the NCP5602 chip (see Figure 5). On

GND

NCP5602

Figure 5. Extra Load Connected to Vout

C4

7

20 mA

D1

2
3

I2C Protocol

The standard I2C protocol is used to transfer the data
from the MCU to the NCP5602. Leaving aside the

top of that, the total current out of the Vout pin shall be
limited to 60 mA.

1 mF/6.3 V

5 mA

20 mA

LWY8SG

D2

LWY8SG

LWY8SG

D3

220RR1220R

GND

5 mA

D4

R2

LWY8SG

Acknowledge bit, the NCP5602 does not return data back
to the MCU.

Figure 6. Basic I2C Timings

MSB LSB

START A7 A6 A5 A4 A3 A2 A1 R/W ACK

7 Bits Slave Address

Start condition sent by Master Sent by Slave

Figure 7. Peripheral Address Identification

B7 B6 B5 B4 B3 B2 B1 ACK STOP

B0

Sent by Slave

Sent by Master

Figure 8. Basic DATA Transfer from MCU to Peripheral

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NCP5602

The physical address of the NCP5602 is 1001 111X, the
X being the Read/Write identifier as defined by the I2C
specification. Since the NCP5602 does not return data, the
first byte of the I2C frame shall be 1001 1110 ($9E) as
depicted in Table 2.

T able 1. NCP5602 Physical I2C Address

B7 B6 B5 B4 B3 B2 B1 B0

1 0 0 1 1 1 1 0

To set up a new output current value, a full frame shall
be sent by the MCU. The frame contains three consecutive
bytes and shall fulfill the I2C specifications:

First byte : I2C address ³$9E
Second byte : internal register address ³$01
Third byte : output current value ³$00 to $1E
(0 mA to 30 mA, Assuming Rext = 10 kW)

The waveforms given in Figure 9 illustrate a typical
output current update.

Figure 9. Typical NCP5602 I2C Startup Sequence

Dimming

The built−in I2C interface provides a simple way to
accurately control the output current flowing in the two
LED. Such dimming is active under the NORMAL mode
only and the LED2 current cannot be adjusted when the
ICON mode is active.

The internal register LED−REG[0..7] is set up by the
content of the SDA byte sent by the external MCU as
depicted in Table 2. For typical application, the 60 mA
reference current forced by the external resistor is
multiply by 16 to get a 1.0 mA/step in the output
LED. The waveforms given Figure 10 illustrate a normal
programming sequence.

Table 2. LED−REG[0..7] Internal Register Bits Assignment

B7 B6 B5 B4 B3 B2 B1 B0

RFU RFU ICON IREF*16*16 IREF*16*8 IREF*16*4 IREF*16*2 IREF*16

[B7,B6] = RFU:bits reserved for future use
B5 = ICON:control the NORMAL/ICON

mode of operation:

ICON = Low ³ Normal MODE takes place, the two

LED are activated and the current can be
adjusted from 0 mA to 30 mA maximum
per LED.

ICON = High ³ ICON mode takes place, LED#1 is

deactivated, the current to LED#2 being setup
to 450 mA. It is not possible to adjust this
current.

[B4..B0] = Output LED current. The content of these bits

is latched to the current reference on the 8th SCK
clock pulse.

The DC−DC converter is switched OFF and the two LED
are disconnected when LED−REG=$00.

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8

NCP5602

VCC

G

J2

When the ICON mode is activated, the DC−DC
converter is switched OFF, LED#1 is deactivated from the
VOUT and 450 mA are forced into LED#2. The

Figure 10. Output Current I2C Programming Sequence

2

POWER

J1

2
4
6
8

10 9

CONTROL

PORT

ND

1

GND

GND

VCC

SCL
SDA

TP1

TP2

SCL

SDA

1
3
5
7

4.7 mF/10 V
VCC

R1

10 k

C3

R2

IREFBK

10 k

11

6
5
4

1

waveforms, given Figure 11, illustrate the programming
sequence to activate the ICON.

220 nF/63 V

C1 C2

12

C1N

Vbat

SCL
SDA

IREF

GND

U1
NCP5602

Figure 11. ICON Programming Sequence

220 nF/63 V

10

C1P

9

C2N

8

Vout

LED1

LED/ICON

C2P

C4

GND

7

Vout

D1

LED1

2

LED2

3

4.7 mF/16 V

LWY8S

D2

LWY8S

R3

10 k

GND

Z1

GND

Figure 12. Demo Board Schematic Diagram

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9

NCP5602

Figure 13. LED Current Matching

Figure 14. Efficiency as a Function of VF, V

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10

bat

NCP5602

Figure 15. NCP5602 Demo Board

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11

NCP5602

PACKAGE DIMENSIONS

LLGA12

MU SUFFIX

CASE 513AA−01

ISSUE O

12X

REFERENCE

2 X

SEATING
PLANE

PIN ONE

2 X

C0.10

C0.08

11X

e/2

D

C0.10

C0.10

TOP VIEW

A

B

E

NOTES:

1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994 .

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN

0.15 AND 0.20 MM FROM TERMINAL.

4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.

MILLIMETERS

DIM MIN MAX

A 0.50 0.60

A1 0.00 0.05

b 0.15 0.25

D 2.00 BSC

D2 0.80 1.00

E 2.00 BSC

E2 0.55 0.65

e 0.40 BSC

K 0.25 −−−

L 0.30 0.50

L1 0.40 0.60

A

L1

2

SIDE VIEW

D2

C

SOLDERING FOOTPRINT*

9X

e

6

E2

2.06

0.66

2.30

1

0.93

12X

0.23

0.40
PITCH

0.91

A1

L

K

1

12

11

BOTTOM VIEW

7

12X

0.10 C

b

0.05 C

A BB

NOTE 3

11X

0.630.56

DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under
its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,
or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NCP5602/D

12