NCP5602
High Efficiency Ultra Small
Thinnest White LED Driver
The NCP5602 product is a dual output LED driver dedicated to the
LCD display backlighting.
The built−in DC−DC converter is based on a high efficient charge
pump structure with operating mode 1x and 1.5x. It provides a peak
87% efficiency together with a 0.2% LED to LED matching.
Features
• 2.7 to 5.5 V Input Voltage Range
• 87% Peak Efficiency with 1x and 1.5x Mode
• ICON Function Implemented
• Built−in Short Circuit Protection
• Provides Two Independent LED Drives
• Support I2C Protocol
• Smallest Available Package on the Market
• Tight 0.2% LED to LED Matching
• This is a Pb−Free Device
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MARKING
DIAGRAM
LLGA12 (2x2 mm)
MU SUFFIX
CASE 513AA
1
ZA = Specific Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
ZA M G
G
T ypical Applications
• Portable Back Light
• Digital Cellular Phone Camera Photo Flash
• LCD and Key Board Simultaneously Drive
GND
I2C−SCL
I2C−SDA
C3
1 mF/6.3 V
10 k
GND
220 nF/10 V
Vbat
12
Vbat
SCL
SDA
IREF
GND
C1N
R1
11
6
5
4
1
Figure 1. Typical Multiple White LED Driver
10
C1P
U1
NCP5602
220 nF/10 V
9
C2N
8
C2P
Vout
LED1
LED/ICON
1 mF/10 V
7
D1
2
LWY87SG
D2
LWY87SG
3
C4
PIN CONNECTIONS
GND
C1N
LED1
LED2
IREF
SDA
SCL
GND
1
2 12 11
3
4
5
6
(Top View)
ORDERING INFORMATION
Device Package Shipping†
NCP5602MUTBG LLGA12
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
3000 Tape & Ree
10
9
8
7
Vbat
C1P
C2N
C2P
VOUT
© Semiconductor Components Industries, LLC, 2006
July, 2006 − Rev . 1
1 Publication Order Number:
NCP5602/D
Vbat
NCP5602
220 nF 220 nF
12 10C29 8
C4
GND
1 mF/6.3 V
C3
GND
1 mF/6.3 V
SCL
SDA
R1
GND 4
100 k
GND
11
6
5
Vbat
DIGITAL CONTROL
CHARGE PUMP
DC−DC CONVERTER
OVERVOLTAGE
Vbat
Q1
Q2
Vout
7
LWT67C
LWT67C
D1
D2
2
3
ANALOG CONTROL
1
OVERTEMPERATURE
CURRENT CONTROL
GND
ICON
Figure 2. Simplified Block Diagram
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NCP5602
PIN FUNCTION DESCRIPTION
Pin No. Symbol Function Description
1 GND POWER This pin is the GROUND signal for the analog and digital blocks and must be
2 LED1 INPUT, POWER This pin sinks to ground and monitors the current flowing into the first LED,
3 LED2 INPUT, POWER This pin sinks to ground and monitors the current flowing into the second
4 I
REF
INPUT, ANALOG This pin provides the reference current, based on the internal bandgap
5 SDA INPUT, DIGITAL This pin carries the data provided by the I2C protocol. The content of the
6 SCL INPUT, DIGITAL This pin carries the I2C clock to control the DC−DC converter and to set up
7 VOUT OUTPUT, POWER This pin provides the output voltage supplied by the DC−DC converter. The
8 C2P POWER One side of the external charge pump capacitor (C
9 C2N POWER One side of the external charge pump capacitor (C
10 C1P POWER One side of the external charge pump capacitor (C
11 VBAT INPUT, POWER Input Battery voltage to supply the analog and digital blocks. The pin must be
12 C1N POWER One side of the external charge pump capacitor (C
1. Using low ESR ceramic capacitor is mandatory to optimize the Charge Pump efficiency.
2. Total DC−DC output current is limited to 60 mA.
connected to the system ground. This pin is the GROUND reference for the
DC−DC converter and the output current control. The pin must be connected
to the system ground, a ground plane being strongly recommended.
intended to be used in backlight application. The current is limited to 30 mA
maximum (see Note 2). When the ICON bit of the LED−REG register is
High, the LED2 fulfills the ICON function. In this case, LED1 is deactivated.
LED, intended to be used in backlight application. The current is limited to
30 mA maximum (see Note 2). When the ICON bit of the LED−REG register
is High, the LED2 fulfills the ICON function. In this case, LED1 is
deactivated. The ICON current is 600 mA typical.
voltage reference, to control the output current flowing in the LED. A 1%
tolerance, or better, resistor shall be used to get the highest accuracy of the
LED biases. An external current source can be used to bias this pin to dim
the light coming out of the LED.
In no case shall the voltage at pin 4 be forced either higher or lower than the
600 mV provided by the internal reference.
SDA byte is used to program the mode of operation and to set up the output
current (see Table 2).
the output current. The SCL clock is associated with the SDA signal.
Vout pin must be bypassed by 1.0 mF ceramic capacitor located as close as
possible to the pin to properly bypass the output voltage to ground. The
circuit shall not operate without such bypass capacitor properly connected to
the Vout pin.
The output voltage is internally clamped to 5.5 V maximum in the event of no
load situation. On the other hand, the output current is limited to 40 mA
(typical) in the event of a short circuit to ground.
) is connected to this
FLY
pin, associated with C2N (see Note 1).
) is connected to this
FLY
pin, associated with C2P (see Note 1).
) is connected to this
FLY
pin, associated with C1N, pin 11 (see Note 1).
decoupled to ground by a 1.0 mF ceramic capacitor.
) is connected to this
FLY
pin, associated with C1P, pin 10 (see Note 1).
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NCP5602
MAXIMUM RATINGS
Rating Symbol Value Unit
Power Supply V
BAT
Output Power Supply Vout 7.0 V
Digital Input Voltage
SCL, SDA −0.3 < V < V
Digital Input Current
Human Body Model: R = 1500 W, C = 100 pF (Note 3)
ESD 2.0
Machine Model
LLGA12 Package
Power Dissipation @ TA = +85°C (Note 4)
Thermal Resistance, Junction−to−Case
Thermal Resistance, Junction−to−Air
Operating Ambient Temperature Range T
Operating Junction Temperature Range T
Maximum Junction Temperature T
Storage Temperature Range T
R
R
P
D
q
JC
q
JA
A
J
Jmax
stg
Latchup Current Maximum Rating per JEDEC Standard: JESD78 − "100 mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
3. This device series contains ESD protection and exceeds the following tests:
Human Body Model (HBM) "2.0 kV per JEDEC standard: JESD22−A114.
Machine Model (MM) "200V per JEDEC standard: JESD22−A115.
4. The maximum package power dissipation limit must not be exceeded.
5. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020A.
−0.3 <V < 7.0 V
BAT
1.0
mA
200
200
51
200
mW
°C/W
°C/W
−40 to +85 °C
−40 to +125 °C
+150 °C
−65 to +150 °C
V
kV
V
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