ON Semiconductor NCP551, NCV551 Technical data

查询NCP551SN15T1供应商
NCP551, NCV551
150 mA CMOS Low Iq Low−Dropout Voltage Regulator
The NCP551 has been designed to be used with low cost ceramic capacitors and requires a minimum output capacitor of 0.1 F. The device is housed in the micro−miniature TSOP−5 surface mount package. Standard voltage versions are 1.5, 1.8, 2.5, 2.7, 2.8, 3.0, 3.2,
3.3, and 5.0 V. Other voltages are available in 100 mV steps.
Features
Low Quiescent Current of 4.0 A Typical
Maximum Operating Voltage of 12 V
Low Output Voltage Option
High Accuracy Output Voltage of 2.0%
Industrial Temperature Range of −40°C to 85°C
(NCV551, TA = −40°C to +125°C)
NCV Prefix for Automotive and Other Applications Requiring Site
and Control Changes
Pb−Free Packages are Available
T ypical Applications
Battery Powered Instruments
Hand−Held Instruments
Camcorders and Cameras
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5
1
TSOP−5
(SOT23−5, SC59−5)
SN SUFFIX
CASE 483
PIN CONNECTIONS AND
MARKING DIAGRAM
1
V
in
2
GND
Enable
See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet.
3
xxx = Version Y = Year W = Work Week
(Top View)
ORDERING INFORMATION
xxxYW
5
V
out
4
N/C
V
in
1
Thermal
Shutdown
Enable
OFF
Semiconductor Components Industries, LLC, 2004
August, 2004 − Rev. 9
ON
3
Figure 1. Representative Block Diagram
Driver w/
Current
Limit
GND
V
out
5
2
1 Publication Order Number:
NCP551/D
NCP551, NCV551
Á
Á
Á
Á
Á
Á
Á
PIN FUNCTION DESCRIPTION
Pin No.
1 2 3
ÁÁÁ
4 5
MAXIMUM RATINGS
Input Voltage Enable Voltage V Output Voltage Power Dissipation and Thermal Characteristics
Power Dissipation
Thermal Resistance, Junction−to−Ambient Operating Junction Temperature Operating Ambient Temperature NCP551
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Storage Temperature
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously . If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
1. This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per MIL−STD−883, Method 3015 Machine Model Method 200 V
2. Latchup capability (85°C) 100 mA DC with trigger voltage.
Pin Name
V
in
GND
Enable
ÁÁÁÁ
N/C V
out
Description
Positive power supply input voltage. Power supply ground. This input is used to place the device into low−power standby. When this input is pulled low, the
device is disabled. If this function is not used, Enable should be connected to Vin.
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No Internal Connection. Regulated output voltage.
Rating Symbol Value Unit
NCV551
V
in
EN
V
out
P
D
R
JA
T
J
T
A
ÁÁÁ
T
stg
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0 to 12
−0.3 to V
−0.3 to V
+0.3 V
in
+0.3
in
Internally Limited
250
+150
−40 to +85
−40 to +125
−55 to +150
V
V
W
°C/W
°C °C
ÁÁ
°C
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NCP551, NCV551
ELECTRICAL CHARACTERISTICS
(V
= V
in
Output Voltage (TA = 25°C, I
1.5 V
1.8 V
2.5 V
2.7 V
2.8 V
3.0 V
3.2 V
3.3 V
5.0 V
Output Voltage (TA = T
1.5 V
1.8 V
2.5 V
2.7 V
2.8 V
3.0 V
3.2 V
3.3 V
5.0 V Line Regulation (Vin = V Load Regulation (I Output Current (V
1.5 V−2.0 V (V
2.1 V−3.0 V (V
3.1 V−4.0 V (V
4.1 V−5.0 V (V Dropout Voltage (I
1.5 V, 1.8 V, 2.5 V
2.7 V, 2.8 V, 3.0 V, 3.2 V, 3.3 V, 5.0 V Quiescent Current
(Enable Input = 0 V)
(Enable Input = V Output Voltage Temperature Coefficient T Enable Input Threshold Voltage
(Voltage Increasing, Output Turns On, Logic High)
(Voltage Decreasing, Output Turns Off, Logic Low) Output Short Circuit Current (V
1.5 V−2.0 V (V
2.1 V−3.0 V (V
3.1 V−4.0 V (V
4.1 V−5.0 V (V
3. Maximum package power dissipation limits must be observed.
4. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
5. NCP551 T NCV551 T
+ 1.0 V, VEN = Vin, Cin = 1.0 F, C
out(nom.)
Characteristic
= 10 mA)
out
to T
low
high
+ 1.0 V to 12 V, I
out
= 10 mA to 150 mA, Vin = V
out
= (V
out
= 4.0 V)
in
= 5.0 V)
in
= 6.0 V)
in
= 8.0 V)
in
out
in
= 4.0 V)
in
= 5.0 V)
in
= 6.0 V)
in
= 8.0 V)
in
= −40°CT
low
= −40°CT
low
at I
out
= 10 mA, Measured at V
, I
= 1.0 mA to I
out
T
J(max)
PD
, I
= 10 mA)
out
= 100 mA) −3%)
out
o(nom.)
= 0 V)
out
T
A
R
JA
= +85°C
high
= +125°C.
high
= 1.0 F, TJ = 25°C, unless otherwise noted.)
out
Symbol Min Typ Max Unit
V
out
V
out
= 10 mA) Reg
out
+ 2.0 V) Reg
out
−3.0%)
out
I
o(nom.)
Vin−V
I
line
load
out
Q
)
c
V
th(en)
I
out(max)
1.455
1.746
2.425
2.646
2.744
2.94
3.136
3.234
4.90
1.440
1.728
2.400
2.619
2.716
2.910
3.104
3.201
4.850
1.5
1.8
2.5
2.7
2.8
3.0
3.2
3.3
5.0
1.5
1.8
2.5
2.7
2.8
3.0
3.2
3.3
5.0
1.545
1.854
2.575
2.754
2.856
3.06
3.264
3.366
5.10
1.560
1.872
2.600
2.781
2.884
3.09
3.296
3.399
5.150
10 30 mV
40 65 mV
150 150 150 150
130
40
0.1
4.0
220 150
1.0
8.0
100 ppm/°C
1.3
160 160 160 160
350 350 350 350
0.3
600 600 600 600
V
V
mA
mV
A
V
mA
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NCP551, NCV551
DEFINITIONS
Load Regulation
The change in output voltage for a change in output
current at a constant temperature.
Dropout Voltage
The input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. Measured when the o utput d rops 3% b elow i ts nominal. The junction temperature, load current, and minimum input supply r equirements a ffect t he d ropout l e vel.
Maximum Power Dissipation
The maximum total dissipation for which the regulator will operate within its specifications.
Quiescent Current
The quiescent current is the current which flows through the ground when the LDO operates without a load on its output: internal IC operation, bias, etc. When the LDO becomes loaded, this term is called the Ground current. It is actually the difference between the input current (measured through the LDO input pin) and the output current.
Line Regulation
The change in output voltage for a change in input voltage. The measurement is made under conditions of low dissipation or b y using pulse technique such that the average chip temperature is not significantly affected.
Line Transient Response
Typical over and undershoot response when input voltage is excited with a given slope.
Thermal Protection
Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated at typically 160°C, the regulator turns off. This feature is provided to prevent failures from accidental overheating.
Maximum Package Power Dissipation
The maximum power package dissipation is the power dissipation level at which the junction temperature reaches its maximum operating value, i.e. 125°C. Depending on the ambient power dissipation and thus the maximum available output current.
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NCP551, NCV551
0
GROUND CURRENT (A)
3.35
3.3
3.25
3.2
3.15
3.1
3.05
3.5
2.5
3.45
V
= 2.8 V
out
V
out
= 3.3 V
3.4
3.35
3.3
3.25
GROUND CURRENT (A)
3.2
3.15
0
, OUTPUT CURRENT (mA)
I
out
755025
Figure 2. Ground Pin Current versus
Output Current
4
100 150125
0
, OUTPUT CURRENT (mA)
I
out
755025
Figure 3. Ground Pin Current versus
Output Current
4
100 150125
3.5
3
3
2.5
2
1.5 1
GROUND PIN CURRENT (A)
0.5
V I
out(nom)
= 25 mA
out
= 2.8 V
1.5
GROUND PIN CURRENT (A)
0.5
0
086421012
14
Vin, INPUT VOLTAGE (VOLTS)
Figure 4. Ground Pin Current versus
Input Voltage
8
, INPUT
in
V
VOLTAGE (V)
400 200
−200
DEVIATION (mV)
OUTPUT VOLTAGE
−400
6 4
Vin = 3.8 V to 4.8 V V
= 2.8 V
out
= 1 F
C
out
I
= 10 mA
out
0
0
600
400200
800 1600
12001000 1400
TIME (s)
, INPUT
in
V
VOLTAGE (V)
400 200
−200
DEVIATION (mV)
OUTPUT VOLTAGE
−400
−600
2
1
V I
out(nom)
= 25 mA
out
= 3.3 V
0
086421012
, INPUT VOLTAGE (VOLTS)
V
in
14
Figure 5. Ground Pin Current versus
Input Voltage
6 4
Vin = 3.8 V to 4.8 V V
= 2.8 V
out
= 1 F
C
out
I
= 100 mA
out
0
0
600400200 800 16
12001000 1400
TIME (s)
Figure 6. Line Transient Response Figure 7. Line Transient Response
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NCP551, NCV551
0
0
, INPUT
in
V
VOLTAGE (V)
400 200
−200
DEVIATION (mV)
OUTPUT VOLTAGE
−400
−600
, INPUT
in
800
V
VOLTAGE (V)
600 400 200
−200
DEVIATION (mV)
−400
OUTPUT VOLTAGE
−600
6 4
Vin = 3.8 V to 4.8 V V
= 2.8 V
out
= 1 F
C
out
I
= 150 mA
out
0
, INPUT
in
V
VOLTAGE (V)
400 200
6 4
Vin = 4.3 V to 5.3 V V
= 3.3 V
out
= 1 F
C
out
= 10 mA
I
out
0
−200
DEVIATION (mV)
−400
OUTPUT VOLTAGE
−600
0
600
400200
800 1600
12001000 1400
TIME (s)
0
600400200 800 160
12001000 1400
TIME (s)
Figure 8. Line Transient Response Figure 9. Line Transient Response
6 4
Vin = 4.3 V to 5.3 V V
= 3.3 V
out
= 1 F
C
out
I
= 100 mA
out
0
500
300100
700 1900
1100900 1700
15001300
TIME (s)
, INPUT
in
V
VOLTAGE (V)
600 400 200
−200
DEVIATION (mV)
OUTPUT VOLTAGE
−400
−600
6 4
Vin = 4.3 V to 5.3 V V
= 3.3 V
out
= 1 F
C
out
I
= 150 mA
out
0
0
400 800 200
1200
1600
TIME (s)
150
, OUTPUT
out
I
CURRENT (mA)
0
0
−500
−1000
DEVIATION (mV)
OUTPUT VOLTAGE
0
Figure 10. Line Transient Response Figure 11. Line Transient Response
I
= 3.0 mA − 150 mA
out
V
= 2.8 V
out
C
= 10 mF
out
150
, OUTPUT
out
I
CURRENT (mA)
0
I
= 3.0 mA − 150 mA
out
V C
out
out
= 2.8 V
= 10 mF
1000
500
0
−500
DEVIATION (mV)
456789
321
TIME (ms)
OUTPUT VOLTAGE
0321 456789
TIME (ms)
Figure 12. Load Transient Response ON Figure 13. Load Transient Response OFF
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150
0
, OUTPUT
out
I
CURRENT (mA)
0
1000
500
0
−500
DEVIATION (mV)
OUTPUT VOLTAGE
0321456789 0321 456789
I
out
V C
TIME (ms)
NCP551, NCV551
= 3.0 mA − 150 mA
= 3.3 V
out
= 10 mF
out
I
out
150
V C
, OUTPUT
out
I
CURRENT (mA)
0
−500
−1000
DEVIATION (mV)
OUTPUT VOLTAGE
= 3.0 mA − 150 mA
= 3.3 V
out
= 10 mF
out
TIME (ms)
3 2 1
ENABLE
0
VOLTAGE (V)
3 2 1
, OUTPUT
out
VOLTAGE (V)
V
0
0
3
2.5
2
1.5
1
, OUTPUT VOLTAGE (VOLTS)
0.5
out
V
0
0
Figure 14. Load Transient Response OFF
Vin = 4.3 V V
= 3.3 V
out
= 3.3 k
R
O
V
= 2.0 V
EN
400200
600
Co = 1 F
800 200012001000 1400
TIME (s)
Co = 10 F
1600 1800 0
Figure 16. Turn−On Response
Vin = 0 V to 12 V V I C C V
642
V
, INPUT VOLTAGE (VOLTS)
in
out(nom)
= 10 mA
out
= 1 F
in
= 1 F
out
= V
EN
81210
= 2.8 V
in
3 2 1
ENABLE
0
VOLTAGE (V)
3 2 1
, OUTPUT
out
VOLTAGE (V)
V
0
3.5
3
2.5
2
1.5
1
, OUTPUT VOLTAGE (VOLTS)
0.5
out
V
0
0
Figure 15. Load Transient Response ON
Vin = 3.8 V V
= 2.8 V
out
= 2.8 k
R
O
V
= 2.0 V
EN
400200
600
Co = 1 F
Co = 10 F
800 200
12001000 1400
1600 1800
TIME (s)
Figure 17. Turn−On Response
Vin = 0 V to 12 V V
= 3.3 V
out
= 10 mA
I
out
C
= 1 F
in
C
= 1 F
out
V
= V
EN
in
642
V
, INPUT VOLTAGE (VOLTS)
in
81210
Figure 18. Output Voltage versus Input Voltage Figure 19. Output Voltage versus Input Voltage
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NCP551, NCV551
APPLICATIONS INFORMATION
A typical application circuit for the NCP551 series is
shown in Figure 20.
Input Decoupling (C1)
A 0.1 F capacitor either ceramic or tantalum is recommended and should be connected close to the NCP551 package. Higher values and lower ESR will improve the overall line transient response.
Output Decoupling (C2)
The NCP551 is a stable Regulator and does not require any specific Equivalent Series Resistance (ESR) or a minimum output current. Capacitors exhibiting ESRs ranging from a few m up to 3.0 can thus safely be used. The minimum decoupling value is 0.1 F and can be augmented to fulfill stringent load transient requirements. The regulator accepts ceramic chip capacitors as well as tantalum devices. Larger values improve noise rejection and load regulation transient response.
Enable Operation
The enable pin will turn on or off the regulator. These limits of threshold are covered in the electrical specification section of this data sheet. If the enable is not used then the pin should be connected to V
Hints
.
in
Please be sure the Vin and GND lines are sufficiently wide. When the impedance of these lines is high, there is a chance to pick up noise or cause the regulator to malfunction.
Set external components, especially the output capacitor, as close as possible to the circuit, and make leads as short as possible.
Thermal
As power across the NCP551 increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and also the ambient temperature effect the rate of temperature rise for the part. This is stating that when the NCP551 has good thermal conductivity through the PCB, the junction temperature will be relatively low with high power dissipation applications.
The maximum dissipation the package can handle is given by:
PD
T
J(max)
R
JA
T
A
If junction temperature is not allowed above the maximum 125°C, then the NCP551 can dissipate up to 400 mW @ 25°C.
The power dissipated by the NCP551 can be calculated from the following equation:
tot
[
Vin*I
gnd(Iout
P
][
)
Vin V
out
]
*I
out
or
V
inMAX
P
tot
I
GND
V
out
I
*
out
I
out
If a 150 mA output current is needed then the ground current from the data sheet is 4.0 A. For an NCP551SN30T1 (3.0 V), the maximum input voltage will then be 5.6 V.
Battery or
Unregulated
Voltage
ON
OFF
+
C1
Figure 20. Typical Application Circuit
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8
V
out
+
C2
NCP551, NCV551
F
Input
R
Q1
Output
1
1.0 F 1.0 F 2
3
5
4
Figure 21. Current Boost Regulator Figure 22. Current Boost Regulator with
The NCP551 series can be current boosted with a PNP transis­tor. Resistor R in conjunction with V when the pass transistor begins conducting; this circuit is not short circuit proof. Input/Output differential voltage minimum is increased by V
of the pass resistor.
BE
Input
1
1.0 F 2
Enable
3
1
1.0 F 1.0 F 2
of the PNP determines
BE
Output
5
1.0 F
4
Output
5
Input
R1
Q1
R2
Q2
R3
1
1.0 F 1.0 F 2
3
Short Circuit Limit
Short circuit current limit is essentially set by the V R1. I
Input
= ((V
SC
R
11 V
− ib * R2) / R1) + I
BEQ2
Q1
1.0 F
1
2
3
5
4
BE
O(max) Regulator
Output
of Q2 and
Output
5
1.0
4
R
3
C
4
Figure 23. Delayed T urn−on
If a delayed turn−on is needed during power up of several volt­ages then the above schematic can be used. Resistor R, and capacitor C, will delay the turn−on of the bottom regulator.
Figure 24. Input Voltages Greater than 12 V
A regulated output can be achieved with input voltages that exceed the 12 V maximum rating of the NCP551 series with the addition of a simple pre−regulator circuit. Care must be taken to prevent Q1 from overheating when the regulated output (V
) is shorted to GND
out
.
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NCP551, NCV551
ORDERING INFORMATION
Nominal
Device
NCP551SN15T1 1.5 LAO TSOP−5 NCP551SN15T1G 1.5
NCP551SN18T1 1.8 LAP TSOP−5 NCP551SN18T1G 1.8
NCP551SN25T1 2.5 LAQ TSOP−5 NCP551SN25T1G 2.5
NCP551SN27T1 2.7 LAR TSOP−5 NCP551SN27T1G 2.7
NCP551SN28T1 2.8 LAS TSOP−5 NCP551SN28T1G 2.8
NCP551SN30T1 3.0 LAT TSOP−5 NCP551SN30T1G 3.0
NCP551SN33T1 3.3 LAU TSOP−5 NCP551SN33T1G 3.3
NCP551SN50T1 5.0 LAV TSOP−5 NCP551SN50T1G 5.0
NCV551SN15T1 1.5 LFZ TSOP−5 NCV551SN18T1 1.8 LGA TSOP−5 NCV551SN25T1 2.5 LGB TSOP−5 NCV551SN27T1 2.7 LGC TSOP−5 NCV551SN28T1 2.8 LGD TSOP−5 NCV551SN30T1 3.0 LGE TSOP−5 NCV551SN32T1 3.2 LFR TSOP−5 NCV551SN33T1 3.3 LGG TSOP−5 NCV551SN50T1 5.0
Output Voltage
Marking Package Shipping
LAO
LAP
LAQ
LAR
LAS
LAT
LAU
LAV
LGF TSOP−5
TSOP−5
(Pb−Free)
TSOP−5
(Pb−Free)
TSOP−5
(Pb−Free)
TSOP−5
(Pb−Free)
TSOP−5
(Pb−Free)
TSOP−5
(Pb−Free)
TSOP−5
(Pb−Free)
TSOP−5
(Pb−Free)
3000 / 7 Tape & Reel
NOTE: Additional voltages in 100 mV steps are available upon request by contacting your ON Semiconductor representative. †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
6. NCV551 is qualified for automotive use.
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10
0.05 (0.002)
S
H
123
D
54
L
G
A
NCP551, NCV551
PACKAGE DIMENSIONS
TSOP−5
(SOT23−5, SC59−5)
SN SUFFIX
PLASTIC PACKAGE
CASE 483−02
ISSUE C
B
C
J
K
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
4. A AND B DIMENSIONS DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS.
DIM MIN MAX MIN MAX
A 2.90 3.10 0.1142 0.1220 B 1.30 1.70 0.0512 0.0669 C 0.90 1.10 0.0354 0.0433 D 0.25 0.50 0.0098 0.0197 G 0.85 1.05 0.0335 0.0413 H 0.013 0.100 0.0005 0.0040
J 0.10 0.26 0.0040 0.0102
K 0.20 0.60 0.0079 0.0236
L 1.25 1.55 0.0493 0.0610
M 0 10 0 10
___ _
S 2.50 3.00 0.0985 0.1181
INCHESMILLIMETERS
SOLDERING FOOTPRINT*
1.9
0.95
0.037
1.0
0.039
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
0.074
0.028
0.7
2.4
0.094
SCALE 10:1
inches
mm
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11
NCP551, NCV551
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
http://onsemi.com
ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your local Sales Representative.
NCP551/D
12
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