ON Semiconductor NCP51530 User Manual

High and Low Side Gate Driver, High Performance, 700 V, with 3.5 A Source and 3 A Sink Currents

NCP51530

NCP51530 is a 700 V high side and low side driver with 3.5 A source & 3 A sink current drive capability for AC−DC power supplies and inverters. NCP51530 offers best in class propagation delay, low quiescent current and low switching current at high frequencies of operation. This device is tailored for highly efficient power supplies operating at high frequencies. NCP51530 is offered in two versions, NCP51530A/B. NCP51530A has a typical 60 ns propagation delay, while NCP51530B has a typical propagation delay of 25 ns. NCP51530 comes in SOIC8 and DFN10 packages.

Features

• High voltage range: Up to 700 V

• NCP51530A: Typical 60 ns Propagation Delay

• NCP51530B: Typical 25 ns Propagation Delay

• Low Quiescent and Operating Currents

• 15 ns Max Rise and Fall Time

• 3.5 A Source / 3 A Sink Currents

• Under−voltage Lockout for Both Channels

• 3.3 V and 5 V Input Logic Compatible

• High dv/dt Immunity up to 50 V/ns

• Pin to Pin Compatible with Industry Standard Half−bridge ICs.

• Matched Propagation Delay (7 ns Max)

• High Negative Transient Immunity on Bridge Pin

• DFN10 Package Offers Both Improved Creepage and Exposed Pad

Applications

• High−density SMPS for Servers, Telecom and Industrial

• Half/Full−bridge & LLC Converters

• Active Clamp Flyback/Forward Converters

• Solar Inverters & Motor Controls

• Electric Power Steering

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MARKING

DIAGRAMS

1

SOIC−8

D SUFFIX

CASE 751−07

1

DFN10

MN SUFFIX

CASE 506DJ

NCP51530 = Specific Device Code x = A or B version A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb−Free Package

(Note: Microdot may be in either location)

PINOUT INFORMATION

HIN

LIN

GND

LO

8 Pin Package

(Top View)

VCC

GND GND

1

HIN

LIN

10 Pin DFN Package

(Top View)

8

NCP51530x

ALYW

G

1

51530x ALYWG

G

1

VB HO HB VCC

VB HO HB NC LO

September, 2020 − Rev. 4

ORDERING INFORMATION

See detailed ordering and shipping information on page 22 of this data sheet.

1 Publication Order Number:

NCP51530/D

NCP51530

HIN

LIN

GND

LO

SOIC8 DFN10

(Top View) (Top View)

VB

HO

HB

VCC

HIN

LIN

GND

Table 1. PIN DESCRIPTION SOIC 8 PACKAGE

Pin Out Name Function

1 HIN High side input

2 LIN Low side input

3 GND Ground reference

4 LO Low side output

5 VCC Low side and logic supply

6 HB High side supply return

7 HO High side output

8 VB High side voltage supply

VB

HO

HB

NC

LO

Table 2. PIN DESCRIPTION DFN10 PACKAGE

Pin Out Name Function

1 VCC Low side and logic supply

2 HIN High side input

3 LIN Low side input

4 GND Ground reference

5 GND Ground reference

6 LO Low side output

7 NC No Connect

8 HB High side supply return

9 HO High side output

10 VB High side voltage supply

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2

NCP51530

VHV

ADRV

PWM CONTROLLER

LDRV

COMP

Figure 1. Simplified Applications Schematic for a Half−Bridge Converter (SOIC8)

HIN

LIN

GND

LO

NCP51530

VB

HO

HB

VCC

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3

NCP51530

VHV

VCC

HIN

LIN

GND

VCC

HIN

LIN

GND

VB

HO

HB

NC

LO

VB

HO

HB

NC

LO

LIN 1

HIN 1

LIN 2

HIN 2

Digital Isolator

Micro Controller

Figure 2. Simplified Applications Schematic for a Full Bridge Converter (DFN 10)

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4

NCP51530

VCC

HIN

LIN

VB

UV

Detect

Q

UV

DETECT

S

Q

R

VCC

HO

HB

LO

Pulse

Trigg er

r

GND

Level

Shifter

DELAY

Figure 3. Internal Block Diagram for NCP51530

Table 3. ABSOLUTE MAXIMUM RATINGS All voltages are referenced to GND pin.

Rating Symbol Value Unit

Input voltage range V

High side boot pin voltage V

High side floating voltage VB−V

High side drive output voltage V

Low side drive output voltage V

CC

B

HB

HO

LO

Allowable hb slew rate dVHB/dt 50 V/ns

Drive input voltage V

Junction temperature T

Storage temperature range T

LIN

V

HIN

J(MAX)

STG

,

ESD Capability (Note 1) Human Body Model per JEDEC Standard JESD22−A114E. Charge Device Model per JEDEC Standard JESD22−C101E.

Lead Temperature Soldering Reflow (SMD Styles ONLY), Pb−Free Versions (Note 2)

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

1. This device series incorporates ESD protection and is tested by the following methods. ESD Human Body Model tested per

AEC−Q100−002(EIA/JESD22−A114) ESD Charged Device Model tested per AEC−Q100−11(EIA/JESD22−C101E) Latchup Current Maximum Rating: ≤150 mA per JEDEC standard: JESD78

2. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D

−0.3 to 20 V

−0.3 to 720 V

−0.3 to 20 V

VHB – 0.3 to VB + 0.3

−0.3 to V

+ 0.3 V

CC

−5 to VCC + 0.3 V

150° C

−55° to 150° C

4000 1000

260 °C

V

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5

NCP51530

t

Table 4. THERMAL CHARACTERSTICS

Rating Symbol Value Unit

Thermal Characteristics, SOIC8 (Note 3) Thermal Resistance, Junction to Air

Thermal Characteristics, DFN10 Thermal Resistance, Junction to Air (Note 4)

3. Refer to ELECTRICAL CHARACTERSTICS and APPLICATION INFORMATION for Safe Operating Area.

4. Values based on copper area of 50 mm

2

of 1 oz thickness and FR4 PCB substrate.

R

q

JA

R

q

JA

Table 5. RECOMMENDED OPERATING CONDITIONS

Rating Symbol Min Max Unit

Input Voltage Range V

High Side Floating Voltage VB−V

High Side Bridge pin Voltage V

High Side Output Voltage V

Input Voltage on LIN and HIN pins V

LIN

V

HIN

Operating Junction Temperature Range T

CC

HB

HO

LO

,

J

10 17 V

−1 700 V

V

GND V

GND VCC−2 V

−40 125 °C

183 °C/W

162 °C/W

HB

V

B

CC

V

Table 6. ELECTRICAL CHARACTERISTICS

(−40°C <T

< 125°C, V

J

Typical values are at T

Parameters

SUPPLY SECTION

quiescent current V

V

CC

VCC operating current f = 500 kHz, C

Boot voltage quiescent current V

Boot voltage operating current f = 500 kHz, C

HB to GND quiescent current VHS = VHB = 700 V I

INPUT SECTION

Input rising threshold

Input falling threshold V

Input voltage Hysteresis V

Input pulldown resistance V

UNDER VOLTAGE LOCKOUT (UVLO)

ON VCC Rising V

V

CC

VCC hysteresis V

VB ON VB Rising V

VB hysteresis V

High Side Startup Time Time between VB > UVLO & 1

LO GATE DRIVER

Low level output voltage

High level output voltage ILO = −100 mA, V

Peak source current VLO = 0 V I

=V

CC

= 25°C.)

J

=12V, V

B

= GND, outputs are not loaded, all voltages are referenced to GND; unless otherwise noted,

HB

Test Conditions Symbol Min Typ Max Unit

LIN=VHIN

LIN

=0 I

= 0 I

LOAD

= V

= 0 V I

HIN

= 0 I

LOAD

V

= 5 V R

XIN

s

HO Pulse

ILO = 100 mA V

= V

LOH

−V

LO

CC

CCQ

CCO

BQ

BO

HBQ

HIT

LIT

IHYS

IN

CCon

CChys

Bon

Bhyst

T

startup

LOL

V

LOH

LOpullup

0.15 0.25 mA

0.7 1.0 mA

0.1 0.15 mA

0.7 1.0 mA

6 11

2.3 2.7 3.1 V

1 1.4 1.8 V

1.3 V

100 175 250

8.6 9.1 9.6 V

0.5 V

8 8.5 9 V

0.5 V

10

0.125 V

0.150 V

3.5 A

mA

kW

ms

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6

NCP51530

Table 6. ELECTRICAL CHARACTERISTICS

(−40°C <T

< 125°C, V

J

Typical values are at T

Parameters UnitMaxTypMinSymbolTest Conditions

LO GATE DRIVER

Peak sink current

HO GATE DRIVER

Low level output voltage

High level output voltage IHO = −100 mA, V

Peak source current VHO = 0 V I

Peak sink current VHO = 12 V I

OUTPUT RISE AND FALL TIME

Rise Time LO, HO

Fall Time LO, HO C

DELAY MATCHING

LI ON, HI OFF

LI OFF, HI ON

TIMING

Minimum Input Filter (NCP51530A)

PROPAGATION DELAY NCP51530A

V

falling to VLO falling C

LI

VHI falling to VHO falling C

VLI rising to VLO rising C

VHI rising to VHO rising C

PROPAGATION DELAY NCP51530B

V

falling to VLO falling C

LI

VHI falling to VHO falling C

VLI rising to VLO rising C

VHI rising to VHO rising C

=V

CC

= 25°C.)

J

=12V, V

B

= GND, outputs are not loaded, all voltages are referenced to GND; unless otherwise noted,

HB

VLO = 12 V I

IHO = 100 mA V

= V

HOH

–V

HO

C

= 1000 pF T

load

= 1000 pF T

load

HB

Pulse width = 1 ms

V

= 5 V , Input pulse width

XIN

above which output change occurs.

= 0, Minimum On/Off−time

load