OKI MSM64167E-xxx, MSM64167E-xxxGA, MSM64167E-xxxTB Datasheet

FEDL64167E-02

¡ Semiconductor MSM64167E

¡ Semiconductor

This version: Dec. 1999

Previous version: Jul. 1999

MSM64167E

4-Bit Microcontroller with Built-in Dual-Slope Type A/D Converter and LCD Driver

GENERAL DESCRIPTION

The MSM64167E is a low power 4-bit microcontroller that employs Oki's original CPU core nX4/20. The MSM64167E contains a dual-slope type A/D converter with a 4-channel input, LCD driver for up to 108 segments, and buzzer output port. The MSM64167E is best suited for applications such as low power, high precision thermometers, barometers, and hygrometers.

FEATURES

• Operating range Operating frequencies : 32.768 kHz, 700 kHz Operating voltage : 2.6 to 3.6 V

Operating temperature : –40 to +85°C

• Memory space Internal program memory : 4064 bytes Internal data memory : 256 nibbles

• Minimum instruction execution time : 4.3 ms @ 700 kHz

91.6 ms @ 32.768 kHz

• Dual-slope type A/D converter : 4-channel input

• LCD driver : 31 outputs; duty ratio switchable by software (1) At 1/4 duty and 1/3 bias : 108 segments (max) (2) At 1/3 duty and 1/3 bias : 84 segments (max) (3) At 1/2 duty and 1/2 bias : 58 segments (max)

• Buzzer driver : 1 output (4 output modes selectable)

• Timer : 16-bit ¥ 1 Auto-reload mode Capture mode Clock frequency measuring mode

• Watchdog timer

• Clock : 32.768 kHz crystal oscillator and 700 kHz RC

oscillator (with an external resistor) CPU clock : 32.768 kHz/700 kHz (switchable by software) Time base clock : 32.768 kHz

• Power supply voltage : 3 V

• I/O port Input-output port : 3 ports ¥ 4 bits Output port : 2 ports ¥ 4 bits

(8 out of the 31 LCD driver outputs can be used as output-only ports by mask option.)

• Serial port : Synchronous/asynchronous mode support Synchronous mode : 32.768 kHz/external clock Asynchronous mode : 9600 bps/4800 bps/2400 bps/1200 bps

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¡ Semiconductor MSM64167E

• Interrupt sources External interrupt : 2 sources Internal interrupt : 8 sources

• Package: 80-pin plastic QFP (QFP80-P-1420-0.80-BK) : (Product name : MSM64167E-¥¥¥GA) 80-pin plastic TQFP (TQFP80-P-1212-0.50-K) : (Product name : MSM64167E-¥¥¥TB) Chip : (Product name : MSM64167E-¥¥¥)

¥¥¥ indicates a code number.

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¡ Semiconductor MSM64167E

BLOCK DIAGRAM

CPU CORE: nX-4/20

BSR

HALT

MIEF

OSC2 OSC1

XT

RESET

TST1 TST2

V

SSL

L0 L1

L30

V

SS1

V

SS2

V

SS3

C1 C2

V

DD

V

SS

CONTROLLER

V

SS

TIMING

2CLK

RSTG

TST

VR

LCD

BIAS

TR2 TR0

(4)

C

BA H L XY

ALU

(4) (4)

PCM

PCL

TR1

PCH

DB7 to DB0 (8)

SP

IR

ROMR

DECODER

TBC

INTC

WDT

3

INT

SIOP

2

INT

TM

PORT ADDRESS

DB7 to DB0

ADCBD

(8)

A11 to A8

A7 to A0

INT

PORT2

PORT1

PORT0

ROM 4064B

RAM 256N

V

SS

P2.3 P2.2 P2.1 P2.0

V

SS

P1.3 P1.2 P1.1 P1.0

V

SS

P0.3 P0.2 P0.1 P0.0

V

SS

V

SSA

OPP1 OPN1 OPO1 OPP0 OPN0 OPO0 VOF

BD

DDA

V

VrA

AIN0

AIN1

AIN2

AIN3

RA

Rl

CZ1ClCZ2

VG

RCM

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FEDL64167E-02

,

¡ Semiconductor MSM64167E

PIN CONFIGURATION (TOP VIEW)

MSM64167E-xxxGA

SSA

SS

V

P0.0

P0.1/RXD

P0.2

P0.3

P1.0

P1.1

P1.2

P1.3

P2.0/TXC

P2.1/RXC

P2.2/TXD

P2.3

L1

L0

65

66

67

68

69

70

71

72

73

74

75

76

77

78

79

80

L2 L3 L4 L5 L6 L7 L8 L9

L10 L11 L12 L13 L14 L15 L16 L17 L18 L19 L20 L21 L22 L23 L24 L25

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

1

2

3

4

5

6

7

8

9

64

63

62

61

60

59

58 57

56

55

54 53

52

51

50

49

48

47

46

45

44

43

42

41

OPP1 OPN1 OPO1 OPP0 OPN0 OPO0 VG CZ2 CI CZ1 RCM RI RA AIN3 AIN2 AIN1 AIN0 VrA V

DDA

VOF V

SSL

RESET TST2 TST1

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

L26

L27

L28

L29

L30

OSC1

OSC2

V

DD

XT

SS2

V

C2

C1

SS3

V

SS1

V

BD

(QFP80-P-1420-0.80-BK)

80-Pin Plastic QFP

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¡ Semiconductor MSM64167E

PIN CONFIGURATION (TOP VIEW) (continued)

MSM64167E-xxxTB

SSA

SS

P0.0

P0.1/RXD

P0.2

P0.3

P1.0

P1.1

P1.2

P1.3

P2.0/TXC

P2.1/RXC

P2.2/TXD

P2.3

L0

L2

79

L1

78

77

76

75

74

73

72

71

70

69

68

67

66

65

V

64

V

63

OPP1

61

62

OPN1

L3

80

L4 L5 L6 L7 L8 L9

L10 L11 L12 L13 L14 L15 L16 L17 L18 L19 L20 L21 L22 L23

10

11

12

13

14

15

16

17

18

19

20

1

2

3

4

5

6

7

8

9

60

59

58 57

56

55

54 53

52

51

50

49

48

47

46

45

44

43

42

41

OPO1 OPP0 OPN0 OPO0 VG CZ2 CI CZ1 RCM RI RA AIN3 AIN2 AIN1 AIN0 VrA V

DDA

VOF V

SSL

RESET

21

L24

22

L25

23

L26

24

L27

25

L28

26

L29

27

L30

28

OSC2

30

29

V

OSC1

DD

31

XT

(TQFP80-P-1212-0.50-K)

80-Pin Plastic TQFP

32

XT

33

SS2

V

34

C2

35

C1

36

SS3

V

37

V

SS1

38

BD

39

TST1

40

TST2

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FEDL64167E-02

¡ Semiconductor MSM64167E

PAD CONFIGURATION

Pad Layout

80

1

Y

65

64

X

23

24

Chip Size : 5.95 mm ¥ 4.62 mm Chip Thickness : 350 mm (typ.) Coordinate Origin : Chip center Pad Hole Size : 110 mm ¥ 110 mm Pad Size : 130 mm ¥ 130 mm Minimum Pad Pitch : 180 mm

Note: The chip substrate voltage is VDD.

42

41

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Pad Coordinates

Pad No. Y (µm)X (µm)Pad Name

1 –2155–2593L2/P3.2

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

L3/P3.3

L4/P4.0

L5/P4.1

L6/P4.2

L7/P4.3

L8

L9

L10

L11

L12

L13

L14

L15

L16

L17

L18

L19

L20

L21

L22

L23

L24

L25

L26

L27

L28

L29

L30

OSC2

OSC1

V

DD

XT

V

SS2

36 C2

37 C1

38 V

39 V

SS3

SS1

40 BD

Pad No. Y (µm)X (µm)Pad Name

41 19462766

–2304 2660

–1842 2394

–1626 2211

–1430 1899

–1234

–1038

–856

–664

–468

–272

–76

143

367

591

874

1056

1280

1504

1728

1952

2176

2624

2766

–2155

–1862

–1638

–1414

–1190

–966

–742

–518

–336

–132

154

378

602

826

1050

1232

1456

1694

42 2155

43

44

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

64

65

66

67

68

69

70

71

72 P1.1 196

73 P1.2

79 L0/P3.0 –1568

80 L1/P3.1 –1834

TST1 TST2

RESET

V

SSL

VOF45

V

DDA

VrA

AIN0

AIN1

AIN2

AIN3

RA

RI

RCM

CZ1

CI

CZ2

VG

OPO0

OPN0

OPP0

OPO1

OPN1

OPP1

V

SSA

V

SS

P0.0

P0.1

P0.2

P0.3

P1.0

1598

1294

991

688

506

324

142

–40

–222

–402

–586

–768

–1016

–1246

–1498

–1749

–2001

–2253

–2625

–2766

2155

2113

2155

2155–2155

2155

1960

1708

1456

1204

952

700

448

–56

–30874 P1.3

–56075 P2.0

–81276 P2.1

–106477 P2.2

–131678 P2.3

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FEDL64167E-02

¡ Semiconductor MSM64167E

PIN DESCRIPTIONS

Basic Functions

Function

Supply

Symbol

V

DD

V

SS1

V

SS2

V

SS3

V

SS

C1

C2

V

SSL

V

SSA

V

DDA

XT

GA

32 32 —

39 39 —

35 35 —

38 38 —

37

36 36 —

44 44 —

65 65 —

46 46 —

34 34 I

33 33 O

TB

30

37

33

36

64

35

34

42

63

44

32

31

Pad

66 —66

37 —Power

Oscillation

OSC1

OSC2

TST1

31 31 I

29

30 30 O

28

41 41 I

39

Test

TST2

Reset 43 43 I

RESET

42 42 I

40

41

Type Description

0 V power supply.

Bias output for driving LCD (–1.5 V).

Negative power supply

Bias output for driving LCD (–3.0 V).

Bias output for driving LCD (–4.5 V).

Negative power supply for I/O port interface.

Pins for connecting a capacitor for generating LCD driving bias

Negative power supply for internal logic

(An internally generated constant voltage is present at this pin.)

Negative power supply for A/D converter:

Externally connects to V

SS2

.

0 V power supply for A/D converter:

Externally connects to V

DD

.

Low-speed clock oscillation input and output pins:

Connect to a crystal (32.768 kHz).

High-speed clock oscillation input and output pins:

Connect to an oscillation resistor (R

OS

Input pins for testing.

These pins are internally pulled up to V

System reset input pin.

Setting this pin to "L" level puts this device into a reset state.

Then, setting this pin to "H" level starts executing an instruction

from address 000H.

This pin is internally pulled up to V

DD

.

).

.

DD

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FEDL64167E-02

¡ Semiconductor MSM64167E

Basic Functions (continued)

FunctionGASymbol Pad

Ports

Buzzer 40BD 40 O

A/D

Converter

VOF 45 I

OPP0 61 I

OPP1 64 I

OPN0 60 I

OPN1

OPO0

OPO1 O

TB

67P0.0 67 I/O

65

68P0.1 68 I/O

66

69P0.2 69 I/O

67

70P0.3 70 I/O

68

71P1.0 71 I/O

69

72P1.1 72 I/O

70

73P1.2 73 I/O

71

74P1.3 74 I/O

72

75P2.0 75 I/O

73

76P2.1 76 I/O

74

77P2.2 77 I/O

75

78P2.3 78 I/O

76

38

48AIN0 48 I/O

46

49AIN1 49 I/O

47

50AIN2 50 I/O

48

51AIN3 51 I/O

49

52RA 52 —

50

53RI 53 —

51

54RCM 54 —

52

55CZ1 55 —

53

56CI 56 —

54

57CZ2 57 —

55

58VG 58 —

56

47VrA 47 —

45

43

61

59

64

62

60

58

63

59

62

61

57

60

63

59

62

Type Description

4-bit input-output port (P0):

Following can be specified for each bit by the port 0 control

registers 0 to 3 (P00CON to P03CON): (1) input or output, (2)

pull-up/pull-down resistor input or high impedance input, and (3)

NMOS open drain output or CMOS output.

4-bit input-output port (P1):

Following can be specified for each bit by the port 1 control

registers 0 to 3 (P10CON to P13CON): (1) input or output, (2)

pull-up/pull-down resistor input or high impedance input, and (3)

NMOS open drain output or CMOS output.

4-bit input-output port (P2):

Following can be specified for each bit by the port 2 control

registers 0 to 3 (P20CON to P23CON): (1) input or output, (2)

pull-up/pull-down resistor input or high impedance input, and (3)

NMOS open drain output or CMOS output.

Output pin for the buzzer driver

Analog voltage input pins. Each of these pins can be switched to

provide a constant current output by AD control register 0

(ADCON0).

Current-adjusting resistor connection pin.

Pin for connecting resistor for integration.

Common connection pin for resistor for integration, capacitor 1

for offset compensation, and capacitor for integration.

Pin for connecting capacitor 1 for offset compensation.

Pin for connecting capacitor for integration.

Pins for connecting capacitor 2 for offset compensation.

Reference voltage for A/D conversion (internally generated

constant voltage).

Pin for connecting resistor for voltage amplification circuit offset

adjustment.

Analog micro-voltage input pins.

Pins for connecting resistor for voltage amplification factor

I

adjustment.

O

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FEDL64167E-02

¡ Semiconductor MSM64167E

Basic Functions (continued)

FunctionGASymbol Pad

LCD

Drivers

TB

79L0/P3.0 79 O

77

80L1/P3.1 80 O

78

1L2/P3.2 1 O

79

2L3/P3.3 2 O

80

3L4/P4.0 3 O

1

4L5/P4.1 4 O

2

5L6/P4.2 5 O

3

6L7/P4.3 6 O

4

7L8 7 O

5

8L9 8 O

6

9L10 9 O

7

10L11 10 O

8

11L12 11 O

9

12L13 12 O

10

13L14 13 O

11

14L15 14 O

12

15L16 15 O

13

16L17 16 O

14

17L18 17 O

15

18L19 18 O

16

19L20 19 O

17

20L21 20 O

18

21L22 21 O

19

22L23 22 O

20

23L24 23 O

21

24L25 24 O

22

25L26 25 O

23

26L27 26 O

24

27L28 27 O

25

28L29 28 O

26

29L30 29 O

27

Type Description

LCD segment and common signals output pins.

Functions as output ports by mask option.

LCD segment and common signals output pins.

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