NSC CLC5526MSAX, CLC5526MSA Datasheet
CLC5526
Digital Variable Gain Amplifier (DVGA)
General Description
The CLC5526 is a high performance, digitally controlled,
variable-gain amplifier (DVGA). It has been designed for use
in a broad range of mixed signal and digital communication
applications such as mobile radio, cellular base stations and
back-channel modems where automatic-gain-control (AGC)
is required to increase system dynamic range.
The CLC5526 has differential input and output, allowing
large signal swings on a single 5V rail. The input impedance
is 200Ω. The differential output impedance is 600Ω and is
designed to drivea1kΩdifferential load. The output ampli-
fier has excellent intermodulation performance. The
CLC5526 is designed to accept signals from RF elements
and maintain a terminated impedance environment.
The CLC5526 maintains a 350 MHz bandwidth over its entire gain and attenuation range from +30 dB to −12 dB. Internal clamping ensures very fast overdrive recovery.Two tone
intermodulation distortion is excellent: at 150 MHz, 1 V
pp
it is
−64 dBc.
Input signals to the CLC5526 are scaled by an accurate, dif-
ferential R-2R resistive ladder with an input impedance of
200Ω. A scaled version of the input is selected under digital
control and passed to the internal amplifier. The input common mode level is set at 2.4V via a bandgapreferencedbias
generator which can be overridden by an external input.
Following the resistive ladder is a fixed, 30 dB gain amplifier.
The output stage common mode voltage of the CLC5526 is
set to 3V, by internal, positive supply connected resistors.
Digital control of the CLC5526 is accomplished by a 3-bit
parallel gain control input and a data valid pin to latch the
data. If the data is not latched, the DVGA is transparent to
gain control updates. All digital inputs are TTL/CMOS compatible.
A shutdown input reduces the CLC5526 supply currrent to a
few mA. During shutdown, the input termination is maintained and current attenuation settings are held.
The CLC5526 operates over the industrial temperature
range of −40˚C to +85˚C. The part is available in a 20-pin
SSOP package.
Features
n 350 MHz bandwidth
n Differential input and output
n Gain control: parallel w/data latching
n Supply voltage: +5V
n Supply current: 48 mA
Key Specifications
n Low two tone intermod:
distortion: −64 dBc
@
1VPP, 150 MHz
24.5 dBm IP3, 150 MHz
n Low noise: 2.5 nV/
√
Hz (max gain),
9.3 dB noise figure (max gain)
n Wide gain range: +30 dB to −12 dB
n Gain step size: 6 dB
Applications
n Cellular/PCS base stations
n IF sampling receivers
n Infrared/CCD imaging
n Back-channel modems
n Electro-optics
n Instrumentation
n Medical imaging
n High definition video
Block Diagram
DS015016-2
June 1999
CLC5526 Digital Variable Gain Amplifier (DVGA)
© 1999 National Semiconductor Corporation DS015016 www.national.com
Pin Configuration Ordering Information
CLC5526MSA 20-Pin SSOP
CLC5526PCASM Evaluation Board
Pin Descriptions
Pin
Name
Pin
No.
Description
GND 1, 5, 8, 10, 11, 13, 20 Circuit ground.
Gain MSB 2 Gain Selection Most Significant Bit
Gain ISB 3 Gain Selection Data Bit
Gain LSB 4 Gain Selection Least Significant Bit
In+ 6 Positive Differential Input
In− 7 Negative Differential Input
Ref Comp 9 Reference Compensation
V
CC
16, 19 Positive Supply Voltage
Shutdown 18 Low Power Standby Control (Active High)
Latch Data 17 Data Latch Control (Active High)
Out+ 15 Positive Differential Output
Out− 14 Negative Differential Output
Ref In 12 External Reference Input
DS015016-1
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National SemiconductorSalesOffice/
Distributors for availability and specifications.
Positive Supply Voltage (V
CC
) −0.5V to +6V
Differential Voltage between any
Two Grounds
<
200 mV
Analog Input Voltage Range −0.5V to +V
CC
Digital Input Voltage Range −0.5V to +V
CC
Output Short Circuit Duration
(one-pin to ground) Infinite
Junction Temperature 175˚C
Storage Temperature Range −65˚C to +150˚C
Lead Solder Duration (+300˚C) 10 sec
Recommended Operating
Conditions
Positive Supply Voltage (VCC) +5V±5
%
Differential Voltage between any
Two Grounds
<
10 mV
Analog Input Voltage Range, AC
Coupled
±
0.5V
Operating Temperature Range −40˚C to +85˚C
Package Thermal Resistance
Package θ
JA
θ
JC
20-Pin SSOP 90˚C/W 38˚C/W
Reliability Information
Transistor Count 300
Electrical Characteristics
The following specifications apply for V
CC
=
+5V, R
L
=
1kΩmaximum gain setting. Boldface limits apply for T
A
=
T
min
=
−40˚C to T
max
=
+85˚C, all other limits T
A
=
25˚C (Notes 2, 3, 4).
Symbol Parameter Conditions Min Typ Max Units
DYNAMIC PERFORMANCE
BW Small-Signal Bandwidth 350 MHz
NOISE AND DISTORTION
2nd Harmonic Distortion
f
IN
=
150 MHz, 1 V
PP
53 67 dBc
f
IN
=
250 MHz, 1 V
PP
64 dBc
f
IN
=
150 MHz, 2 V
PP
43 62 dBc
f
IN
=
250 MHz, 2 V
PP
58 dBc
3rd Harmonic Distortion
f
IN
= 150 MHz, 1 V
PP
53 71 dBc
f
IN
= 250 MHz, 1 V
PP
70 dBc
f
IN
= 150 MHz, 2 V
PP
43 57 dBc
f
IN
= 250 MHz, 2 V
PP
56 dBc
IMD
Two Tone Intermodulation
Distortion
f
1
= 149.9 MHz, f2= 150.1 MHz,
1V
PP
Composite
64 dBc
f
1
= 149.9 MHz, f2= 150.1 MHz,
2V
PP
Composite
61 dBc
f
1
= 249.9 MHz, f2= 250.1 MHz,
1V
PP
Composite
63 dBc
f
1
= 249.9 MHz, f2= 250.1 MHz,
2V
PP
Composite
54 dBc
Two Tone, 3rd Order
Intermodulation
150 MHz
24.5 dBm
Thermal Noise
Minimum Gain Setting 2.2 nV/
√
Hz
Maximum Gain Setting 2.5 nV/
√
Hz
Noise Figure Maximum Gain Setting 9.3 dB
ANALOG I/O
Differential Input Impedance 200 Ω
Differential Output Impedance 600 Ω
Input Signal Level (AC Coupled) Maximum Gain 126 mV
Maximum Input Signal Level Recommended 6 V
PP
Maximum Output Signal Level Recommended 4 V
PP
Output Clipping 8V
PP
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