NSC CLC432AJP, CLC432AJE-TR13, CLC432AJE, 5962-9472502MPA Datasheet

N
CLC431/432 Dual Wideband Monolithic Op Amp with Disable
General Description
The CLC431 and CLC432 current-feedback amplifiers provide wide bandwidths and high slew rates for applications where board density and power are key considerations. These amplifiers provide DC­coupled small signal bandwidths exceeding 92MHz while consuming only 7mA per channel. Operating from ±15V supplies, the CLC431/ 432’s enhanced slew rate circuitry delivers large-signal bandwidths with output voltage swings up to 28Vpp. A wide range of bandwidth­insensitive gains are made possible by virtue of the CLC431 and CLC432’s current-feedback topology.
The large common-mode input range and fast settling time (70ns to 0.05%) make these amplifiers well suited for CCD & data telecommunication applications. The disable of the CLC431 can accommodate ECL or TTL logic levels or a wide range of user definable inputs. With its fast enable/disable time (0.2µs/1µs) and high channel isolation of 70dB at 10MHz, the CLC431 can easily be configured as a 2:1 MUX. Many high performance video applications requiring signal gain and/or switching will be satisfied with the CLC431/432 due to their very low differential gain and phase errors (less than 0.1% and 0.1°; Av = +2V/V at 4.43MHz into 150 load).
Quick 8ns rise and fall times on 10V pulses allow the CLC431/432 to drive either twisted pair or coaxial transmission lines over long distances.
The CLC431/432's combination of low input voltage noise, wide common-mode input voltage range and large output voltage swings make them especially well suited for wide dynamic range signal processing applications.
June 1999
CLC431/432
Dual Wideband Monolithic Op Amp with Disable
Features
Wide bandwidth: 92MHz (A
V
=+1)
62MHz (Av=+2)
Fast slew rate: 2000V/µs
Fast disable: 1µs to high-Z output
High channel isolation: 70dB at 10MHz
Single or dual supplies: ±5V to ±16.5V
Applications
Video signal multiplexing
Twisted-pair differential driver
CCD buffer & level shifting
Discrete gain-select amplifier
Transimpedance amplifier
1999 National Semiconductor Corporation http://www.national.com
Printed in the U.S.A.
1Vpp@ 5MHz
R
f
Channel 1 (Gain = 2)
Channel 2 (Gain = 5)
R
f
R
i
R
i
R
s
R
L
R
g
R
g
V
out
SELECT
½CLC431
½CLC431
50
50
50
50
50
50
500
500
500
125
Typical Application
Discrete Gain Select Amplifier
­+
­+
1 2 3 4
V
out
1
V
inv
1
V
non-inv
1
-Vcc
+V
cc
V
out
2
V
inv
2
V
non-inv
2
8 7 6 5
V
inv
1
V
non-inv
1
DIS1
-V
cc
DIS2
V
non-inv
2
V
inv
2
V
out
1
V
R
TTL
1 DIS1 +V
cc
DIS2 V
R
TTL
2 V
out
2
1 2 3 4 5 6 7
14 13 12 11 10
9 8
CLC432
CLC431
Pinout
PDIP & SOIC
CLC431/432 Electrical Characteristics
(V
CC
= ±15V; AV= +2; R
f
= R
g
=750
ΩΩ
ΩΩ
; R
L
= 100
ΩΩ
ΩΩ
; unless noted)
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supply voltage ±16.5V short circuit current 100mA common-mode input voltage ±V
cc
differential input voltage ±10V maximum junction temperature +150°C storage temperature -65°C to+150°C lead temperature (soldering 10 sec) +300°C
1) Tested and guaranteed with Rf = 866Ω. CLC432 tested and guaranteed with R
f
= 750Ω.
2) Spec is guaranteed for R
L
500Ω.
3) V
RTTL
= 0, See text for single-ended mode of operation.
4) V
RTTL
= NC, See text for differential mode of operation
5) Spec is guaranteed for AJE; AJP & AIB yield 7dB lower.
6) Spec is tested with 2V
pp
, 10MHz and RL= 100Ω.
A)J-level: spec is 100% tested at +25°C.
Absolute Maximum Ratings Notes
PARAMETERS CONDITIONS TYP MIN/MAX RATINGS UNITS NOTES
Ambient Temperature CLC431 & CLC432 +2 5 +2 5 0 to +70 -40 to +85 °C 1
FREQUENCY DOMAIN RESPONSE
-3dB bandwidth V
out
< 4.0V
pp
62 42 37 36 MHz
V
CC
= ±5V V
out
< 4.0V
pp
62 MHz
V
out
< 10V
pp
28 21 20 20 MHz 2
gain flatness V
out
< 4.0V
pp
peaking DC to 100MHz 0.05 0.5 0.7 0.7 dB
rolloff DC to 20MHz 0.0 0. 8 0.8 0 .8 d B linear phase deviation DC to 30MHz 0.3 1.8 2.0 2.1 ° differential gain 4.43MHz, R
L
=150 0.12 0.18 0.2 0.2 %
differential phase 4.43MHz, RL=150 0.12 0.18 0.23 0.25 °
TIME DOMAIN RESPONSE
rise and fall time 10V step 8 12 13 13 n s 2 overshoot 2V step 5 1 0 1 2 12 % settling time 2V step to 0.05% 70 10 0 110 110 ns slew rate V
out
= ±10V 20 0 0 15 0 0 14 5 0 14 0 0 V/ms 2
DISTORTION AND NOISE RESPONSE
2
nd
harmonic distortion 2Vpp, 1MHz - 65 dB c 6
3
rd
harmonic distortion 2Vpp, 1MHz - 75 dB c 6
equivalent input noise
voltage >1MHz 3.3 4.2 4.4 4.5 nV/√Hz
current, inverting >1MHz 13 16 1 7 18 pA/√Hz
current, non-inverting >1MHz 2.0 2.5 2.6 2.8 pA/√Hz
STATIC DC PERFORMANCE
input offset voltage 3 6 7 7 mV A
average drift 20 --- 5 0 5 0 µV/°C
bias current, non-inverting 2 8 10 16 µAA
average drift 25 --- 1 00 150 nA/°C
bias current, inverting 2 6 6 8 µAA
average drift 8 --- 2 5 4 0 nA/°C power supply rejection ratio DC 6 4 59 5 9 59 d B common-mode rejection ratio DC 63 58 5 7 56 dB supply current R
L
= , per channel 7.1 7.9 8.5 9.6 mA A
CLC431 disabled RL= , per channel 0.8 1.2 1.3 1.45 mA A
MISCELLANEOUS PERFORMANCE
input voltage range common mode ± 12.2 ± 12.0 ± 11.8 ± 11.6 V
resistance non-inverting 24 16 10 6 M capacitance non-inverting 0.5 1 1 1 pF
output current ± 60 ± 38 ±35 ±30 mA
voltage range R
L
5k ±14.0 ± 13.6 ± 13.4 ± 13.2 V
RL=100 ± 6.0 ± 3.7 ± 3.7 ± 2.9 V
SWITCHING PERFORMANCE (CLC431)
switching time turn on 0.1 0.15 0.155 0.165 µs
turn off 0.7 1.0 1.2 1.2 µs
DIS logic levels single-ended mode 3
high input voltage (V
IH
) > 2.0 > 2.0 > 2.0 > 2.0 V
low input voltage (V
IL
) < 0.8 < 0.8 < 0.8 < 0.8 V
maximum current input VIH > DIS > V
IL
150 180 190 205 µA
|DIS-
DIS
| differential mode 4
minimum differential voltage 0.3 0. 4 0.4 0.4 V
ISOLATION
crosstalk, input referred 10MHz 70 64 64 64 dB off isolation 10MHz 64 60 6 0 60 dB 5
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters.
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