Nokia 3105 Service Manual 8rh48bb

CCS Technical Documentation

RH-48 Series Transceivers

Troubleshooting — BB

RH-48

Troubleshooting — BB CCS Technical Documentation

Page No

Baseband Troubleshooting............................................................................................. 3

RH-48 Baseband Module Overview ............................................................................3

Baseband and RF Architecture ....................................................................................4

Power Up and Reset.................................................................................................. 4

Power up with PWR key........................................................................................... 7

Power up when charger is connected........................................................................ 7

RTC alarm power up................................................................................................. 8

Power off .....................................................................................................................8

Power Consumption and Operation modes .................................................................8

Power Distribution .......................................................................................................9

Clock Distribution .....................................................................................................11

RFClk (19.2 MHz Analog)...................................................................................... 11

RFConvClk (19.2 MHz digital) .............................................................................. 13

CBUSClk Interface ................................................................................................. 14

DBUS Clk Interface................................................................................................ 14

SleepCLK (Digital)................................................................................................. 15

SleepCLK (Analog)................................................................................................. 16

Flash programming ....................................................................................................16

Connections to Baseband ........................................................................................ 16

Baseband Power Up................................................................................................ 16

Flash Programming Indication................................................................................ 16

Flashing................................................................................................................... 17

Charging operation ...................................................................................................19

Battery..................................................................................................................... 19

Charging Circuitry................................................................................................... 20

Charger Detection ................................................................................................... 21

Charge Control........................................................................................................ 21

Audio .........................................................................................................................22

Display and Keyboard ...............................................................................................22

Accessory ...................................................................................................................23

Charging.................................................................................................................. 24

Tomahawk Headset Detection ................................................................................ 26

FBus Detection........................................................................................................ 27

Accessory Detection Through ACI......................................................................... 27

SIM CAR ...................................................................................................................29

Test Points .................................................................................................................30

Troubleshooting .........................................................................................................32

Top troubleshooting map ...........................................................................................33

Phone is totally dead ............................................................................................... 35

Flash programming doesn‘t work ........................................................................... 36

Power doesn‘t stay on or the phone is jammed....................................................... 38

Charger.................................................................................................................... 40

Audio faults............................................................................................................. 41

Display faults........................................................................................................... 45

Keypad faults........................................................................................................... 47

RH-48

CCS Technical Documentation Troubleshooting — BB

Baseband Troubleshooting

RH-48 Baseband Module Overview

The Baseband module of the RH-48 transceiver is a CDMA single-band engine. The baseband architecture is based on the DCT4 Apollo engine.

RH-48 cellular baseband consists of three ASICs: Universal Energy Management (UEM), Universal Phone Processor (UPP), and a 128/8 megabit combo FLASH.

The baseband architecture supports a power-saving function called sleep mode. This sleep mode shuts off the VCTCXO, which is used as system clock source for both RF and baseband. During the sleep mode, the system runs from a 32 kHz crystal and all the RF regulators (VR1A, VR1B, VR2, … VR7) are off. The sleep time is determined by network parameters. Sleep mode is entered when both the MCU and the DSP are in standby mode and the normal VCTCXO clock is switched off. The phone is waken up by a timer running from this 32 kHz clock supply. The period of the sleep/wake up cycle (slotted cycle) is

1.28N seconds, where N= 0, 1, 2, depending on the slot cycle index.

RH-48 supports standard Nokia 2-wire and 3-wire chargers (ACP-x and LCH-x). However, the 3-wire chargers are treated as 2-wire chargers. The PWM control signal for controlling the three-wire charger is ignored. UEM ASIC and EM SW control charging.

BL-5C Li-ion battery is used as main power source for RH-48. BL-5C has nominal capacity of 850 mAh.

RH-48

Troubleshooting — BB CCS Technical Documentation

Baseband and RF Architecture

CMAX Power Distribution

Charger

Figure 1

Audio

Bottom

Conn.

Sleep Clk

32 KHz

MBus

FBusRx

FBusTx

SIM Reader

UEM

VR1A VR1B

VR2 VR3

VR4 VR5 VR6 VR7

VBatt

Battery

VIO

VANA

V SIM

Vflash1

Vflash2

JTAG

DC/DC

VPPPRODTP

Flash

GenIO

Control

ExtBusC

UPP

CBus

Core

DBus

MBus FBus

Front

End

Alfred

Power Up and Reset

Power up and reset is controlled by the UEM ASIC. RH-48 baseband can be powered up in the following ways:

VCTCXO

19.2 MHz

System

Connector

V Bat

Bus

UHF

SYNTH

Yoda

VBatt

Figure 1: RH-48 Power Distribution Diagram

V Bat

LCD/Key

Jedi

• By the Power button, which means grounding the PWRONX pin of the UEM

• By connect the charger to the charger input

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• By the RTC Alarm, when the RTC logic has been programmed to give an alarm.

After receiving one of the above signals, the UEM counts a 20ms delay and then enters its reset mode. The watchdog starts up, and if the battery voltage is greater than Vcoff+, a 200ms delay is started to allow references, etc. to settle. After this delay elapses, the VFLASH1 regulator is enabled. Then, 500us later VR3, VANA, VIO, and VCORE are enabled. Finally the Power Up Reset (PURX ) line is held low for 20 ms. This reset, PURX, is sent to UPP; resets are generated for the MCU and the DSP. During this reset phase, the UEM forces the VCTCXO regulator on — regardless of the status of the sleep control input signal to the UEM. The FLSRSTx from the UPP is used to reset the flash during power up and to put the flash in power down during sleep. All baseband regulators are switched on at the UEM power on — except for the SIM regulator and Vflash2. Vsim and Vflash2 are not used. The UEM internal watchdogs are running during the UEM reset state, with the longest watchdog time selected. If the watchdog expires, the UEM returns to power off state. The UEM watchdogs are internally acknowledged at the rising edge of the PURX signal in order to always give the same watchdog response time to the MCU.

The following timing diagram represents UEM start-up sequence from reset to power-on mode.

RH-48

Troubleshooting — BB CCS Technical Documentation

Reference signal

PwrOnX

Charger Detection

RTC

UEMRSTX

VFlash1

VIO

VCORE

VANA

VR3

19.2MHz Clk

PURX

32kHz XTAL

t1 t2 t4t3

t1 = 20ms

t2 = 200ms

t3 = 500us

t4 = 20ms

Figure 2: Power on sequence and timing

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CCS Technical Documentation Troubleshooting — BB

Figure 3: Measured power on sequence and timing

Power up with PWR key

When the Power on key is pressed, the UEM enters the power-up sequence. Pressing the power key causes the PWRONX pin on the UEM to be grounded. The UEM PWRONX signal is not part of the keypad matrix. The power key is only connected to the UEM. This means that when pressing the power key an interrupt is generated to the UPP that starts the MCU. The MCU then reads the UEM interrupt register and notice that it is a PWRONX interrupt. The MCU now reads the status of the PWRONX signal using the UEM control bus, CBUS. If the PWRONX signal stays low for a certain time the MCU accepts this as a valid power on state and continues with the SW initialization of the baseband. If the power on key does not indicate a valid power-on situation, the MCU powers off the baseband.

Power up when charger is connected

In order to be able to detect and start charging in cases where the main battery is fully discharged (empty) and hence UEM has no supply (NO_SUPPLY or BACKUP mode of UEM), charging is controlled by START-UP CHARGING circuitry.

Whenever VBAT level is detected to be below master reset threshold (V controlled by START_UP charge circuitry. Connecting a charger forces VCHAR input to

rise above charger detection threshold, VCH started. UEM generates 100mA constant output current from the connected charger’s

output voltage. As battery charges its voltage rises, and when VBAT voltage level higher than master reset threshold limit (V

MSTR-

. By detection start-up charging is

DET+

) is detected START_UP charge is terminated.

MSTR+

), charging is

Monitoring the VBAT voltage level is done by charge control block (CHACON). MSTRX=‘1’ output reset signal (internal to UEM) is given to UEM’s RESET block when VBAT>V

MSTR+

RH-48

Troubleshooting — BB CCS Technical Documentation

and UEM enters into reset sequence.

If VBAT is detected to fall below V

during start-up charging, charging is cancelled. It

MSTR

will restart if new rising edge on VCHAR input is detected (VCHAR rising above VCH

RTC alarm power up

If phone is in POWER_OFF mode when RTC alarm occurs the wake-up procedure. After baseband is powered on, an interrupt is given to MCU. When RTC alarm occurs during ACTIVE mode, the interrupt for MCU is generated.

Power off

The Baseband switch power-off mode if any of following statements is true:

• Power key is pressed

• Battery voltage is too low (VBATT < 3.2 V)

• Watchdog timer register expires

The Power-down procedure is controlled by the UEM.

Power Consumption and Operation modes

DET+

In the POWER-OFF mode, the power (VBAT) is supplied to UEM, buzzer, vibra , LED, PA and PA drivers (Tomcat and Hornet). During this mode, the current consumption on this mode is approximately 35uA.

In the SLEEP mode, both processors, MCU and DSP, are in stand-by mode. Phone will go to sleep mode only when both processors make this request. When SLEEPX signal is detected low by the UEM, the phone enters SLEEP mode. VIO and VFLASH1 regulators are put into low quiescent current mode, VCORE enters LDO mode, and VANA and VFLASH2 regulators are disabled. All RF regulators are disabled during SLEEP mode. When SLEEPX signal is detected high by the UEM, the phone enters ACTIVE mode and all functions are activated.

The sleep mode is exited either by the expiration of a sleep clock counter in the UEM or by some external interrupt, generated by a charger connection, key press, headset connection, etc.

In sleep mode, VCTCXO is shut down and 32 kHz sleep clock oscillator is used as reference clock for the baseband.

The average current consumption of the phone in sleep mode can vary depending mainly on SW state (e.g., slot cycle 0, 1, or 2 and if the phone is working on IS95 or IS2000 for CDMA); however, on average is about 6 mA in slot cycle 0 on IS95.

In the ACTIVE mode, the phone is in normal operation, scanning for channels, listening to a base station, transmitting and processing information. There are several sub-states

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CCS Technical Documentation Troubleshooting — BB

in the active mode depending on the phone present state of the phone such as: burst reception, burst transmission, if DSP is working, etc.

In active mode SW controls the UEM RF regulators: VR1A and VR1B can be enabled or disabled. VSIM can be enabled or disabled and its output voltage can be programmed to be 1.8V or 3.3V. VR2 and VR4 -VR7 can be enabled or disabled or forced into low quiescent current mode. VR3 is always enabled in active mode and disabled during Sleep mode and cannot be control by SW in the same way as the other regulators. VR3 will only turn off if both processors request to be in sleep mode.

In the CHARGING mode, the charging can be performed in parallel with any other operating mode. A BSI resistor inside the battery pack indicates the battery type/size. The resistor value corresponds to a specific battery capacity. This capacity value is related to the battery technology.

The battery voltage, temperature, size, and charging current are measured by the UEM, and the charging software running in the UPP controls it.

The charging control circuitry (CHACON) inside the UEM controls the charging current delivered from the charger to the battery and phone. The battery voltage rise is limited by turning the UEM switch off, when the battery voltage has reached 4.2 V. Charging current is monitored by measuring the voltage drop across a 220 mOhm resistor.

Power Distribution

In normal operation, the baseband is powered from the phone‘s battery. The battery consists of one Lithium-Ion cell capacity of 850 mAh, and some safety and protection circuits to prevent harm to the battery.

The UEM ASIC controls the power distribution to the whole phone through the BB and RF regulators excluding the power amplifier (PA), which has a continuous power rail directly from the battery. The battery feeds power directly to the following parts of the system: UEM, PA, buzzer, vibra, display, and keyboard lights.

The heart of the power distribution to the phone is the power control block inside UEM. It includes all the voltage regulators and feeds the power to the whole system. UEM handles hardware functions of power up so that regulators are not powered and power up reset (PURX) are not released if battery voltage is less than 3 V.

RH-48 Baseband is powered from five different UEM regulators (VANA, VIO, VFLASH1, VFLASH2, and VCORE (DC/DC) See Table 1.

UEM supplies also voltages VR1A, VR1B, VR2, VR3, VR4, VR5, VR6, and VR7 for RF. See Table 2.

RH-48

Troubleshooting — BB CCS Technical Documentation

Table 1: RH-48 Baseband regulators

Regulator

VCORE 300 1.5 Output voltage selectable 1.0V/1.3V/1.5V/1.8V

VIO 150 1.8 Enabled always except during power-off mode

VFLASH1 70 2.78 Enabled always except during power-off mode

VFLASH2 40 2.78 Enabled only when data cable is connected

VANA 80 2.78 Enabled only when the system is awake (Off

VSIM 25 3.0 Enabled only when SIM card is used

Regulator

VR1A 10 4.75 Enabled when cell transmitter is on

VR1B 10 4.75 Enabled when the transmitter is on

Maximum current (mA)

Table 2: RH-48 RF regulators

Maximum current (mA)

Vout (V) Notes

Power up default 1.5V

during sleep and power off-modes)

Vout (V) Notes

VR2 100 2.78 Enabled when the transmitter is on

VR3 20 2.78 Enabled when SleepX is high

VR4 50 2.78 Enabled when the receiver is on

VR5 50 2.78 Enabled when the receiver is on

VR6 50 2.78 Enabled when the transmitter is on

VR7 45 2.78 Enabled when the receiver is on

The charge pump that is used by VR1A is constructed around UEM. The charge pump works with Cbus (1.2 MHz) oscillator and gives a 4.75 V regulated output voltage to RF.

RH-48

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Clock Distribution

RFClk (19.2 MHz Analog)

The main clock signal for the baseband is generated from the voltage and temperature controlled crystal oscillator VCTCXO (G500). This 19.2 MHz clock signal is generated at the RF and is fed to Yoda pin 18 (TCXO_IN). Yoda then converts the analog sine waveform to a digital waveform with swing voltage of 0 tot 1.8V and sends it to the UPP from pin 16 at Yoda (19.2 Out) to the UPP pin M5 (RFCLK). (See Figure 4 for waveform.)

Figure 4: Waveform of 19.2MHz clock (VCTCXO) going to the Yoda ASIC

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Figure 5: Waveform of 19.2MHz Clk going to the UPP for Yoda ASIC at C711

This is the RFCLK signal for the UPP.

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CCS Technical Documentation Troubleshooting — BB

RFConvClk (19.2 MHz digital)

The UPP distributes the 19.2MHz internal clock to the DSP and MCU, where SW multiplies this clock by seven for the DSP and by two for the MCU. (See Figure 6.)

Figure 6: RFCovCLk waveform

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CBUSClk Interface

A 1.2 MHz clock signal is use for CBUS, which is used by the MCU to transfer data between UEM and UPP. (See the following figure for Cbus data transfer.)

DBUS Clk Interface

A 9.6 MHz clock signal is use for DBUS, which is used by the DSP to transfer data between UEM and UPP. (See the following figure.)

Figure 7: Cbus Data Transfer

Figure 8: Dbus data transferring

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The system clock is stopped during sleep mode by disabling the VCTCXO power supply (VR3) from the UEM regulator output by turning off the controlled output signal SleepX from UPP.

SleepCLK (Digital)

The UEM provides a 32kHz sleep clock for internal use and to UPP, where it is used for the sleep mode timing. (Figure 9.)

Figure 9: 32kHz Digital output from UEM

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Nokia 3105 Service Manual 8rh48bb

Contents

Baseband Troubleshooting

RH-48 Baseband Module Overview

Baseband and RF Architecture

Power Up and Reset

Power up with PWR key

Power up when charger is connected

RTC alarm power up

Power off

Power Consumption and Operation modes

Power Distribution

Clock Distribution

RFClk (19.2 MHz Analog)

RFConvClk (19.2 MHz digital)

CBUSClk Interface

DBUS Clk Interface

SleepCLK (Digital)