Nokia 30 Service Manual 10 tme3 rl7_a3
PAMS Technical Documentation Schematics / Layout s RL7 v.10 TME-3
Block diagram v.RB5.0 ed.76
SYS
schematic
RFAUXCONV_O(2:0)
RFCONV_O(9:0)
GENIO_O(31:0)
RFAUX_O(1:0)
RFICCNTRL_O(2:0)
RFCLKGND_I
RFCLK_I
SLOWAD_O(6:0)
PUSL_O(2:0)
0
RXIINP
2
RXQINP
4
TXIOUTP
5
TXIOUTN
6
TXQOUTP
7
TXQOUTN
9
VREFRF01
8
VREFRF02
2
AFC
0
TXC
0
RFBUSCLK
1
RFBUSDA
2
RFBUSEN1
TXC
5
RESET
6
6
HGR_TEMP
AFC
TXC
TXQOUTP
TXQOUTN
TXIOUTP
TXIOUTN
RFBUSCLK
RFBUSDA
RFBUSEN1
VREFRF01
VREFRF02
TXP
HGR_TEMP
RESET
RF
RF
RXQINP
RXIINP
RFCLK_I
RFCLKGND_I
LPRFCLK_I
LPRFCLK_I
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PAMS Technical Documentation Schematics / Layout s RL7 v.10 TME-3
Block Diagram System v.RB5.0 ed.128
CONN
ACCDIF(2:0)
KEYB(10:0)
DSP_MCUTEST(2:0)
AUDIO(4:0)
SLOWAD(6:0)
Components: 100-149
PWRONX
AUDIO(4:0)
SLOWAD(6:0)
GENIO(31:0)
POWER
high_density_2.0
RFAUXCONV(2:0)
RFCONVDA(5:0)
RFCONVCTRL(2:0)
AUDIODATA(1:0)
AUDUEMCTRL(3:0)
RFCONV(9:0)
GENIO(31:0)
IACCDIF(5:0)
PUSL_E(2:0)
UPP
LCDUI(2:0)
KEYB(10:0)
GENIO(31:0)
RFCONVCTRL(2:0)
AUDIODATA(1:0)
AUDUEMCTRL(3:0)
IACCDIF(5:0) JTAG_EMULATION(6:0)
PUSL(2:0)
basic8m
RFCLK
RFCLKGND
RFCONVDA(5:0)
RFICCNTRL(2:0)
MEMADDA(23:0)
MEMCONT(9:0)
DSP_MCUTEST(2:0)
RF_BB
SLOWAD(6:0) SLOWAD_O(6:0)
RFCONV(9:0) RFCONV_O(9:0)
RFAUXCONV(2:0) RFAUXCONV_O(2:0)
LPRFCLK LPRFCLK_I
RFCLK
RFCLKGND RFCLKGND_I
RFAUX(1:0)
GENIO(31:0) GENIO_O(31:0)
PUSL(2:0) PUSL_O(2:0)
RFICCNTRL(2:0) RFICCNTRL_O(2:0)
MEMADDA(23:0)
MEMCONT(9:0)
Gsm
RFCLK_I
RFAUX_O(1:0)
Components: 400-419
MEMORY
amd64mbit
SLOWAD_O(6:0)
RFCONV_O(9:0)
RFAUXCONV_O(2:0)
LPRFCLK_I
RFCLK_I
RFCLKGND_I
RFAUX_O(1:0)
GENIO_O(31:0)
PUSL_O(2:0)
RFICCNTRL_O(2:0)
ACCDIF(2:0)
Components: 200-249
Components: 300-319
GENIO(31:0)
Components: 320-349
R&D
use
Issue 1 04/2002 Nokia Corpo r at i o n Page A-2
PAMS Technical Documentation Schematics / Layout s RL7 v.10 TME-3
s:
Schematic diagram RF-BB v.RB5.0 ed.20
RFCONV(9:0)
GENIO(31:0)
RFAUXCONV(2:0)
RFICCNTRL(2:0)
RFCONV/RFCONV_O: 0: RXIINP
0
1
2
3
4
5
6
7
8
9
C400
C401
100p
100p
13
5
6
7
8
9
10
11
12
0
1
2
0
1
2
GNDGND
R401
10k
R400
10k
Neg. inputs of RxI and RxQ
are connected to VRef2
0
1
2
3
4
5
6
7
8
9
13
5
6
7
8
9
10
11
12
0
1
2
0
1
2
1: RXIINN
2: RXQINP
3: RXQINN
4: TXIOUTP
5: TXIOUTN
6: TXQOUTP
7: TXQOUTN
8: VREFRF02
9: VREFRF01
GENIO/GENIO_O
RFAUXCONV/RFAUXCONV_O
RFICCNTRL/RFICCNTR_O
0: TXC
1: TXPWRDET
2: AFC
0: RFBUSCLK
1: RFBUSDA
2: RFBUSEN1
RFCONV_O(9:0)
GENIO_O(31:0)
RFAUXCONV_O(2:0)
RFICCNTRL_O(2:0)
0
1
2
PUSL(2:0)
5
6
SLOWAD(6:0) SLOWAD_O(6:0)
RFAUX(1:0)
LPRFCLK
RFCLK
GND
R403
100R
C403
100p
0
1
2
PUSL_O(2:0)
SLOWAD/SLOWAD_O
5
6
5: VCXOTEMP
6: PATEMP
LPRFCLK_I
RFCLK_I
RFCLKGND_IRFCLKGND
RFAUX_O(1:0)
Last reference
R403
C403
Issue 1 04/2002 Nokia Corpo r at i o n Page A-3
PAMS Technical Documentation Schematics / Layout s RL7 v.10 TME-3
Schematic Diagram UPP v.RB5.0 ed.26
JTAG_EMULATION(6:0)
DSP_MCUTEST(2:0)
GENIO(31:0)
MEMADDA(23:0)
MEMCONT(9:0)
D300
UPP8M_V1.1_UBGA144
A11
VBAT
J300
GND
2
0
1
STIRXD
STITXD
STISCLK
VBATT
GND
VCORE
C301
100n
GND
GND
0
1
2
3
4
5
6
0
1
2
0
1
2
3
VCORE
GND
GND
GND
GND
C300
100n
GND
23
24
VCORE
C302
VIO
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
100n
GND
C303
100n
C305
100n
9
0
1
2
3
4
5
6
7
8
TESTMODE
C4
JTCLK
A2
JTRST
A3
JTDI
C3
JTMS
B3
JTDO
B2
EMU0
A1
EMU1
B4
GENTEST0
B5
GENTEST1
C5
GENTEST2
B11
GENIO0
A12
GENIO1
A13
GENIO2
B12
GENIO3
A4
VDDDSP1
C1
VDDDSP2
E1
VDDDSP3
D5
VSSDSP1
D4
VSSDSP2
F4
VSSDSP3
K1
VDDMCU
J4
VSSMCU
J1
VDDCORE1
N8
VDDCORE2
J13
VDDPDRAM1
A9
VDDPDRAM2
H4
VSSCORE1
K7
VSSCORE2
H10
VSSPDRAM1
D8
VSSPDRAM2
N10
VDDIO1
H1
VDDIO2
A6
VDDIO3
F13
VDDIO4
K9
VSSIO1
G4
VSSIO2
D7
VSSIO3
G10
VSSIO4
N5
VDDA
N7
0
M8
1
L10
2
L11
3
M12
4
N13
5
L13
6
J11
7
M7
8
M9
9
M10
10
M11
11
K11
12
L12
13
K13
14
J12
15
H11
16
L8
17
L9
18
K8
19
K12
20
H12
21
K6
22
K10
FLSRSTX
N9
EXTWRX
L7
EXTRDX
L6
FLS2CSX
M6
FLSBAAX
N11
FLSPS
M13
FLSAVDX
N12
FLSCLK
N6
FLSCSX
H13
FLSRDY
M1
GENIO23
J10
GENIO24
SLEEPCLK
DBUSEN1X
RFCONVCLK
RFBUSCLK
RFBUSEN1X
LCDCAMCLK
LCDCAMTXDA
PURX
SLEEPX
EARDATA
MICDATA
UEMINT
CBUSCLK
CBUSDA
CBUSENX
GENIO31
GENIO30
GENIO29
GENIO26
IRTX
IRRX
MBUSTX
MBUSRX
FBUSTX
FBUSRX
DBUSCLK
DBUSDA
GENIO18
RXID
GENIO16
RXQD
GENIO17
TXID
GENIO14
TXQD
GENIO15
AUXDA
GENIO13
GENIO5
GENIO6
GENIO7
GENIO8
GENIO9
GENIO10
GENIO11
GENIO12
RFBUSDA
GENIO25
RFCLK
VSSA
GENIO28
GENIO4
GENIO27
LCDCSX
GENIO19
GENIO20
GENIO21
GENIO22
K2
L1
H3
E2
F2
J2
G1
G2
F3
D1
SIMIODa
SIMIOCtrl
C2
SIMIOClk
D2
B1
H2
G3
E3
D3
F1
E4
K3
L3
J3
N3
K4
L4
M4
N4
K5
M2
N1
N2
M3
L2
E12
D11
D12
E10
E11
D13
F10
F11
E13
G11
F12
G13
G12
M5
L5
D6
A7
C6
B6
A5
C7
B13
C11
C12
C13
D9
P00
A10
P01
B10
P02
C10
P03
D10
P04
A8
P10
B8
P11
C8
P12
B9
P13
C9
P14
B7
P15
0
1
2
0
1
0
1
LCDUI(2:0)
2
3
RFCLK
RFCLKGND
31
30
29
0
1
2
3
4
5
0
1
2
0
1
2
3
4
5
0
1
2
3
4
5
6
7
8
9
10
26
18
16
17
14
15
13
5
6
7
8
9
10
11
12
0
1
2
25
28
4
27
19
20
21
22
C304
27p
GND
0
1
2
PUSL(2:0)
AUDIODATA(1:0)
AUDUEMCTRL(3:0)
IACCDIF(5:0)
RFCONVCTRL(2:0)
RFCONVDA(5:0)
RFICCNTRL(2:0)
KEYB(10:0)
Last references:
C305
X300
D300
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PAMS Technical Documentation Schematics / Layout s RL7 v.10 TME-3
Schematic Diagram UEM v. RB5.0 ed. 77
VBAT
AUDIO(4:0)
600R/100MHz
600R/100MHz
600R/100MHz
600R/100MHz
600R/100MHz
600R/100MHz
L200
L201
L202
L203
L204
L205
SLOWAD(6:0)
GND
GND
GND
GND
GND
GND
C216
C219
C220
C222
C224
C247
1u0
1u0
1u0
1u0
1u0
1u0
VBATT1
VBATT2
VBATT3
VBATT4
VBATT5
VBATT6
1 /4 100k
3 /4 100k 4x100k
4
0
1
2
3
4
5
6
GND
PUSL_E(2:0)
VFLASH1
VANA
R204
C205
10p
100.0k
B200
32.768kHz
100.0k100.0k100.0k
68k
GND
R202
R202
R202 4x100k/4 100k
GND
VCORE
VSIM
C231
1u0
C242
1u0
0
1
2
3
VANA
VANA
VBAT
C201
10n
GND
GND
C236
C202
1u0
1u0
VR1B
VANA
VSIM
0
1
3
2
1
0
0
1
2
VR1A
C239
1u0
GND
SIMRST
SIMCLKO
SIMIODAO
GND
2
C215
E100
100n
1
GND
GND
ACCDIF(2:0)
RFCONV(9:0)
RFAUXCONV(2:0)
GND
2
E101
1
GND
R206
EMIF03-SIM01
R1
R2
R3
VSIM3GND
RST
2
SIMCLK
1
SK51002-001
2
E102
1
GND
X200
VPP
DATA
Last references:
R207
C247
L205
V201
X200
D200
J203
B200
E103
VSIM
4
5
6
GND
2
E103
1
GND
PRODTP3
C229
1u0
C243
1u0
GND
C204
1u01u0
GND
ACCDIF(2)
0
1
2
3
4
5
6
7
GND
VR3
VFLASH1
PRODTP7
ACCDIF(0)
GND
9
8
GND
C238
C227
1u0
VR2
1u0
GND
VFLASH2
C203
GND
0
PRODTP2
1
2
ACCDIF(1)
C228
1u0
GND
VR4
VR5
C237
1u0
GND
PWRONX
VBATT1
V201
RN1302
10k
R207
R2
GND
C233
2x10k
R1
GND
C210
1u0
GND
432
C235
C234
1n0
1n0
1n0
VFLASH1
V200
RN1302
2x10k
R1
VBACK
C206
10p
VFLASH1
C218
100n
GND
0
1
2
PRODTP1
4x100kR202
4x100k/4 100k2
C209
100n
GND
VIO
C217
100n
GND
AUDUEMCTRL(3:0)
AUDIODATA(1:0)
GENIO(31:0)
IACCDIF(5:0)
RFCONVCTRL(2:0)
RFCONVDA(5:0)
C232
1n0
GND
not_assembled
C245
2u2
1u0
C212
GND
GND
VANA
GND
R2
100n
C213
VBATT6
0
1
543210
210
VBATT3
GND
210
VBATT2
3210
543
VBATT4
VBATT5
VBATT1
GND
GND
1u0
C214
VBATT1
GND
GND
D200
UEM_V4.4_WDOGS_ENABLED
M9
VCHARIN1
P9
L6
D5
GND
P8
N9
N11
N14
A1
P7
P1
P2
P3
N3
M4
K4
H2
H1
J2
J1
H3
J3
J4
K2
K1
K3
M3
GND
N7
C4
A9
C10
B11
D9
B6
A6
A10
A8
B7
C8
B5
A5
302931
C5
B8
B9
C6
D6
A7
C7
D10
A11
B10
A13
C11
A14
A12
B12
D11
C9
C2
D3
D1
D2
C1
E3
D4
P13
M14
J14
K11
K13
L11
L14
F6
F7
F8
F9
G6
G7
G8
G9
H6
H7
H8
H9
VCHAROUT1
VCHARIN2
VCHAROUT2
VCHARINKL9VCHAROUTK
TESTMODE
VBATBB1
VBATBB2
VBATBB3
VBATBB4
VBATBB5
PWRONX
OSCIN
OSCOUT
VBACK
GNDFLASH1
VRTC
OSCCAP
VDAAUD1
MICBCAP
MICB1
MIC1P
MIC1N
MICB2
MIC2P
MIC2N
MIC3P
MIC3N
MICSUB
VSAAUD1
HOOKINT
VDD28
VDD18
PURX
SLEEPX
SLEEPCLK
SIMCARDDET
EARDATA
MICDATA
UEMINT
CBUSCLK
CBUSDA
CBUSENX
SIMIODAI
SIMCLKI
VDACONVRX
SIMIOCTRL
IRTX
IRRX
VSACONVRX
MBUSTX
MBUSRX
VDACONVTX
FBUSTXI
FBUSRXI
DBUSCLK
DBUSDA
VSACONVTX
DBUSENX
RFCONVCLK
TXPWRDET
RXID
RXQD
TXID
TXQD
AUXD
VSS
BSI
BTEMP
KEYB1
KEYB2
LS
VCXOTEMP
PATEMP
VBATVR1
VBATVR2
VBATVR3
VBATVR4
VBATVR5
VBATVR6
VBATVR7
GNDTH1
GNDTH2
GNDTH3
GNDTH4
GNDTH5
GNDTH6
GNDTH7
GNDTH8
GNDTH9
GNDTH10
GNDTH11
GNDTH12
VBATREGS
GNDREGS
PWMO
PWM1C
CHDISX
VANA
VFLASH1
VFLASH2
VCORE
VDAAUD2
EARP
EARN
XEAR
HEADINT
HFCM
VSAAUD2
VBATDRIV
BUZZO
VIBRA
CALLED1
CALLED2
VSADRIV1
DLIGHT
KLIGHT
VSADRIV2
VSIM
SIMIODAO
SIMCLKO
SIMRST
VSIMGND
IRLEDC
IRRXN
MBUS
FBUSTXO
FBUSRXO
RXIINP
RXIINN
RXQINP
RXQINN
TXIOUTP
TXIOUTN
TXQOUTP
TXQOUTN
AUXOUT
AFCOUT
VREFRFO1
VREFRFO2
VREF25BB
VREF25RF
VREF278
CCP
CCN
VPUMP
GNDVR1
VR1A
VR1B
IPA1
IPA2
ISET
VBG
UEMRSTX
SMPSCLK
GNDTH13
GNDTH14
GNDTH15
GNDTH16
N10
P10
M10
L10
GND
M7
P4
M5
GND
N8
M8
P11
M13
B1
VIO
L5
GND
N2
M2
C211
GND
100n
M1
N1
N6
L1
HF
L2
L3
F2
G2
G3
E1
E2
F4
F1
F3
G1
C3
B2
B3
A2
P6
A3
N4
L4
M6
N5
P5
B13
C13
B14
D12
C14
C12
F11
E11
D14
E14
E12
F12
E13
E4
D13
H13
H14
G14
G13
H12
P12
M11
N13
N12
P14
M12
L12
VR2
J12
VR3
K14
VR4
J11
VR5
L13
VR6
K12
VR7
F14
F13
G12
J13
A4
B4
J6
J7
J8
J9
GND
GND
R205
27k
GND
C244
1u0
GND
GND
GND
GND
GND
GND
C225
220n
GND
VANA
C226
1u0
GND
GND
GND
C240
1u0
C207
C200
1u0
GND
VIO
C208
GND
C221
100n
C223
100n
GND
C246
1u0
VBATT2
C230
1u0
C241
1u0
GND
1u0
GND
GND
GND
GND
VR6
GND
1u0
VR7
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PAMS Technical Documentation Schematics / Layout s RL7 v.10 TME-3
Schematic diagram AIF, PWR, LED v. RB5.0 ed.132
VBAT
12
C120
1n0
R112
7
6
5
IN
KEYB(10:0)
X100
GND
not_assembled
R164
GND
34
G
V105
DTC143ZE
R1
4k7
R2
3
4
2
E108
R165
0R
0R
100R
47k
2
1
R
SML-521MUW-NP
IN
OUT
GND
GND
21
GND
GND
PRODTP5
V100
R113
4k7
F100
2A
R150
330R
V104
DTC143ZE
R1
R2
47k
10
9
8
J100
J101
47k
12
GND
10
DTC143ZE
R1
IN
4k7
R2
L100
42R/100MHz
MAX1653EEE
1
SS
7
FB
8
CSH
9
CSL
6
_SHDN
2
_SKIP
4
GND SYNC
PGND
V+ VL
HEAT_SLUG
34
G
R114
100R
V103
DTC143ZE
R1
IN
4k7
OUT 47k
R2
GND
GND
V107
OUT
47k
GND
GND
VBB
N101
U//U
BST
LX
DL
DH
REF
C131
1
2
14
15
13
16
5
3
11
17
4u7
R
SML-521MUW-NP
OUT
GND
GND
IN
4k7
V109
STPS340U
GND
V101
R115
V108
DTC143ZE
R1
R2
C126
330n
330R
47k
R110
OUT
GND
GND
R146
GNDGND
BAS70-05W
C121
100n
GND
34
G
100R
IN
VIN
30V/0.1J
12
R
R111
V106
DTC143ZE
R1
4k7
R2
C136
1n0
V110
47k
GND
SML-521MUW-NP
330R
C137
V102
GND
OUT
GND
GND
GND
G
2
G
4
68u_25V
L110
10uH
DD
S
DD
S
817
635
GND
C138
1n0
V111
FDS6912A
V111
FDS6912A
PRODTP9
C107
GND
V114
VBB
GND
68u_25V
GND
C113
STPS340U
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
X101
1
2
3
4
5
6
7
8
9
2
U6
1
GND
Last references:
R165
C139
L109
V119
X101
N102
D108
E131
Z101
J101
F101
GND
15
28
2
E118
1
2
E128
1
1=VBB <-->
2=GND
3=VBB <-->
4=GND
5=VBB <-->
6=GND
7=VBB <-->
8=GND
9=VBB <-->
10=GND
11=VCCAM -->
12=RESET -->
13=GND
14=GENRXD <-15=GENTXD -->
16=GND
17=RTSAM <-18=CTSAM -->
19=GND
20=MBUS <-->
21=BSI <-22=GND
23=PCMDCLK/MIC+ <-24=GND
25=PCMSCLK/MIC- <-26=PCMRX/EAR+ <-27=GND
28=PCMTX/EAR- -->
29=GND
30=FBUSRX <-31=Reserved/INPUT1 <-32=GND
33=DTR/INPUT2 <-34=FBUSTX -->
35=GND
36=RTS/INPUT3 <-37=Reserved/OUTPUT1 -->
38=GND
39=DCD/OUTPUT2 -->
40=DSR/OUTPUT3 -->
41=GND
42=CTS/OUTPUT4 -->
43=RI/OUTPUT5 -->
44=GND
45=Reserved
46=Reserved
47=GND
48=Reserved
49=Reserved
50=GND
97531
141211
2
U5
1
GND
26252321201817
2
E116
1
GND
39373634333130
GND
49484645434240
2
E129
1
GND
GND
E130
2
2
E131
1
1
GND
GND
VBB
H-line
H-line
H-line
H-line
H-line
H-line
H-line
H-line
H-line
H-line
GND
GND
H-line
H-line
H-line
H-line
H-line
H-line
H-line
H-line
H-line
H-line
GND
GND
30
14
R162
100R
R148
GND
42R/100MHz
R143
GND
2
U2
1
AIF_3V3
BAS70-05W
10k
AIF_3V3
BAS70-05W
R163
100R
14V/46V
L108
4k7
C129
1n0
SLOWAD(6:0)
2
U1
1
GND
U3
GND
GND
GND
R149
4k7
240R/100MHz
240R/100MHz
42R/100MHz
C135
220p
GND
212
GND
12
14
15
17
18
20
21
30
23
25
31
33
34
36
37
39
40
42
43
V115
V120
R155
L102
L103
L109
47k
R154
4k7
R153
GND
2
E104
11
12
14
1
GND
15
17
18
20
21
23
25
26
28
30
31
33
34
36
37
39
40
42
43
45
46
48
49
U4
1
GND
GND
GND
28
26
11
GND
AIF_3V3
C102
100n
GENIO(31:0)
N102
-
+
AIF_3V35=
GND2=
AIF_3V3
4u7
C123
R144
R145
GND
GND
1
GND
42R/100MHz
22k
47k
AIF_3V3
C103
100n
GND
0=Reserved/OUTPUT1
1=DCD/OUTPUT2
2=DSR/OUTPUT3
3=CTS/OUTPUT4
4=RI/OUTPUT5
VIO
R117
L101
C117
680u_4.0V
GND
C127
220p
GND
VIO
VIO
C100
C101
100n
100n
GND
GND
VIN
MAX918EUK-T
4
27k
N.C.
R118
15u
GND
GND
ON_OFF
BYPASS
NC
R119
N100
LP2985AIM5X
C139
220p
1u0
L105
VBAT
-3.3
GND
11k
VIN
GND
GND
R134
0R10
R137
0R10
3
VOUT
C114
680u_4.0V
AIF_3V3
C104
100n
3
4k7
DSP_MCUTEST(2:0)
VBATTRF
C115
680u_4.0V
GND
L104
42R/100MHz
C128
1n0
AIF_3V3
C105
100n
GND
18=Reset
0=GENTXD
27=CTSAM
15=PCMTX
3=POWERFAIL
680u_4.0V
GND
GND
GND
ACCDIF(2:0)
C116
GND
VBAT
C124
680u_4.0V
18
0
27
15
0
1
2
3
4
1
2
1=FBUSTXO
2=FBUSRXO
0=MBUS
not_assembled
PRODTP4
GND
4k7
R100
R101
D100
74LVC07
12
1
D100
74LVC07
34
1
D100
74LVC07
56
1
D100
74LVC07
98
1
D100
74LVC07
11 10
1
D100
74LVC07
13 12
1
D101
74LVC07
98
1
D101
74LVC07
11
1
D101
74LVC07
12
1
D101
74LVC07
13 12
1
R151
0R
R152
0
AUDIO(4:0)
AIF_3V3
4k7
4k7
R102
R103
VIO14=
GND7=
14= VIO
7= GND
14= VIO
7= GND
VIO14=
GND7=
VIO14=
GND7=
14= VIO
7= GND
VIO14=
GND7=
10
VIO14=
GND7=
14= VIO
7= GND
14=
VIO
7= GND
0R
16=PCMRX
24=Reserved/INPUT1
25=DTR/INPUT2
26=RTS/INPUT3
3=MIC2P
2=MIC2N
4=MICB2
1=EARN
0=EARP
4k7
4k7
R104
R105
VFLASH1
R116
1=GENRXD
2=RTSAM
14=PCMDCLK
17=PCMSCLK
C109
33n
3
C110
33n
2
4k7
4k7
R107
R106
1k0
14=VIO
GND
7=
not_assembled
C108
C111
1n0
4
1
0
28=Audio Select
4=Load Control
4k7
4k7
R108
R109
GND
GND
AIF_3V35=
GND2=
D101
74LVC07
56
1
1
2
14
17
16
24
25
26
not_assembled
1k0
R124
R125
GND
1n0
2k2
R129
2k2
C112
1n0
GND
GND
R131
33R
R132
33R
C118
D101
74LVC07
34
28
4
4k7
D102
74LVC244A
1
EN
2
18
4
16
6
14
8
12
AIF_3V320=
GND
10=
D102
74LVC244A
19
EN
17
15
13
11
27p
3
5
7
9
20= AIF_3V3
10= GND
D103
NC7WZ16P6X
16
1
NC7WZ16P6X
34
1
5= AIF_3V3
2= GND
D104
74LVC244A
EN
18
16
14
12
VIO
20=
GND
10=
D104
74LVC244A
EN
3
5
7
9
VIO
20=
GND
10=
not_assembled
1k0
R130
GND
C119
27p
GND
GND
AIF_3V3
R135
1
VIO14=
GND7=
21313336
0234
1
0=BSI
10k
10k
10k
R158
R157R160
R156
10k
10k
R159
VIN
12
15
18
34
37
39
40
42
D103
43
30
200
1
GND
2
14
4
17
6
8
19
GND
17
15
31
13
33
11
36
47k
R142
AIF_p(50:1)
47k
GND
L106
42R/100MHz
C133
220p
VBAT
R141
100k
GND
C134
1n0
GND GND
12
14
15
17
18
20
21
30
0
1
31
33
34
36
37
39
40
42
43
1
B1
3
B0
6
SEL
1
B1
3
B0
6
SEL
1
B1
3
B0
6
SEL
1
B1
3
B0
6
SEL
4
6
R161
GND
L107
42R/100MHz
GND
GND
NC7SB3157P6X
4
A
NC7SB3157P6X
4
A
5= AIF_3V3
2= GND
NC7SB3157P6X
4
A
NC7SB3157P6X
4
A
5= AIF_3V3
2= GND
FDC6323L
Vin
R1
ON/OFF5
R1,C1
D105
AIF_3V35=
GND2=
D106
D107
AIF_3V35=
GND2=
D108
VDROP
10k
GND
V118
V112
21
SMBJ20A
GND
IP4026CX25
L-line
L-line
L-line
L-line
L-line
L-line
L-line
L-line
L-line
L-line
GND
GND
GND
IP4026CX25
L-line
L-line
L-line
L-line
L-line
L-line
L-line
L-line
L-line
L-line
GND
GND
GND
0
1
R147
Vout
C1
-
R2
1n0
C130
F101
2A
Z100
Z101
GND
3+
2
1
2=KEYB1
3=KEYB2
4=LS
1=BTEMP
14V/46V
Issue 1 04/2002 Nokia Corpo r at i o n Page A-6
PAMS Technical Documentation Schematics / Layout s RL7 v.10 TME-3
Schematic Diagram Memories v. RB5.0 ed.24
(TXD/FBUSTXO)
PRODTP7
PRODTP2
(SCK/MBUS)
PRODTP3
(RXD/FBUSRXO)
Last references:
R320
C324
D320
E320
J320
C320
C322
PRODTP6
(BSI)
(SHUT_DOWN)
VIO
C321
10n
10n
GND
GND
VFLASH1
C323
100n10n
GND
GND
PRODTP1
PRODTP5
J320
234
1
56789
PRODTP4
PRODTP9
GND
(5V1 / IMEI)(VPP)
(VBB)
GENIO(31:0)
MEMADDA(23:0)
MEMCONT(9:0)
23
D320
NMP_DCT4_32Mbit_40MHz
FLASHM 2Mx16
D10
A10
C10
B2
A9
B8
A8
B3
A2
A4
B4
B9
B6
B7
A6
A1
B5
D9
C7
C6
D5
D4
C3
C2
C9
C8
D7
D6
C5
C4
D2
D1
16
0
A
2097151
20
NC
NC
CLK/K
_AVD/_L
_CE/_E
_RP
_OE/_G
_WP
_WE/_W
RDY/_WAIT
PS/BINV
ADDRESS/DATA I/O
VIOA5=
VIOB1,D8=
VPPA7=
GNDA3,B10,C1,D3=
1
DU
2
DU
3
DU
4
DU
5
DU
6
DU
7
DU
8
DU
16
17
18
19
20
21
22
23
6
5
7
9
1
0
8
3
4
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R320
4k7
VPP PRODTP6
E320
12
VPP
C324
100n
GND
Issue 1 04/2002 Nokia Corpo r at i o n Page A-7
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