NEC UPD78P322GF-3B9, UPD78P322L, UPD78P322KD, UPD78P322KC, UPD78P322K Datasheet

DATA SHEET

MOS Integrated Circuit

µ

PD78P322

16/8-BIT SINGLE-CHIP MICROCONTROLLER

The µPD78P322 is a version provided by replacing the µPD75322's internal mask ROM with one-time PROM

or EPROM.

Because the one-time PROM version is programmable only once by users, it is ideally suited for small-scale

production of many different products, and rapid development and time-to-market of application sets.

The EPROM version is reprogrammable, and suited for the evaluation of systems.

µ

PD78P322K, which is the EPROM version, does not maintain planned reliability when

The
used in mass-produced products. Please use only experimentally or for evaluating functions
during trial manufacture.

Functions are described in detail in the following user's manual. Be sure to read it for designing.

µ

PD78322 User's Manual: IEU-1248

FEATURES

•

µ

PD78322 compatible

µ

• For mass-production, the
ROM

PD78P322 can be replaced with the µPD78322 which incorporates mask

• Internal PROM: 16,384 × 8 bits

• Programmable once only (one-time PROM version without window)

• Erasable with ultraviolet rays and electrically programmable (EPROM version with window)

• PROM programming characteristics:

• The

µ

PD78P328 is a QTOPTM microcontroller

Remark QTOP microcontroller is a general term for microcontrollers which incorporate one-time PROM, and

are totally supported by NEC's programming service (from programming to marking, screening, and
verification).

ORDERING INFORMATION

Part Number Package Internal ROM Quality Grade

µ

PD78P322GF-3B9 80-pin plastic QFP (14 × 20 mm) One-time PROM Standard

µ

PD78P322GJ-5BJ 74-pin plastic QFP (20 × 20 mm) One-time PROM Standard

µ

PD78P322L 68-pin plastic QFJ (950 × 950 mils) One-time PROM Standard

µ

PD78P322K 80-pin ceramic WQFN EPROM Not applicable

µ

PD78P322KC 68-pin ceramic WQFN EPROM Standard

µ

PD78P322KD 74-pin ceramic WQFN EPROM Standard

µ

PD27C256A compatible

Please refer to "Quality grade on NEC Semiconductor Devices" (Document number IEI-1209) published by NEC Corporation to know the
specification of quality grade on the devices and its recommended applications.

Functions common to the one-time PROM and EPROM versions are referred to as PROM functions throughout this document.

Document No. U10435EJ5V0DS00 (5th edition)

(Previous No. IC-2485)
Date Published December 1995 P
Printed in Japan

The information in this document is subject to change without notice.

The mark * shows revised points.

©

©

1991

1994

PIN CONFIGURATIONS (Top View)

(1) Normal operating mode

• 80-pin plastic QFP (14 × 20 mm)

µ

PD78P322GF-3B9

• 80-pin ceramic WQFN

µ

PD78P322K

80NC79

P27/INTP6/TI

NC

NC
P30/TxD
P31/RxD

P32/SO/SB0

P33/S1/SB1

P34/SCK
P80/TO00
P81/TO01
P82/TO02
P83/TO03
P84/TO10

NC

P85/TO11

RESET

X2
X1

V

WDTO

RTP0/P00

NC

TRP1/P01

NC

SS

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

25 26 27 28 29 30 31 32 33 34 35 36 37

P26/INTP5

P25/INTP4

P24/INTP3

78

77

76

P23/INTP2

P22/INTP1

P21/INTP0

75

74

73

DD

DD

P20/NMI

V

AV

72

71

REF

AV

70

P75/ANI5

P76/AN6

P77/AN765P73/AN3

67

68

69

38

66

39

P74/AN4

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41 P42/AD2

40

P72/ANI2
NC
NC
P71/ANI1
P70/ANI0

SS

AV
V

DD

P57/A15
P56/A14

P55/A13
P54/A12
P53/A11
P52/A10
P51/A9
P50/A8
P47/AD7
P46/AD6
P45/AD5
P44/AD4
P43/AD3
NC
NC
NC

µ

PD78P322

SSVSS

EA

RTP2/P02

RTP3/P03

RTP4/P04

RTP5/P05

RTP6/P06

RTP7/P07

V

P92/TAS

P93/TMD

P91/WR

ASTB

P90/RD

P40/AD0

P41/AD1

Caution Connect NC pins to VSS as a measure against noise (can leave open).

µ

Remark These pins are compatible with the

µ

PD78P322K does not maintain planned reliability when used in mass-produced products. Please use only

The

PD78322GF pins.

experimentally or for evaluating functions during trial manufacture.

2

• 74-pin plastic QFP (20 × 20 mm)

µ

PD78P322GJ-5BJ

• 74-pin ceramic WQFN

µ

PD78P322KD

P42/AD2

P41/AD1

74 73 72 71 70 69 68 67 66 65 64 63 62 57

P43/AD3
P44/AD4
P45/AD5
P46/AD6
P47/AD7

P50/A8

P51/A9
P52/A10
P53/A11
P54/A12
P55/A13

NC
P56/A14
P57/A15

V

AVSS
P70/AN0
P71/AN1

DD

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

20 21 22 23 24 25 26 27 28 29 30 31 32

19

P40/AD0

ASTB

P90/RD

P91/WR

P92/ TAS

P93/ TMD

VSSEA

P07/RTP7

P06/RTP6

P05/RTP5

61

33

P04/RTP4

P03/RTP3

P02/RTP2

60

59

58

34

35

36NC37

P01/RTP1

NC

56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38

µ

PD78P322

P00/RTP0
WDTO

SS

V
NC
X1
X2
RESET
P85/TO11
P84/TO10
P83/TO03
P82/TO02
P81/TO01
P80/TO00
NC
P34/SCK
P33/SI/SBI
P32/SO/SB0
P31/RxD
P30/TxD

NC

P72/AN2

P73/AN3

P74/AN4

P75/AN5

Caution Connect NC pins to V

SS for measures against noise (can leave open).

Remark These pins are compatible with the

REF

VDD

AVDD

AV

P76/AN6

P77/AN7

µ

PD78322GJ pins.

P20/NMI

P21/INTP0

P22/INTP1

P23/INTP2

P24/INTP3

P25/INTP4

P26/INTP5

P27/INTP6

3

• 68-pin plastic QFJ (950 × 950 mils)

µ

PD78P322L

• 68-pin ceramic WQFN

µ

PD78P322KC

P27/INTP6/TI

P26/INTP5

P25/INTP4

98765432168676665 61

P30/TxD

P31/RxD

P32/SO/SB0

P33/SI/SB1

P34/SCK
P80/TO00
P81/TO01
P82/TO02

P83/TO03
P84/TO10
P85/TO11

RESET

X2
X1

V

WDTO

RTP0/P00

SS

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

27 28 29 30 31 32 33 34 35 36 37 38 39

P24/INTP3

P23/INTP2

P22/INTP1

P21/INTP0

P20/NMI

VDDAVDD

AVREF

P77/AN7

P76/AN664P75/AN563P74/AN462P73/AN3

40

41

P72/AN2

60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44

43

P71/AN1
P70/AN0

SS

AV
VDD
P57/A15
P56/A14
P55/A13
P54/A12
P53/A11
P52/A10
P51/A9
P50/A8
P47/AD7
P46/AD6
P45/AD5
P44/AD4
P43/AD3

µ

PD78P322

SS

EA

V

P02/RTP2

P03/RTP3

P01/RTP1

P04/RTP4

P05/RTP5

P06/RTP6

P07/RTP7

P93/TMD

Remark These pins are compatible with the µPD78322L pins.

P91/WR

P92/TAS

ASTB

P90/RD

P40/AD0

P41/AD142P42/AD2

4

µ

PD78P322

P00-P07 : Port 0 RESET : Reset
P20-P27 : Port 2 X1, X2 : Crystal
P30-P34 : Port 3 WDTO : Watchdog Timer Output
P40-P47 : Port 4 EA : External Access
P50-P57 : Port 5 TMD : Turbo Mode
P70-P77 : Port 7 TAS : Turbo Access Strobe
P80-P85 : Port 8 WR : Write Strobe
P90-P93 : Port 9 RD : Read Strobe
NMI : Nonmaskable Interrupt ASTB : Address Strobe
INTP0-INTP6 : Interrupt From Peripherals AD0-AD7 : Address/Data Bus
RTP0-RTP7 : Real-Time Port A8-A15 : Address Bus
TI : Timer Input AN0-AN7 : Analog Input
TxD : Transmit Data AV
RxD : Receive Data AVSS : Analog VSS
SB0/SO : Serial Bus/Serial Output AVDD : Analog VDD
SB1/SI : Serial Bus/Serial Input VDD : Power Supply
SCK : Serial Clock VSS : Ground
TO00-TO03 : NC : No Connection
TO10, TO11 :

Timer Output

}

REF : Analog Reference Voltage

5

(2) PROM programming mode (RESET = H, AVDD = L)

• 80-pin plastic QFP (14 × 20 mm)

µ

PD78P322GF-3B9

• 80-pin ceramic WQFN

µ

PD78P322K

µ

PD78P322

(G)
NC
NC
OE
CE

(L)

A8
A10
A11
A12
A13

NC

A14

RESET

(Open)

(G)
V

(Open)

A0

NC

A1

NC

(G)

80NC79 78 77A576 75 74 73
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

SS

19
20
21
22
23
24

25 26 27 28 29 30 31 32 33 34 35 36 37

A9

72

DD

V

71

DD

AV

70 676869 6566

(G)

38D039D140

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41 D2

(G)
NC
NC

V

D7
D6
D5
D4
D3
NC
NC
NC

(G)

DD

(Open)

A2A3A4

A6

A7

PPVSSVSS

V

(Open)

Cautions 1. The recommended connection of the unused pins in the PROM programming mode are

indicated in parentheses.
L : Connect each pin to V

SS via a resistor.

G : Connect the pin to VSS.
Open : Leave the pin unconnected.

2. Connect NC pins to V

SS for measures against noise (can leave open).

The µPD78P322K does not maintain planned reliability when used in mass-produced products. Please use only
experimentally or for evaluating functions during trial manufacture.

6

• 74-pin plastic QFP (20 × 20 mm)

µ

PD78P322GJ-5BJ

• 74-pin ceramic WQFN

µ

PD78P322KD

µ

PD78P322

(L)

(L)

(G)

D3
D4
D5
D6
D7

NC

V

D2D1D0

74 73 72 71 70 69 68 67 66 65 64 63 62 57

1
2
3
4
5
6
7
8
9
10
11
12
13
14

DD

15
16
17
18

20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36NC37

19

(Open)

(L)

VSSVPPA7A6

A561A460A359A258A1

56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38

NC

A0
(Open)

SS

V
NC
(G)
(Open)
RESET
A14
A13
A12
A11
A10
A8
NC

(L)

CE
OE

DD

NC

(G)

AV

A9

VDD

(G)

Cautions 1. The recommended connection of the unused pins in the PROM programming mode are

indicated in parentheses.
L : Connect each pin to V

SS via a resistor.

G : Connect the pin to VSS.
Open : Leave the pin unconnected.

2. Connect NC pins to V

SS as measure against noise.

7

• 68-pin plastic QFJ (950 × 950 mil)

µ

PD78P322L

• 68-pin ceramic WQFN

µ

PD78P322KC

µ

PD78P322

OE

CE

(L)

A8
A10
A11
A12
A13
A14

RESET

(Open)

(G)
V

(Open)

A0

(G)

98765432168676665 61

10
11
12
13
14
15
16
17
18
19
20
21
22
23

SS

24
25
26

27 28 29 30 31 32 33 34 35 36 37 38 39

A9

DD

DD

V

AV

(G)

64 63 62

40D041D142D243

60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44

V

D7
D6
D5
D4
D3

(G)

DD

(L)

A1

A2

A3

A5A6A7

A4

PPVSS

V

(L)

(Open)

Caution The recommended connection of the unused pins in the PROM programming mode are indicated

in parentheses.
L : Connect each pin to V

SS via a resistor.

G : Connect the pin to VSS.
Open : Leave the pin unconnected.

A0-A14 : Address Bus RESET :
D0-D7 : Data Bus AV
CE : Chip Enable V

DD :

PP : Programming Power Supply

Programming Mode set

}

OE : Output Enable NC : No Connection

8

BLOCK DIAGRAM

(P20) NMI

INTP0-INTP5

(P21-P26)

(P80) TO00
(P81) TO01

(P82) TO02
(P83) TO03
(P84) TO10
(P85) TO11

(P27) TI/INTP6

(P34) SCK

(P32) SO/SB0

(P33) SI/SB1

(P30) TxD

(P31) RxD

PROGRAMMABLE
INTERRUPT
CONTROLLER

TIMER/COUNTER UNIT
(REALTIME PULSE
UNIT)

SERIAL INTERFACE

(SBI)

(UART)

EXU

Main RAM

GENERAL
REGISTERS
128 bytes
&
DATA
MEMORY
128 bytes

MICRO SEQUENCE
CONTROL

MICRO ROM

A/D CONVERTER

(10 bits)

AV

AVDD

ANI0-ANI7

(P70-P77)

SS

ALU

PROM/RAM

PROM

16

Kbytes

/

Peripheral

RAM

384

bytes

BCU

SYSTEM

CONTROL

&

BUS

CONTROL

&

PREFETCH

CONTROL

X1
X2

RESET
ASTB
RD
WR
TAS
TMD

Note

EA/V

PP

A8-A15 (P50-P57)

AD0-AD7 (P40-P47)

A0-A14

D0-D7
CE

OE

Note

PORTWDT

2

AVREF

2

WDTO

VDD

VSS

P80-P85

P90-P93

P50-P57

P70-P77

P40-P47

P00-P07 (REALTIME PORT)

P20-P27

P30-P34

Note

During PROM programming mode

µ

PD78P322

9

CONTENTS

1. PIN FUNCTIONS ... 11

1.1 Normal Operating Mode ... 11

1.2 PROM Programming Mode (RESET = H, AVDD = L) ... 13

1.3 Pin Input/Output Circuits and Recommended Connection of Unused Pins ... 14

2. DIFFERENCES BETWEEN µPD78P322 and µPD78322 ... 16

3. PROM PROGRAMMING ... 17

3.1 Operation Mode ... 17

3.2 PROM Write Procedure ... 18

3.3 PROM Read Procedure ... 20

4. ERASURE CHARACTERISTICS (FOR µPD78P322K/KC/KD ONLY) ... 21

5. OPAQUE FILM ON ERASURE WINDOW (FOR µPD78P322K/KC/KD ONLY) ... 21

µ

PD78P322

6. ONE-TIME PROM VERSION SCREENING ... 21

7. ELECTRICAL SPECIFICATIONS ... 22

8. PACKAGE DRAWINGS ... 36

9. RECOMMENDED SOLDERING CONDITIONS ... 42

APPENDIX A.

APPENDIX B. TOOLS ... 48

B.1 Development Tools ... 48
B.2 Evaluation Tools ... 52

*

B.3 Embedded Software ... 52

DRAWINGS OF CONVERSION SOCKETS AND RECOMMENDED FOOTPRINTS

... 44

10

µ

PD78P322

1. PIN FUNCTIONS

1.1 Normal Operating Mode

(1) Port Pins

Pin Name Input/Output Function Alternate

Function

P00-P07 Input/Output PORT0 RTP0-RTP7

(Output) 8-bit input/output port

Input or output mode can be specified bit-wise.

The port can also operate as a real-time output port.
P20 Input PORT 2 NMI
P21 8-bit input-only port INTP0
P22 INTP1
P23 INTP2
P24 INTP3
P25 INTP4
P26 INTP5
P27 INTP6/TI
P30 Input/Output PORT 3 TxD
P31 5-bit input/output port RxD
P32 Input or output mode can be specified bit-wise. SO/SB0
P33 SI/SB1
P34 SCK
P40-P47 Input/Output PORT 4 AD0-AD7

8-bit input/output port

Input or output mode can be specified in 8-bit units.
P50-P57 Input/Output PORT 5 A8-A15

8-bit input/output port

Input or output mode can be specified bit-wise.
P70-P77 Input PORT 7 AN0-AN7

8-bit input-only port
P80 Input/Output PORT 8 TO00
P81 6-bit input/output port TO01
P82 Input or output mode can be specified bit-wise. TO02
P83 TO03
P84 TO10
P85 TO11
P90 Input/Output PORT 9 RD
P91 4-bit input/output port WR
P92 Input or output mode can be specified bit-wise. TAS
P93 TMD

11

(2) Non-Port Pins (1/2)

Pin Name Input/Output Function Alternate

RTP0-RTP7 Output Real-time output port which outputs a pulse in synchronization with the trigger signal from P00-P07

INTP0 Input Edge-detected external interrupt request input. P21
INTP1 The valid edge can be specified in the mode register. P22
INTP2 P23
INTP3 P24
INTP4 P25
INTP5 P26
INTP6 P27/TI
NMI Input Edge-detected nonmaskable interrupt request input. P20

TI Input External count clock input pin to timer 1 (TM1). P27/INTP6
RxD Input Serial data input pin to asynchronous serial interface (UART). P31
TxD Output Serial data output pin from asynchronous serial interface (UART). P30
SI Input Serial data input pin to clocked serial interface in 3-wire mode. P33/SB1
SO Output Serial data output pin from clocked serial interface in 3-wire mode. P32/SB0
SB0 Input/Output Serial data input/output pins to/from clocked serial interface in SBI mode. P32/SO
SB1 P33/SI
SCK Input/Output Serial clock input/output pin to/from clocked serial interface. P34
AD0-AD7 Input/Output Multiplexed address/data bus used when external memory is added. P40-P47
A8-A15 Output Address bus used when external memory is added. P50-P57
RD Output Strobe signal output for external memory read operation. P90
WR Strobe signal output for external memory write operation. P91

*

TAS Output Control signal output pins to access turbo access manager (µPD71P301).
TMD P93
TO00 Output Pulse output from real-time pulse unit. P80
TO01 P81
TO02 P82
TO03 P83
TO10 P84
TO11 P85
ASTB Output Timing signal output pin to externally latch low-order address information output from —

WDTO Output Signal output which indicates that watchdog timer generated non-maskable interrupt. —
EA Input For µPD78P322, normally connect the EA pin to VDD. When the EA pin is connected to —

the real-time pulse unit (RPU).

The rising or falling edge can be selected for the valid edge by setting the mode register.

Note

AD0-AD7 for external memory access.

VSS, the µPD78P322 enters the ROMless mode and external memory is accessed.
The EA pin level cannot be changed during operation.

µ

PD78P322

Function

P92

Note Turbo access manager (µPD71P301) is available for maintenance purposes only.

12

µ

PD78P322

(2) Non-Port Pins (2/2)

Pin Name Input/Output Function Alternate

Function
AN0-AN7 Input Analog input to A/D converter. P70-P77
AVREF Input A/D converter reference voltage input. —
AVDD — A/D converter analog power supply. —
AVSS — A/D converter GND. —
RESET Input System reset input. —
X1 Input Crystal resonator connection pin for system clock generation. To supply external clock, —
X2 input to the X1 and input inverted signal to the X2 pin (X2 pin can be unconnected.)
VDD — Positive power supply pin. —
VSS — GND pin. —
NC — No internal connection. Connect to VSS (can leave open). —

1.2 PROM Programming Mode (RESET = H, AVDD = L)

Pin Name Input/Output Function
AVDD Input PROM programming mode setting.
RESET
A0-A14 Input Address bus.
D0-D7 Input/Output Data bus.
CE Input PROM enable to PROM.
OE Input Read strobe to PROM.
VPP — Write power supply.
VDD Positive power supply.
VSS GND.
NC No internal connection. Connect to VSS (can leave open).

13

1.3 Pin Input/Output Circuits and Recommended Connection of Unused Pins

Table 1-1 and Figure 1-1 show the pin input/output circuit schematically.

Table 1-1. Pin Input/Output Circuits and Recommended Connection of Unused Pins

Pin Input/Output Recommended connection of unused pins

circuit type

P00/RTP0-P07/RTP7 5 Input state: Independently connect to VDD or VSS via a resistor.

Output state: Leave Open.
P20/NMI 2 Connect to V SS.
P21/INTP0-P26/INTP5
P27/INTP6/TI
P30/TxD 5 Input state: Independently connect to VDD or VSS via a resistor.
P31/RxD Output state: Leave Open.
P32/SO/SB0 8
P33/SI/SB1
P34/SCK
P40/AD0-P47/AD7 5
P50/A8-P57/A15
P70/AN0-P77/AN7 9 Connect to V SS.
P80/TO00-P83/TO03 5 Input state: Independently connect to VDD or VSS via a resistor.
P84/TO10, P85/TO11 Output state: Leave Open.
P90/RD 5
P91/WR
P92/TAS
P93/TMD
WDTO 3 Leave Open.
ASTB 4
EA 1 —
RESET 2 —
AVDD — Connect to VDD.
AVREF — Connect to VSS.
AVSS
VPP — Connect to VDD.
NC — Connect to VSS (can leave open).

µ

PD78P322

14

Figure 1-1. Pin Input/Output Circuits

TYPE 1 TYPE 5

V

DD

IN

P-ch

N-ch

output
disable

input
disable

data

µ

PD78P322

V

DD

P-ch

IN/OUT

N-ch

TYPE 2

IN

TYPE 8

data

output
disable

Schmitt-triggerred input with hysteresis characteristics

TYPE 3 TYPE 9

V

DD

P-ch

OUT

IN

N-ch

TYPE 4

P-ch
N-ch

(Threshold voltage)

V

DD

P-ch

N-ch

V

REF

IN/OUT

Comparator

+

–

input
enable

V

DD

data

output
disable

Push-pull output that can be placed in high impedance
(both P-ch and N-ch off).

P-ch

N-ch

OUT

15

µ

PD78P322

2. DIFFERENCES BETWEEN µPD78P322 and µPD78322

The µPD78P322 is a version provided by replacing the µPD78322's on-chip mask ROM with one-time PROM
or EPROM. Thus, the µPD78P322 and µPD78322 are the same in function except for the ROM specifications such
as write or verify. Table 2-1 lists the differences between these two products.

µ

This Data Sheet describes the PROM specification function. Refer to the
other functions.

PD78322 documents for details of

Table 2-1. Differences between µPD78P322 and µPD78322

Item
Internal program memory One-time PROM EPROM Mask ROM
(electrical program) (programmable only once) (reprogrammable) (nonprogrammable)
PROM programming pin Contained Not contained
Package • 68-pin plastic QFJ • 68-pin ceramic WQFN • 68-pin plastic QFJ

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*

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Electrical specifications Current dissipations are different.
Others Noise immunity and noise radiation differ because circuit complexity and mask layout are

Caution The noise immunity and noise radiation differ between the PROM and mask ROM versions. To

replace the PROM version with the mask ROM version when shifting from experimental production
to mass production, evaluate your system by using the CS version (not ES version) of the mask
ROM version.

Part Number

µ

PD78P322

• 74-pin plastic QFP • 74-pin ceramic WQFN • 74-pin plastic QFP

• 80-pin plastic QFP • 80-pin ceramic WQFN • 80-pin plastic QFP

different.

µ

PD78322

16

µ

PD78P322

3. PROM PROGRAMMING

The PROM incorporated in the µPD78P322 is a 16,384 × 8-bit electrically writable PROM. For programming,

set the PROM programming mode by using the RESET and AVDD pins.

The programming characteristics are compatible with the µPD27C256A programming characteristics.

Table 3-1. Pin Function in Programming Mode

Function Normal Operating Mode Programming Mode
Address input P00-P07, P80, P20, P81-P85 A0-A14
Data input P40-P47 D0-D7
Chip enable/program pulse P31 CE
Output enable P30 OE
Program voltage VPP
Mode control RESET, AVDD

3.1 Operation Mode

To set the program write/verify mode, set RESET = H and AV

selected by setting the CE and OE pins, as listed in Table 3-2.

To read the PROM contents, set the read mode.
Connect the unused pins exactly as indicated in Pin Configuration.

DD = L. For the mode, the operation mode can be

Table 3-2. PROM Programming Operation Mode

Mode RESET AVDD CE OE VPP VDD D0-D7
Program write H L L H +12.5 V +6 V Data input
Program verify H L Data output
Program inhibit H H High impedance
Read L L +5 V +5 V Data output
Output disable L H High impedance
Standby H L/H High impedance

Caution When VPP is set to +12.5 V and VDD is set to +6V, setting both CE and OE to L is prohibited.

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