NEC PD78F0881-A, PD78F0881-A2, PD78F0882-A, PD78F0882-A2, PD78F0883-A User Manual

...

User’s Manual

78K0/FC2

8-Bit Single-Chip Microcontrollers

μPD78F0881(A) μPD78F0881(A2) μPD78F0882(A) μPD78F0882(A2) μPD78F0883(A) μPD78F0883(A2) μPD78F0884(A) μPD78F0884(A2) μPD78F0885(A) μPD78F0885(A2) μPD78F0886(A) μPD78F0886(A2)

The 78K0/FC2 has an on-chip debug function.

Do not use this product for mass production after the on-chip debug function has been used because its reliability cannot be guaranteed, due to issues with respect to the number of times the flash memory can be rewritten. NEC Electronics does not accept complaints concerning when use this product for mass production after the on-chip debug function has been used.

Document No. U17555EJ4V0UD00 (4th edition)

Date Published March 2007 NS CP(K)

2005

Printed in Japan

[MEMO]

2

User’s Manual U17555EJ4V0UD

NOTES FOR CMOS DEVICES

1VOLTAGE APPLICATION WAVEFORM AT INPUT PIN

Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL (MAX) and VIH (MIN) due to noise, etc., the device may malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between VIL (MAX) and VIH (MIN).

2HANDLING OF UNUSED INPUT PINS

Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must be judged separately for each device and according to related specifications governing the device.

3PRECAUTION AGAINST ESD

A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it when it has occurred. Environmental control must be adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work benches and floors should be grounded. The operator should be grounded using a wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with mounted semiconductor devices.

4STATUS BEFORE INITIALIZATION

Power-on does not necessarily define the initial status of a MOS device. Immediately after the power source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the reset signal is received. A reset operation must be executed immediately after power-on for devices with reset functions.

5POWER ON/OFF SEQUENCE

In the case of a device that uses different power supplies for the internal operation and external interface, as a rule, switch on the external power supply after switching on the internal power supply. When switching the power supply off, as a rule, switch off the external power supply and then the internal power supply. Use of the reverse power on/off sequences may result in the application of an overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements due to the passage of an abnormal current.

The correct power on/off sequence must be judged separately for each device and according to related specifications governing the device.

6INPUT OF SIGNAL DURING POWER OFF STATE

Do not input signals or an I/O pull-up power supply while the device is not powered. The current injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. Input of signals during the power off state must be judged separately for each device and according to related specifications governing the device.

User’s Manual U17555EJ4V0UD

3

EEPROM is trademark of NEC Electronics Corporation.

Windows, Windows NT and Windows XP are either registered trademarks or trademarks of Microsoft Corporation in the United States and/or other countries.

PC/AT is a trademark of International Business Machines Corporation. HP9000 series 700 and HP-UX are trademarks of Hewlett-Packard Company. SPARCstation is a trademark of SPARC International, Inc.

Solaris and SunOS are trademarks of Sun Microsystems, Inc.

SuperFlash is a registered trademark of Silicon Storage Technology, Inc. in several countries including the United States and Japan.

Caution: This product uses SuperFlash® technology licensed from Silicon Storage Technology, inc.

The information in this document is current as of March, 2007. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information.

No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may appear in this document.

NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others.

Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information.

While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC Electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features.

NEC Electronics products are classified into the following three quality grades: "Standard", "Special" and "Specific".

The "Specific" quality grade applies only to NEC Electronics products developed based on a customerdesignated "quality assurance program" for a specific application. The recommended applications of an NEC Electronics product depend on its quality grade, as indicated below. Customers must check the quality grade of each NEC Electronics product before using it in a particular application.

"Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots.

"Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support).

"Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc.

The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to determine NEC Electronics' willingness to support a given application.

(Note)

(1)"NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its majority-owned subsidiaries.

(2)"NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as defined above).

M8E 02. 11-1

4

User’s Manual U17555EJ4V0UD

[MEMO]

User’s Manual U17555EJ4V0UD

5

INTRODUCTION

Readers

This manual is intended for user engineers who wish to understand the functions of the

 

78K0/FC2 and design and develop application systems and programs for these devices.

 

The target products are as follows.

 

 

 

78K0/FC2: μPD78F0881 (A), 78F0882 (A), 78F0883 (A), 78F0884 (A), 78F0885 (A),

 

78F0886

(A), 78F0881 (A2), 78F0882 (A2), 78F0883 (A2), 78F0884 (A2),

 

78F0885

(A2), 78F0886 (A2)

 

 

Purpose

This manual is intended to give users an understanding of the functions described in the

 

Organization below.

 

 

 

 

 

Organization

The 78K0/FC2 manual is separated into two parts:

this manual and the instructions

 

edition (common to the 78K/0 Series).

 

 

 

 

 

 

 

 

 

78K0/FC2

 

 

78K/0 Series

 

 

User’s Manual

 

 

User’s Manual

 

 

(This Manual)

 

 

Instructions

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Pin functions

Internal block functions

Interrupts

Other on-chip peripheral functions

Electrical specifications

CPU functions

Instruction set

Explanation of each instruction

How to Read This Manual It is assumed that the readers of this manual have general knowledge of electrical engineering, logic circuits, and microcontrollers.

Conventions

6

When using this manual as the manual for (A) and (A2) grade products:

Only the quality grade differs between (A) grade products and (A2) grade products.

Read the part number as follows.

μPD78F0881→ μPD78F0881 (A), 78F0881 (A2)

μPD78F0882→ μPD78F0882 (A), 78F0882 (A2)

μPD78F0883→ μPD78F0883 (A), 78F0883 (A2)

μPD78F0884→ μPD78F0894 (A), 78F0894 (A2)

μPD78F0885→ μPD78F0885 (A), 78F0885 (A2)

μPD78F0886→ μPD78F0886 (A), 78F0886 (A2)

To gain a general understanding of functions:

Read this manual in the order of the CONTENTS. The mark <R> shows major revised points.

How to interpret the register format:

For a bit number enclosed in brackets, the bit name is defined as a reserved word in the assembler, and is already defined in the header file named sfrbit.h in the C compiler.

To check the details of a register when you know the register name:

Refer to APPENDIX C REGISTER INDEX.

Data significance:

Higher digits on the left and lower digits on the right

Active low representations:

××× (overscore over pin and signal name)

Note:

Footnote for item marked with Note in the text.

Caution:

Information requiring particular attention

Remark:

Supplementary information

Numerical representations:

Binary

...×××× or ××××B

 

Decimal

...××××

 

Hexadecimal

...××××H

User’s Manual U17555EJ4V0UD

<R>

<R>

Related Documents

The related documents indicated in this publication may include preliminary versions.

 

However, preliminary versions are not marked as such.

 

Documents Related to Devices

 

 

 

 

 

 

 

Document Name

 

Document No.

 

 

 

 

78K0/FC2 User’s Manual

 

 

This manual

 

 

 

78K/0 Series Instructions User’s Manual

 

U12326E

 

 

 

Documents Related to Development Tools (Software) (User’s Manuals)

 

 

 

 

 

 

Document Name

 

Document No.

 

 

 

RA78K0 Ver.3.80 Assembler Package

Operation

U17199E

 

 

 

 

 

 

Language

U17198E

 

 

 

 

 

 

Structured Assembly Language

U17197E

 

 

 

 

CC78K0 Ver.3.70 C Compiler

 

Operation

U17201E

 

 

 

 

 

 

Language

U17200E

 

 

 

ID78K0-QB Ver. 2.90 Integrated Debugger

Operation

U17437E

 

 

 

 

PM plus Ver. 5.20

 

 

U16934E

 

 

 

Documents Related to Development Tools (Hardware) (User’s Manuals)

 

 

 

 

 

 

Document Name

 

Document No.

 

 

 

 

QB-78K0FX2 In-Circuit Emulator

 

 

U17534E

 

 

 

QB-78K0MINI ON-CHIP DEBUG Emulator

 

U17029E

 

 

 

QB-MINI2 On-Chip Debug Emulator with Programming Function

 

U18371E

 

 

 

Documents Related to Flash Memory Programming

 

 

 

 

 

 

 

Document Name

 

Document No.

 

 

 

PG-FP4 Flash Memory Programmer User’s Manual

 

U15260E

 

 

 

PG-FPL3 Flash Memory Programmer User’s Manual

 

U17454E

 

 

 

 

Other Documents

 

 

 

 

 

 

 

 

Document Name

 

Document No.

 

 

SEMICONDUCTOR SELECTION GUIDE − Products and Packages −

X13769X

 

 

 

Semiconductor Device Mount Manual

 

Note

 

 

 

Quality Grades on NEC Semiconductor Devices

 

C11531E

 

 

 

NEC Semiconductor Device Reliability/Quality Control System

 

C10983E

 

 

Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge (ESD)

C11892E

 

 

 

 

Note See the “Semiconductor Device Mount Manual” website (http://www.necel.com/pkg/en/mount/index.html).

Caution The related documents listed above are subject to change without notice. Be sure to use the latest version of each document when designing.

User’s Manual U17555EJ4V0UD

7

 

 

 

 

CONTENTS

 

CHAPTER 1

OUTLINE ............................................................................................................................

17

1.1

Features.........................................................................................................................................

17

1.2

Applications..................................................................................................................................

18

1.3

Ordering Information ...................................................................................................................

18

1.4

Pin Configuration (Top View) ......................................................................................................

19

1.5

Fx2 Series Lineup.........................................................................................................................

22

 

1.5.1

78K0/Fx2 product lineup ...................................................................................................................

22

1.6

Block Diagram ..............................................................................................................................

24

1.7

Outline of Functions ....................................................................................................................

26

CHAPTER 2

PIN FUNCTIONS ...............................................................................................................

28

2.1

Pin Function List ..........................................................................................................................

28

2.2

Description of Pin Functions ......................................................................................................

32

 

2.2.1

P00, P01, P06 (port 0).......................................................................................................................

32

 

2.2.2

P10 to P17 (port 1) ............................................................................................................................

33

 

2.2.3

P30 to P33 (port 3) ............................................................................................................................

34

 

2.2.4

P40, P41 (port 4) ...............................................................................................................................

34

 

2.2.5

P60 to P63 (port 6) ............................................................................................................................

34

 

2.2.6

P70 to P73 (port 7) ............................................................................................................................

35

 

2.2.7

P80 to P87 (port 8) ............................................................................................................................

35

 

2.2.8

P90 (port 9) .......................................................................................................................................

36

 

2.2.9

P120 to P124 (port 12) ......................................................................................................................

36

 

2.2.10

 

P130, P131 (port 13) .......................................................................................................................

37

 

2.2.11 AVREF...............................................................................................................................................

37

 

2.2.12 AVSS ................................................................................................................................................

37

 

 

 

 

 

 

2.2.13 RESET ............................................................................................................................................

37

 

2.2.14 REGC..............................................................................................................................................

37

 

2.2.15 VDD and EVDD ..................................................................................................................................

37

 

2.2.16 VSS and EVSS...................................................................................................................................

37

 

2.2.17 FLMD0 ............................................................................................................................................

38

2.3

Pin I/O Circuits and Recommended Connection of Unused Pins ...........................................

39

CHAPTER 3

CPU ARCHITECTURE ......................................................................................................

43

3.1

Memory Space ..............................................................................................................................

43

 

3.1.1

Internal program memory space........................................................................................................

48

 

3.1.2

Internal data memory space..............................................................................................................

49

 

3.1.3

Special function register (SFR) area .................................................................................................

49

 

3.1.4 Data memory addressing ..................................................................................................................

50

3.2

Processor Registers ....................................................................................................................

54

 

3.2.1

Control registers ................................................................................................................................

54

 

3.2.2

General-purpose registers.................................................................................................................

58

 

3.2.3

Special Function Registers (SFRs) ...................................................................................................

59

3.3

Instruction Address Addressing.................................................................................................

65

 

3.3.1

Relative addressing...........................................................................................................................

65

 

3.3.2

Immediate addressing .......................................................................................................................

66

8

 

 

 

User’s Manual U17555EJ4V0UD

 

 

3.3.3

Table indirect addressing ...................................................................................................................

67

 

3.3.4

Register addressing ...........................................................................................................................

67

3.4

Operand Address Addressing ....................................................................................................

68

 

3.4.1

Implied addressing .............................................................................................................................

68

 

3.4.2

Register addressing ...........................................................................................................................

69

 

3.4.3

Direct addressing ...............................................................................................................................

70

 

3.4.4

Short direct addressing ......................................................................................................................

71

 

3.4.5

Special function register (SFR) addressing........................................................................................

72

 

3.4.6

Register indirect addressing...............................................................................................................

73

 

3.4.7

Based addressing ..............................................................................................................................

74

 

3.4.8

Based indexed addressing.................................................................................................................

75

 

3.4.9

Stack addressing................................................................................................................................

76

CHAPTER 4

PORT FUNCTIONS...........................................................................................................

77

4.1

Port Functions..............................................................................................................................

77

4.2

Port Configuration .......................................................................................................................

78

 

4.2.1

Port 0 .................................................................................................................................................

79

 

4.2.2

Port 1 .................................................................................................................................................

81

 

4.2.3

Port 3 .................................................................................................................................................

84

 

4.2.4

Port 4 .................................................................................................................................................

86

 

4.2.5

Port 6 .................................................................................................................................................

87

 

4.2.6

Port 7 .................................................................................................................................................

88

 

4.2.7

Port 8 .................................................................................................................................................

91

 

4.2.8

Port 9 .................................................................................................................................................

92

 

4.2.9

Port 12 ...............................................................................................................................................

94

 

4.2.10

Port 13 .............................................................................................................................................

97

4.3

Registers Controlling Port Function ..........................................................................................

99

4.4

Port Function Operations..........................................................................................................

106

 

4.4.1

Writing to I/O port.............................................................................................................................

106

 

4.4.2

Reading from I/O port.......................................................................................................................

106

 

4.4.3

Operations on I/O port......................................................................................................................

106

4.5

Cautions on 1-Bit Manipulation Instruction for Port Register n (Pn)....................................

107

CHAPTER 5

CLOCK GENERATOR ....................................................................................................

108

5.1

Functions of Clock Generator...................................................................................................

108

5.2

Configuration of Clock Generator ............................................................................................

109

5.3

Registers Controlling Clock Generator ...................................................................................

111

5.4

System Clock Oscillator............................................................................................................

120

 

5.4.1

X1 oscillator .....................................................................................................................................

120

 

5.4.2

XT1 oscillator ...................................................................................................................................

120

 

5.4.3 When subsystem clock is not used ..................................................................................................

123

 

5.4.4

Internal high-speed oscillator ...........................................................................................................

123

 

5.4.5

Internal low-speed oscillator.............................................................................................................

123

 

5.4.6

Prescaler..........................................................................................................................................

123

5.5

Clock Generator Operation .......................................................................................................

124

5.6

Controlling Clock .......................................................................................................................

128

 

5.6.1

Controlling high-speed system clock................................................................................................

128

 

5.6.2

Example of controlling internal high-speed oscillation clock.............................................................

131

 

 

User’s Manual U17555EJ4V0UD

9

 

5.6.3

Example of controlling subsystem clock...........................................................................................

133

 

5.6.4

Controlling internal low-speed oscillation clock ................................................................................

135

 

5.6.5

Clocks supplied to CPU and peripheral hardware ............................................................................

135

 

5.6.6

CPU clock status transition diagram.................................................................................................

136

 

5.6.7

Condition before changing CPU clock and processing after changing CPU clock ...........................

141

 

5.6.8

Time required for switchover of CPU clock and main system clock .................................................

142

 

5.6.9

Conditions before clock oscillation is stopped ..................................................................................

143

CHAPTER 6

16-BIT TIMER/EVENT COUNTERS 00 AND 01.........................................................

144

6.1

Functions of 16-Bit Timer/Event Counters 00 and 01.............................................................

145

6.2

Configuration of 16-Bit Timer/Event Counters 00 and 01 ......................................................

146

6.3

Registers Controlling 16-Bit Timer/Event Counters 00 and 01..............................................

154

6.4

Operation of 16-Bit Timer/Event Counters 00 and 01.............................................................

166

 

6.4.1

Interval timer operation.....................................................................................................................

166

 

6.4.2

PPG output operations .....................................................................................................................

169

 

6.4.3

Pulse width measurement operations ..............................................................................................

172

 

6.4.4

External event counter operation......................................................................................................

180

 

6.4.5

Square-wave output operation .........................................................................................................

183

 

6.4.6

One-shot pulse output operation ......................................................................................................

185

6.5

Special Use of TM0n ..................................................................................................................

190

 

6.5.1

Rewriting CR01n during TM0n operation .........................................................................................

190

 

6.5.2 Setting LVS0n and LVR0n ...............................................................................................................

190

6.6

Cautions for 16-Bit Timer/Event Counters 00 and 01 .............................................................

192

CHAPTER 7

8-BIT TIMER/EVENT COUNTERS 50 AND 51...........................................................

196

7.1

Functions of 8-Bit Timer/Event Counters 50 and 51...............................................................

196

7.2

Configuration of 8-Bit Timer/Event Counters 50 and 51 ........................................................

198

7.3

Registers Controlling 8-Bit Timer/Event Counters 50 and 51................................................

200

7.4

Operations of 8-Bit Timer/Event Counters 50 and 51.............................................................

205

 

7.4.1

Operation as interval timer ...............................................................................................................

205

 

7.4.2

Operation as external event counter ................................................................................................

207

 

7.4.3

Square-wave output operation .........................................................................................................

208

 

7.4.4 PWM output operation......................................................................................................................

209

7.5

Cautions for 8-Bit Timer/Event Counters 50 and 51 ...............................................................

213

CHAPTER 8

8-BIT TIMERS H0 AND H1 ..........................................................................................

214

8.1

Functions of 8-Bit Timers H0 and H1 .......................................................................................

214

8.2

Configuration of 8-Bit Timers H0 and H1.................................................................................

214

8.3

Registers Controlling 8-Bit Timers H0 and H1 ........................................................................

218

8.4

Operation of 8-Bit Timers H0 and H1........................................................................................

223

 

8.4.1

Operation as interval timer/square-wave output ...............................................................................

223

 

8.4.2 Operation as PWM output mode ......................................................................................................

226

 

8.4.3

Carrier generator mode operation (8-bit timer H1 only)....................................................................

232

CHAPTER 9

WATCH TIMER................................................................................................................

239

9.1

Functions of Watch Timer .........................................................................................................

239

9.2

Configuration of Watch Timer...................................................................................................

240

9.3

Register Controlling Watch Timer ............................................................................................

241

10

 

User’s Manual U17555EJ4V0UD

 

9.4 Watch Timer Operations............................................................................................................

243

 

9.4.1

Watch timer operation ......................................................................................................................

243

 

9.4.2

Interval timer operation ....................................................................................................................

244

9.5 Cautions for Watch Timer .........................................................................................................

245

CHAPTER 10

WATCHDOG TIMER .....................................................................................................

246

10.1

Functions of Watchdog Timer ................................................................................................

246

10.2

Configuration of Watchdog Timer..........................................................................................

247

10.3

Register Controlling Watchdog Timer ...................................................................................

248

10.4

Operation of Watchdog Timer.................................................................................................

249

 

10.4.1

Controlling operation of watchdog timer.........................................................................................

249

 

10.4.2

Setting overflow time of watchdog timer.........................................................................................

251

 

10.4.3

Setting window open period of watchdog timer..............................................................................

252

CHAPTER 11

CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER...............................................

254

11.1

Functions of Clock Output/Buzzer Output Controller..........................................................

254

11.2

Configuration of Clock Output/Buzzer Output Controller ...................................................

255

11.3

Register Controlling Clock Output/Buzzer Output Controller.............................................

255

11.4

Clock Output/Buzzer Output Controller Operations.............................................................

258

 

11.4.1

Clock output operation ...................................................................................................................

258

 

11.4.2

Operation as buzzer output............................................................................................................

258

CHAPTER 12

A/D CONVERTER .........................................................................................................

259

12.1

Function of A/D Converter ......................................................................................................

259

12.2

Configuration of A/D Converter..............................................................................................

260

12.3

Registers Used in A/D Converter ...........................................................................................

262

12.4

A/D Converter Operations.......................................................................................................

271

 

12.4.1

Basic operations of A/D converter..................................................................................................

271

 

12.4.2

Input voltage and conversion results..............................................................................................

273

 

12.4.3

A/D converter operation mode .......................................................................................................

274

12.5

How to Read A/D Converter Characteristics Table ..............................................................

276

12.6

Cautions for A/D Converter.....................................................................................................

278

CHAPTER 13

SERIAL INTERFACES UART60 AND UART61..........................................................

282

13.1

Functions of Serial Interfaces UART60 and UART61 ...........................................................

282

13.2

Configurations of Serial Interface UART60 and UART61.....................................................

287

13.3

Registers Controlling Serial Interfaces UART60 and UART61............................................

291

13.4

Operations of Serial Interface UART60 and UART61 ...........................................................

310

 

13.4.1 Operation stop mode......................................................................................................................

310

 

13.4.2

Asynchronous serial interface (UART) mode .................................................................................

311

 

13.4.3

Dedicated baud rate generator ......................................................................................................

326

CHAPTER 14

SERIAL INTERFACE CSI10........................................................................................

332

14.1

Functions of Serial Interface CSI10........................................................................................

332

14.2

Configuration of Serial Interface CSI10 .................................................................................

333

14.3

Registers Controlling Serial Interface CSI10.........................................................................

335

14.4

Operation of Serial Interface CSI10........................................................................................

338

 

14.4.1 Operation stop mode......................................................................................................................

338

 

 

User’s Manual U17555EJ4V0UD

11

14.4.2

3-wire serial I/O mode ....................................................................................................................

339

CHAPTER 15

CAN CONTROLLER .....................................................................................................

349

15.1 Outline Description ..................................................................................................................

349

15.1.1

Features .........................................................................................................................................

349

15.1.2

Overview of functions .....................................................................................................................

350

15.1.3

Configuration ..................................................................................................................................

351

15.2 CAN Protocol ............................................................................................................................

352

15.2.1 Frame format..................................................................................................................................

352

15.2.2 Frame types ...................................................................................................................................

353

15.2.3 Data frame and remote frame ........................................................................................................

353

15.2.4

Error frame .....................................................................................................................................

361

15.2.5

Overload frame...............................................................................................................................

362

15.3 Functions ..................................................................................................................................

363

15.3.1

Determining bus priority .................................................................................................................

363

15.3.2

Bit stuffing ......................................................................................................................................

363

15.3.3

Multi masters..................................................................................................................................

363

15.3.4

Multi cast ........................................................................................................................................

363

15.3.5 CAN sleep mode/CAN stop mode function ....................................................................................

363

15.3.6

Error control function ......................................................................................................................

364

15.3.7

Baud rate control function ..............................................................................................................

370

15.4 Connection With Target System.............................................................................................

374

15.5 Internal Registers of CAN Controller......................................................................................

375

15.5.1

CAN controller configuration...........................................................................................................

375

15.5.2

Register access type ......................................................................................................................

376

15.5.3

Register bit configuration................................................................................................................

385

15.6 Bit Set/Clear Function..............................................................................................................

389

15.7 Control Registers .....................................................................................................................

391

15.8 CAN Controller Initialization....................................................................................................

426

15.8.1

Initialization of CAN module ...........................................................................................................

426

15.8.2

Initialization of message buffer .......................................................................................................

426

15.8.3

Redefinition of message buffer.......................................................................................................

426

15.8.4

Transition from initialization mode to operation mode ....................................................................

427

15.8.5 Resetting error counter C0ERC of CAN module ............................................................................

428

15.9 Message Reception..................................................................................................................

429

15.9.1

Message reception .........................................................................................................................

429

15.9.2 Receive Data Read ........................................................................................................................

430

15.9.3

Receive history list function............................................................................................................

431

15.9.4

Mask function .................................................................................................................................

433

15.9.5

Multi buffer receive block function ..................................................................................................

435

15.9.6

Remote frame reception.................................................................................................................

436

15.10 Message Transmission..........................................................................................................

437

15.10.1

Message transmission..................................................................................................................

437

15.10.2

Transmit history list function.........................................................................................................

439

15.10.3

Automatic block transmission (ABT).............................................................................................

441

15.10.4

Transmission abort process .........................................................................................................

442

15.10.5

Remote frame transmission..........................................................................................................

443

15.11 Power Save Modes.................................................................................................................

444

12

User’s Manual U17555EJ4V0UD

 

 

15.11.1 CAN sleep mode ..........................................................................................................................

444

 

15.11.2 CAN stop mode............................................................................................................................

446

 

15.11.3 Example of using power saving modes........................................................................................

447

15.12

Interrupt Function ..................................................................................................................

448

15.13 Diagnosis Functions and Special Operational Modes .......................................................

449

 

15.13.1 Receive-only mode ......................................................................................................................

449

 

15.13.2

Single-shot mode .........................................................................................................................

450

 

15.13.3

Self-test mode..............................................................................................................................

451

 

15.13.4

Receive/Transmit Operation in Each Operation Mode .................................................................

452

15.14 Time Stamp Function.............................................................................................................

453

 

15.14.1

Time stamp function.....................................................................................................................

453

15.15 Baud Rate Settings ................................................................................................................

455

 

15.15.1

Baud rate settings ........................................................................................................................

455

 

15.15.2

Representative examples of baud rate settings ...........................................................................

459

15.16 Operation of CAN Controller.................................................................................................

463

CHAPTER 16

INTERRUPT FUNCTIONS ............................................................................................

489

16.1

Interrupt Function Types.........................................................................................................

489

16.2

Interrupt Sources and Configuration .....................................................................................

489

16.3

Registers Controlling Interrupt Functions ............................................................................

493

16.4

Interrupt Servicing Operations ...............................................................................................

501

 

16.4.1

Maskable interrupt acknowledgement............................................................................................

501

 

16.4.2

Software interrupt request acknowledgement ................................................................................

503

 

16.4.3

Multiple interrupt servicing .............................................................................................................

504

 

16.4.4

Interrupt request hold .....................................................................................................................

507

CHAPTER 17

STANDBY FUNCTION..................................................................................................

508

17.1

Standby Function and Configuration.....................................................................................

508

 

17.1.1

Standby function ............................................................................................................................

508

 

17.1.2

Registers controlling standby function............................................................................................

508

17.2

Standby Function Operation...................................................................................................

511

 

17.2.1 HALT mode....................................................................................................................................

511

 

17.2.2 STOP mode ...................................................................................................................................

516

CHAPTER 18

RESET FUNCTION .......................................................................................................

523

18.1

Register for Confirming Reset Source...................................................................................

531

CHAPTER 19

MULTIPLIER/DIVIDER...................................................................................................

532

19.1

Functions of Multiplier/Divider ...............................................................................................

532

19.2

Configuration of Multiplier/Divider.........................................................................................

532

19.3

Register Controlling Multiplier/Divider ..................................................................................

536

19.4

Operations of Multiplier/Divider..............................................................................................

537

 

19.4.1

Multiplication operation ..................................................................................................................

537

 

19.4.2

Division operation...........................................................................................................................

539

CHAPTER 20

POWER-ON-CLEAR CIRCUIT .....................................................................................

541

20.1

Functions of Power-on-Clear Circuit .....................................................................................

541

20.2

Configuration of Power-on-Clear Circuit...............................................................................

542

 

 

User’s Manual U17555EJ4V0UD

13

20.3

Operation of Power-on-Clear Circuit......................................................................................

542

20.4

Cautions for Power-on-Clear Circuit ......................................................................................

545

CHAPTER 21

LOW-VOLTAGE DETECTOR .......................................................................................

547

21.1

Functions of Low-Voltage Detector........................................................................................

547

21.2

Configuration of Low-Voltage Detector .................................................................................

548

21.3

Registers Controlling Low-Voltage Detector.........................................................................

548

21.4

Operation of Low-Voltage Detector........................................................................................

551

 

21.4.1 When used as reset .......................................................................................................................

552

 

21.4.2

When used as interrupt ..................................................................................................................

557

21.5

Cautions for Low-Voltage Detector ........................................................................................

562

CHAPTER 22

OPTION BYTE...............................................................................................................

565

22.1

Functions of Option Bytes ......................................................................................................

565

22.2

Format of Option Byte .............................................................................................................

567

CHAPTER 23

FLASH MEMORY..........................................................................................................

570

23.1

Internal Memory Size Switching Register..............................................................................

570

23.2

Internal Expansion RAM Size Switching Register ................................................................

571

23.3

Writing with Flash Memory Programmer ...............................................................................

572

23.4

Programming Environment .....................................................................................................

578

23.5

Communication Mode..............................................................................................................

578

23.6

Connection of Pins on Board..................................................................................................

580

 

23.6.1 FLMD0 pin......................................................................................................................................

580

 

23.6.2

Serial interface pins........................................................................................................................

580

 

 

 

 

 

 

23.6.3 RESET pin......................................................................................................................................

582

 

23.6.4

Port pins .........................................................................................................................................

582

 

23.6.5 REGC pin .......................................................................................................................................

582

 

23.6.6

Other signal pins ............................................................................................................................

582

 

23.6.7

Power supply..................................................................................................................................

583

23.7

Programming Method ..............................................................................................................

584

 

23.7.1

Controlling flash memory................................................................................................................

584

 

23.7.2 Flash memory programming mode.................................................................................................

584

 

23.7.3 Selecting communication mode......................................................................................................

585

 

23.7.4 Communication commands............................................................................................................

586

23.8

Security Settings ......................................................................................................................

587

23.9

Processing Time for Each Command When PG-FP4 Is Used (Reference).........................

589

23.10 Flash Memory Programming by Self-Programming ...........................................................

590

 

23.10.1

Registers used for self-programming function ..............................................................................

596

23.11 Boot Swap Function...............................................................................................................

600

CHAPTER 24

ON-CHIP DEBUG FUNCTION .....................................................................................

602

24.1

Outline of Functions ................................................................................................................

602

24.2

Connection with MINICUBE.....................................................................................................

603

24.3

Connection Circuit Examples .................................................................................................

604

24.4

On-Chip Debug Security ID .....................................................................................................

606

24.5

Restrictions and Cautions on On-Chip Debug Function .....................................................

606

14

 

 

User’s Manual U17555EJ4V0UD

 

CHAPTER 25

INSTRUCTION SET ......................................................................................................

607

25.1

Conventions Used in Operation List......................................................................................

607

 

25.1.1

Operand identifiers and specification methods ..............................................................................

607

 

25.1.2

Description of operation column.....................................................................................................

608

 

25.1.3

Description of flag operation column ..............................................................................................

608

25.2

Operation List...........................................................................................................................

609

25.3

Instructions Listed by Addressing Type ...............................................................................

617

CHAPTER 26

ELECTRICAL SPECIFICATIONS ((A) GRADE PRODUCTS)..................................

620

26.1

Absolute Maximum Ratings....................................................................................................

620

26.2

Oscillator Characteristics........................................................................................................

622

26.3

DC Characteristics ...................................................................................................................

624

27.4

AC Characteristics ...................................................................................................................

631

27.5

Data Retention Characteristics...............................................................................................

641

27.6

Flash EEPROM Programming Characteristics......................................................................

642

CHAPTER 27

ELECTRICAL SPECIFICATIONS ((A2) GRADE PRODUCTS)................................

643

27.1

Absolute Maximum Ratings....................................................................................................

643

27.2

Oscillator Characteristics........................................................................................................

645

27.3

DC Characteristics ...................................................................................................................

647

27.4

AC Characteristics ...................................................................................................................

653

27.5

Data Retention Characteristics...............................................................................................

663

27.6

Flash EEPROM Programming Characteristics......................................................................

664

CHAPTER 28

PACKAGE DRAWINGS................................................................................................

665

CHAPTER 29

RECOMMENDED SOLDERING CONDITIONS...........................................................

667

CHAPTER 30

CAUTIONS FOR WAIT ................................................................................................

668

30.1

Cautions for Wait .....................................................................................................................

668

30.2

Peripheral Hardware That Generates Wait ............................................................................

669

30.3

Example of Wait Occurrence ..................................................................................................

671

APPENDIX A

DEVELOPMENT TOOLS ..............................................................................................

672

A.1 Software Package......................................................................................................................

676

A.2 Language Processing Software...............................................................................................

676

A.3 Control Software........................................................................................................................

677

A.4 Flash Memory Programming Tools .........................................................................................

678

 

A.4.1 When using flash memory programmer FG-FP4, FL-PR4, PG-FPL3, and FP-LITE3......................

678

 

A.4.2 When using on-chip debug emulator with programming function QB-MINI2 ...................................

678

A.5 Debugging Tools (Hardware) ...................................................................................................

679

 

A.5.1

When using in-circuit emulator QB-78K0FX2 ..................................................................................

679

 

A.5.2 When using on-chip debug emulator QB-78K0MINI ........................................................................

679

 

A.5.3 When using on-chip debug emulator with programming function QB-MINI2 ...................................

680

A.6 Debugging Tools (Software).....................................................................................................

680

User’s Manual U17555EJ4V0UD

15

APPENDIX B

NOTES ON TARGET SYSTEM DESIGN ...................................................................

681

APPENDIX C

REGISTER INDEX .........................................................................................................

683

C.1

Register Index (In Alphabetical Order with Respect to Register Names)............................

683

C.2

Register Index (In Alphabetical Order with Respect to Register Symbol)...........................

688

APPENDIX D

REVISION HISTORY .....................................................................................................

692

D.1

Main Revisions in this Edition..................................................................................................

692

D.2

Revision History of Preceding Editions ..................................................................................

693

16

User’s Manual U17555EJ4V0UD

CHAPTER 1 OUTLINE

1.1Features

{Minimum instruction execution time can be changed from high speed (0.1 μs: @ 20 MHz operation with highspeed system clock) to ultra low-speed (122 μs: @ 32.768 kHz operation with subsystem clock)

{General-purpose register: 8 bits × 32 registers (8 bits × 8 registers × 4 banks)

{ROM, RAM capacities

Item

Program Memory

Data Memory

 

 

(ROM)

 

 

 

 

Part Number

Internal High-Speed RAM

Note

Internal Expansion RAM

Note

 

 

 

 

 

 

 

 

 

 

 

μPD78F0881, 78F0884

Flash memoryNote

32 KB

1024 bytes

 

1024 bytes

 

 

 

 

 

 

 

 

μPD78F0882, 78F0885

 

48 KB

 

 

2048 bytes

 

 

 

 

 

 

 

 

μPD78F0883, 78F0886

 

60 KB

 

 

 

 

 

 

 

 

 

 

 

Note The internal flash memory, internal high-speed RAM capacities, and internal expansion RAM capacities can be changed using the internal memory size switching register (IMS) and the internal expansion RAM size switching register (IXS).

{On-chip single-power-supply flash memory

{Self-programming (with boot swap function)

{On-chip debug function

{On-chip power-on-clear (POC) circuit and low-voltage detector (LVI)

{Short startup is possible via the CPU default start using the on-chip internal high-speed oscillator

{On-chip watchdog timer (operable with on-chip internal low-speed oscillator clock)

{On-chip multiplier/divider

{On-chip clock output/buzzer output controller

{I/O ports: μPD78F0881, 78F0882, 78F0883: 37 (N-ch open drain: 3)

μPD78F0884, 78F0885, 78F0886: 41 (N-ch open drain: 4)

{Timer: 8 channels Note 1

{Serial interface: 3 channels

(UART (LIN (Local Interconnect Network)-bus supported): 1 channel, CSI/UART Note 2: 1 channel, CAN: 1 channel)

{10-bit resolution A/D converter: μPD78F0881, 78F0882, 78F0883: 8 channels

μPD78F0884, 78F0885, 78F0886: 9 channels

{ Supply voltage: VDD = 4.0 to 5.5 V when 20 MHz, VDD = 2.7 to 5.5 V when 10 MHz, VDD = 1.8 to 5.5 V when 5 MHz (with internal high-speed oscillator clock or subsystem clock: VDD = 1.8 to 5.5 V)

{ Operating ambient temperature: TA = −40 to +85°C, −40 to +125°C

Notes 1. Since TM01 does not have the following terminal at 78K0/FC2, the function is restricted in part.

μPD78F0881, 78F0882, and 78F0883: TI001, TI011, TO01

μPD78F0884, 78F0885, and 78F0886: TI001

2. Select either of the functions of these alternate-function pins.

User’s Manual U17555EJ4V0UD

17

CHAPTER 1 OUTLINE

1.2Applications

{Automotive electrical appliances (Body control, Door control, Front light control)

{Industrial equipment (Industrial robot, Building control)

1.3Ordering Information

Flash memory version

 

 

Part Number

Package

Quality Grade

 

 

 

μPD78F0881GB(A)-GAF-AX

44-pin plastic LQFP (10x10)

Special

μPD78F0881GB(A2)-GAF-AX

44-pin plastic LQFP (10x10)

Special

μPD78F0882GB(A)-GAF-AX

44-pin plastic LQFP (10x10)

Special

μPD78F0882GB(A2)-GAF-AX

44-pin plastic LQFP (10x10)

Special

μPD78F0883GB(A)-GAF-AX

44-pin plastic LQFP (10x10)

Special

μPD78F0883GB(A2)-GAF-AX

44-pin plastic LQFP (10x10)

Special

μPD78F0884GA(A)-GAM-AX

48-pin plastic LQFP (Fine pitch) (7x7)

Special

μPD78F0884GA(A2)-GAM-AX

48-pin plastic LQFP (Fine pitch) (7x7)

Special

μPD78F0885GA(A)-GAM-AX

48-pin plastic LQFP (Fine pitch) (7x7)

Special

μPD78F0885GA(A2)-GAM-AX

48-pin plastic LQFP (Fine pitch) (7x7)

Special

μPD78F0886GA(A)-GAM-AX

48-pin plastic LQFP (Fine pitch) (7x7)

Special

μPD78F0886GA(A2)-GAM-AX

48-pin plastic LQFP (Fine pitch) (7x7)

Special

Remark All these products are lead free products.

18

User’s Manual U17555EJ4V0UD

CHAPTER 1 OUTLINE

1.4Pin Configuration (Top View)

44-pin plastic LQFP (10x10)

 

 

P120/INTP0/EXLVI

P00/TI000

P01/TI010/TO00 P80/ANI0 P81/ANI1 P82/ANI2 P83/ANI3 P84/ANI4 P85/ANI5 P86/ANI6

P87/ANI7

 

P41

1

44 43 42 41 40 39 38 37 36 35 3433

AVSS

P40

2

 

 

 

32

AVREF

RESET

3

 

 

 

31

P10/SCK10/TxD61

P124/XT2/EXCLKS

4

 

 

 

30

P11/SI10/RxD61

P123/XT1

5

 

 

 

29

P12/SO10

FLMD0

6

 

 

 

28

P13/TxD60

P122/X2/EXCLK

7

 

 

 

27

P14/RxD60

P121/X1

8

 

 

 

26

P15/TOH0

REGC

9

 

 

 

25

P16/TOH1/INTP5

VSS/EVSS

10

 

 

24

P17/TI50/TO50

VDD/EVDD

11

 

 

23

P30/INTP1

 

 

12 13 14 15 16 17 18 19 20 21 22

 

 

 

P60

P61

P62 P33/TI51/TO51/INTP4 P130 P73/BUZ/INTP7 P72/PCL/INTP6 P71/CRxD P70/CTxD P32/INTP3

P31/INTP2

 

Cautions 1. Make AVSS the same potential as VSS/EVSS.

2.Connect the REGC pin to VSS via a capacitor (0.47 to 1 μF: recommended).

3.ANI0/P80 to ANI7/P87 are set in the analog input mode after release of reset.

User’s Manual U17555EJ4V0UD

19

CHAPTER 1 OUTLINE

• 48-pin plastic LQFP (Fine pitch) (7x7)

 

 

P131

P00/TI000 P01/TI010/TO00

P80/ANI0 P81/ANI1 P82/ANI2 P83/ANI3 P84/ANI4 P85/ANI5

P86/ANI6 P87/ANI7

P90/ANI8

 

P120/INTP0/EXLVI

1

48 47 46 45 44 43 42 41 40 39 38 3736

AVSS

P41

2

 

 

 

 

35

AVREF

P40

3

 

 

 

 

34

P10/SCK10/TxD61

RESET

4

 

 

 

 

33

P11/SI10/RxD61

P124/XT2/EXCLKS

5

 

 

 

 

32

P12/SO10

P123/XT1

6

 

 

 

 

31

P13/TxD60

FLMD0

7

 

 

 

 

30

P14/RxD60

P122/X2/EXCLK

8

 

 

 

 

29

P15/TOH0

P121/X1

9

 

 

 

 

28

P16/TOH1/INTP5

REGC

10

 

 

 

27

P17/TI50/TO50

VSS/EVSS

11

 

 

 

26

P30/INTP1

VDD/EVDD

12

 

 

 

25

P31/INTP2

 

 

13 14 15 16 17 18 19 20 21 22 23 24

 

 

 

P60

P61 P62

P63 P33/TI51/TO51/INTP4 P130 P73/BUZ/INTP7 P72/PCL/INTP6 P71/CRxD

P70/CTxD P06/TI011/TO01

P32/INTP3

 

Cautions 1. Make AVSS the same potential as VSS/EVSS.

2.Connect the REGC pin to VSS via a capacitor (0.47 to 1 μF: recommended).

3.ANI0/P80 to ANI7/P87 are set in the analog input mode after release of reset.

20

User’s Manual U17555EJ4V0UD

CHAPTER 1 OUTLINE

Pin Identification

 

 

 

 

 

ANI0 to ANI8:

Analog input

 

P70 to P73:

Port 7

AVREF:

Analog reference voltage

 

P80 to P87:

Port 8

AVSS:

Analog ground

 

P90:

Port 9

BUZ:

Buzzer output

 

P120 to P124:

Port 12

CRxD:

Receive data for CAN

 

P130, P131:

Port 13

CTxD:

Transmit data for CAN

 

PCL:

Programmable clock output

EVDD:

Power supply for port

 

REGC:

Regulator Capacitance

 

 

 

 

 

 

 

EVSS:

Ground for port

 

RESET:

Reset

EXCLK:

External clock input

 

RxD60, RxD61:

Receive data

 

 

 

 

 

 

 

(Main system clock)

 

SCK10:

Serial clock input/output

EXCLKS:

External clock input

 

SI10:

Serial data input

 

(Subsystem clock)

 

SO10:

Serial data output

EXLVI:

External potential input

 

TI000, TI010,

 

 

for low-voltage detector

 

TI011, TI50, TI51:

Timer input

FLMD0:

Flash programming mode

 

TO00, TO01,

 

INTP0 to INTP7: External interrupt input

 

TO50, TO51,

 

P00, P01,

 

 

TOH0, TOH1:

Timer output

P06:

Port 0

 

TxD60, TxD61:

Transmit data

P10 to P17:

Port 1

 

VDD:

Power supply

P30 to P33:

Port 3

 

VSS:

Ground

P40, P41:

Port 4

 

X1, X2:

Crystal oscillator (high-speed system clock)

P60 to P63:

Port 6

 

XT1, XT2:

Crystal oscillator (subsystem clock)

User’s Manual U17555EJ4V0UD

21

CHAPTER 1 OUTLINE

1.5 Fx2 Series Lineup

1.5.1 78K0/Fx2 product lineup

44-pin LQFP (10 × 10 mm 0.8 mm pitch) 78K0/FC2

 

μPD78F0881

 

μPD78F0882

 

μPD78F0883

 

 

 

 

 

 

Single-power-supply flash

Single-power-supply flash

Single-power-supply flash

 

memory: 32 KB,

memory: 48 KB,

memory: 60KB,

RAM: 2 KB

RAM: 3 KB

RAM: 3 KB

48-pin LQFP (7 × 7 mm 0.5 mm pitch) 78K0/FC2

 

μPD78F0884

 

μPD78F0885

 

μPD78F0886

 

 

 

 

 

 

Single-power-supply flash

Single-power-supply flash

Single-power-supply flash

 

memory: 32 KB,

memory: 48 KB,

memory: 60KB,

RAM: 2 KB

RAM: 3 KB

RAM: 3 KB

64-pin LQFP (10 × 10 mm 0.5 mm pitch, 12 × 12 mm 0.65 mm pitch) 78K0/FE2

 

 

 

μPD78F0887

 

μPD78F0888

 

μPD78F0889

 

μPD78F0890

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Single-power-supply

flash

Single-power-supply flash

Single-power-supply flash

Single-power-supply

flash

 

 

 

memory: 48 KB,

memory: 60 KB,

memory: 96 KB,

memory: 128 KB,

 

 

 

RAM: 3 KB

RAM: 3 KB

RAM: 5 KB

RAM: 7 KB

80-pin LQFP (12 × 12 mm 0.5 mm pitch, 14 × 14 mm 0.65 mm pitch)

 

 

 

 

 

78K0/FF2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

μPD78F0891

 

μPD78F0892

 

μPD78F0893

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Single-power-supply flash

Single-power-supply flash

Single-power-supply

flash

 

 

 

 

 

memory: 60 KB,

memory: 96 KB,

memory: 128 KB,

 

 

 

 

 

RAM: 3 KB

RAM: 5 KB

RAM: 7 KB

Remark All product with on-chip debug function.

22

User’s Manual U17555EJ4V0UD

CHAPTER 1 OUTLINE

The list of functions in the 78K0/Fx2 is shown below.

 

 

 

 

Part Number

78K0/FC2

 

78K0/FE2

 

78K0/FF2

 

Item

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Number of pins

44 pins

 

48 pins

 

64 pins

 

80 pins

 

 

 

 

 

 

 

 

 

 

 

 

Internal

 

Flash memory

32 K/48 K/60 K

 

48 K/60 K/96 K/128 K

 

60 K/96 K/128 K

 

memory

 

 

 

 

 

 

 

 

 

 

 

 

RAM

2 K/3 K/3 K

 

3 K/3 K/5 K/7 K

 

3 K/5 K/7 K

 

(bytes)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Power supply voltage

 

VDD = 4.0 to 5.5 V when 20 MHz, VDD = 2.7 to 5.5 V when 10 MHz,

 

 

 

 

 

 

 

 

 

VDD = 1.8 to 5.5 V when 5 MHz

 

 

Minimum instruction execution time

 

 

0.1 μs (when 20 MHz, VDD = 4.0 to 5.5 V)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Clock

 

Crystal/ceramic

 

 

 

 

4 to 20 MHz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Subclock

 

 

 

 

32.768 kHz

 

 

 

 

Internal low-speed

 

 

 

 

240 kHz (TYP.)

 

 

 

 

oscillator

 

 

 

 

 

 

 

 

 

 

Internal high-speed

 

 

 

8 MHz (TYP., VDD = 2.7 to 5.5 V)

 

 

 

 

oscillator

 

 

 

 

 

 

 

 

Ports

 

CMOS I/O

33

 

36

 

50

 

66

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CMOS output

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

N-ch open-drain I/O

3

 

 

4

 

 

 

Timer

 

16 bits (TM0)

 

2 ch Note

 

4 ch

 

 

 

 

8 bits (TM5)

 

 

 

 

2 ch

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8 bits (TMH)

 

 

 

 

2 ch

 

 

 

 

For watch

 

 

 

 

1 ch

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WDT

 

 

 

 

1 ch

 

 

 

 

 

 

 

 

 

 

 

 

 

Serial

 

CAN

 

 

 

 

1 ch

 

 

interface

 

3-wire CSI

 

 

1 ch

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LIN-UART

 

 

 

 

1 ch

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LIN-UART/CSI

 

 

 

 

1 ch

 

 

10-bit A/D converter

8 ch

 

9 ch

 

12 ch

 

16 ch

 

 

 

 

 

 

 

 

 

 

 

 

 

Interrupts

 

External

 

 

 

8

 

 

<R>

 

 

 

 

 

 

 

 

 

 

Internal

 

24

 

29

 

 

 

 

 

 

 

 

 

 

 

 

 

Reset

 

RESET pin

 

 

 

 

Provided

 

 

 

 

 

 

 

 

1.59 V ±0.15 V (detection voltage is fixed)

 

 

 

 

POC

 

 

 

 

 

 

 

 

 

 

 

 

LVI

4.24/4.09/3.93/3.78/3.62/3.47/3.32/3.16/3.01/2.85/2.70/2.55/2.39/2.24/2.08/1.93 V

 

 

 

 

 

 

 

 

 

(selectable by software)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WDT

 

 

 

 

Provided

 

 

Multiplier/divider

 

 

 

 

Provided

 

 

 

 

 

 

 

 

 

 

 

 

Clock output/buzzer output

 

 

 

 

Provided

 

 

 

 

 

 

 

 

 

 

 

 

Self-programming function

 

 

 

 

Provided

 

 

On-chip debug function

 

 

 

 

Provided

 

 

 

 

 

 

 

 

 

 

 

 

Standby function

 

 

 

 

HALT/STOP mode

 

 

 

 

 

 

 

 

TA = −40 to +85°C, −40 to +125°C

 

 

Operating ambient temperature

 

 

 

 

Note Since TM01 does not have the following terminal at 78K0/FC2, the function is restricted in part.

μPD78F0881, 78F0882, and 78F0883: TI001, TI011, TO01

μPD78F0884, 78F0885, and 78F0886: TI001

User’s Manual U17555EJ4V0UD

23

CHAPTER 1 OUTLINE

1.6Block Diagram

μ PD78F0881, 78F0882, 78F0883

TO00/TI010/P01 16-bit timer/ TI000/P00 (LINSEL) event counter 00

RxD60/P14 (LINSEL)

 

 

 

16-bit timer/

 

 

 

event counter 01

TOH0/P15

 

 

 

 

 

 

 

 

8-bit timer H0

 

 

 

 

 

 

 

 

 

TOH1/P16

 

8-bit timer H1

 

 

 

 

 

TI50/TO50/P17

8-bit timer/ event counter 50

TI51/TO51/P33

8-bit timer/ event counter 51

 

 

 

 

 

Low-speed

 

 

 

 

 

internal oscillator

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Watchdog timer

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Watch timer

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RxD60/P14

 

 

 

Serial

 

 

 

interface UART60

 

 

 

TxD60/P13

 

 

 

 

 

 

LINSEL

 

 

 

RxD61/P11

 

 

 

 

 

 

 

 

 

 

 

 

 

Serial

 

 

 

TxD61/P10

 

 

 

interface UART61

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SCK10/P10

SI10/P11

Serial

interface CSI10

SO10/P12

ANI0/P80-ANI7/P87

8

A/D converter

AVREF

 

 

 

AVSS

 

 

INTP0/P120 (LINSEL)

 

 

RxD60/P14 (LINSEL)

 

 

INTP1/P30-

4

Interrupt control

INTP4/P33

 

 

INTP5/P16

 

 

INTP6/P72

2

 

INTP7/P73

 

 

 

CRxD/P71

 

CAN

CTxD/P70

 

 

 

Port 0

2

P00, P01

 

 

 

 

 

 

Port 1

8

P10-P17

 

4

 

 

 

Port 3

P30-P33

 

 

 

 

 

 

Port 4

2

P40, P41

 

 

 

 

 

 

Port 6

3

P60-P62

 

 

 

 

 

 

Port 7

4

P70-P73

 

 

 

 

 

 

Port 8

8

P80-P87

 

78K/0

Flash

 

 

 

 

CPU

 

 

 

 

 

 

memory

Port 12

5

P120-P124

 

core

 

 

 

 

 

 

 

 

Bank

 

 

 

 

 

 

 

 

 

Port 13

 

P130

 

 

 

 

Buzzer output

 

BUZ/P73

 

Internal

Internal

Clock output control

 

PCL/P72

 

 

 

 

 

high-speed

expansion

 

 

 

 

RAM

 

RAM

Multiplier/Divider

 

 

 

 

 

 

 

 

 

 

 

 

Power on clear/

 

POC/LVI

 

 

 

 

low voltage

 

EXLVI/P120

 

 

 

 

control

 

 

 

indicator

 

 

 

 

 

 

 

 

 

 

 

Reset control

 

 

 

 

 

 

System control

 

RESET

 

 

 

 

 

X1/P121

 

 

 

 

High-speed

 

X2/EXCLK/P122

 

 

 

 

 

XT1/P123

 

 

 

 

internal oscillator

 

 

 

 

 

 

XT2/EXCLKS/P124

 

 

 

 

 

 

 

VDD,

VSS,

FLMD0

On-chip

 

 

 

debugger

 

 

 

EVDD

EVSS

 

 

 

 

 

 

 

 

 

24

User’s Manual U17555EJ4V0UD

NEC PD78F0881-A, PD78F0881-A2, PD78F0882-A, PD78F0882-A2, PD78F0883-A User Manual

CHAPTER 1 OUTLINE

μ PD78F0884, 78F0885, 78F0886

TO00/TI010/P01 16-bit timer/ TI000/P00 (LINSEL) event counter 00

RxD60/P14 (LINSEL)

TO01/TI011/P06

16-bit timer/ event counter 01

TOH0/P15

 

 

8-bit timer H0

 

 

 

 

 

 

 

 

 

TOH1/P16

 

8-bit timer H1

 

 

 

 

 

TI50/TO50/P17

8-bit timer/ event counter 50

TI51/TO51/P33

8-bit timer/ event counter 51

 

 

 

 

 

Low-speed

 

 

 

 

 

internal oscillator

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Watchdog timer

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Watch timer

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RxD60/P14

 

 

 

Serial

 

 

 

interface UART60

 

 

 

TxD60/P13

 

 

 

 

 

 

LINSEL

 

 

 

RxD61/P11

 

 

 

 

 

 

 

 

 

 

 

 

 

Serial

 

 

 

TxD61/P10

 

 

 

interface UART61

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SCK10/P10

SI10/P11

Serial

interface CSI10

SO10/P12

ANI0/P80-ANI7/P87,

9

ANI8/P90

A/D converter

AVREF

 

AVSS

 

INTP0/P120 (LINSEL)

RxD60/P14 (LINSEL)

INTP1/P30-

4

 

Interrupt control

INTP4/P33

 

 

 

 

INTP5/P16

 

 

 

 

 

 

INTP6/P72

2

 

 

INTP7/P73

 

 

 

 

 

 

 

 

CRxD/P71

CAN

CTxD/P70

Port 0

3

P00, P01, P06

 

 

 

 

 

 

Port 1

8

P10-P17

 

 

 

 

 

 

Port 3

4

P30-P33

 

 

 

 

Port 4

2

P40, P41

 

 

 

 

Port 6

4

P60-P63

 

 

 

 

Port 7

4

P70-P73

 

 

 

 

Port 8

8

P80-P87

 

78K/0

Flash

 

 

 

 

CPU

 

 

 

 

 

 

memory

Port 9

 

 

 

core

 

 

P90

 

Bank

 

 

 

 

 

 

 

 

 

Port 12

5

P120-P124

 

 

 

 

Port 13

 

P130

 

 

 

 

 

P131

 

 

 

 

 

 

 

Internal

Internal

Buzzer output

 

BUZ/P73

 

 

 

 

 

high-speed

expansion

 

 

 

 

RAM

 

RAM

Clock output control

 

PCL/P72

 

 

 

 

 

 

 

 

 

Multiplier/Divider

 

 

 

 

 

 

Power on clear/

 

POC/LVI

 

 

 

 

low voltage

 

EXLVI/P120

 

 

 

 

control

 

 

 

indicator

 

 

 

 

 

 

 

 

 

 

 

Reset control

 

 

 

 

 

 

System control

 

RESET

 

 

 

 

 

X1/P121

 

 

 

 

High-speed

 

X2/EXCLK/P122

 

 

 

 

 

XT1/P123

 

VDD,

VSS,

FLMD0

internal oscillator

 

 

 

XT2/EXCLKS/P124

 

 

 

 

EVDD

EVSS

 

 

 

 

 

 

 

 

 

 

 

 

On-chip

 

 

 

 

 

 

debugger

 

 

 

User’s Manual U17555EJ4V0UD

25

CHAPTER 1 OUTLINE

1.7 Outline of Functions

 

 

 

 

 

 

 

 

 

 

(1/2)

 

Item

μPD78F0881

μPD78F0882

 

μPD78F0883

 

μPD78F0884

 

μPD78F0885

μPD78F0886

 

 

 

 

 

 

 

 

 

 

 

Internal

Flash memory

32 K

48 K

 

60 K

 

32 K

 

48 K

60 K

memory

(self-programming

 

 

 

 

 

 

 

 

 

(bytes)

supported)Note 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bank

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

High-speed RAMNote 1

 

 

 

1 K

 

 

 

 

 

 

 

 

 

 

 

 

 

Expansion RAMNote 1

1 K

2 K

 

2 K

 

1 K

 

2 K

2 K

 

 

 

 

 

 

 

 

 

 

Memory space

 

 

 

64 KB

 

 

 

 

 

High-speed system clock

Crystal/ceramic oscillation (X1), external main system clock input (EXCLK)

 

(oscillation frequency)

4 to 20 MHz: VDD = 4.0 to 5.5 V, 4 to 10 MHz: VDD = 2.7 to 5.5 V,

 

 

 

 

4 to 5 MHz: VDD = 1.8 to 5.5 V

 

 

 

 

 

 

 

 

 

 

Internal high-speed oscillation

On-chip internal oscillation (8 MHz (TYP.): VDD = 2.7 to 5.5 V)

 

 

clock (oscillation frequency)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Internal low-speed oscillation

On-chip internal oscillation (240 kHz (TYP.))

 

 

 

 

 

clock

 

 

 

 

 

 

 

 

 

 

(oscillation frequency)

 

 

 

 

 

 

 

 

 

 

 

 

Subsystem clock

Crystal oscillation (XT1), external subsystem clock input (EXCLKS)

 

(oscillation frequency)

(32.768 kHz: VDD = 1.8 to 5.5 V)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

General-purpose registers

8 bits × 32 registers (8 bits × 8 registers × 4 banks)

 

 

 

 

Minimum instruction execution

0.1 μs/0.2 μs/0.4 μs/0.8 μs/1.6 μs (high-speed system clock: @ fXP = 20 MHz operation)

time

 

 

 

 

 

 

 

 

 

 

 

0.25 μs/0.5 μs/1.0 μs/2.0 μs/4.0 μs (TYP.) (internal oscillator clock: @ fRH = 8 MHz (TYP.)

 

 

 

 

operation)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

122 μs (subsystem clock: when operating at fXT = 32.768 kHz)

 

 

 

 

 

 

 

 

 

 

Instruction set

• 16-bit operation

 

 

 

 

 

 

Multiply/divide (8 bits × 8 bits, 16 bits ÷ 8 bits)

Bit manipulate (set, reset, test, and Boolean operation)

BCD adjust, etc.

I/O ports

Total:

37

 

 

Total:

41

 

 

 

CMOS I/O

33

 

 

CMOS I/O

36

 

 

 

CMOS output

1

 

 

CMOS output

1

 

 

 

N-ch open-drain I/O

3

 

 

N-ch open-drain I/O

4

 

 

 

 

 

 

 

 

 

 

 

Timers

16-bit timer/event counter:

2 channels Note 2

 

 

 

 

 

 

 

8-bit timer/event counter:

2 channels

 

 

 

 

 

 

 

8-bit timer:

2 channels

 

 

 

 

 

 

 

Watch timer

1 channel

 

 

 

 

 

 

 

Watchdog timer:

1 channel

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Timer outputs

8 (PWM output: 4)

 

 

 

 

 

 

 

 

 

 

Clock output

• 78.125 kHz, 156.25 kHz, 312.5 kHz, 625 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz

 

 

 

 

(high-speed system clock: 10 MHz)

 

 

 

 

 

 

 

32.768 kHz (subsystem clock: 32.768 kHz)

 

 

 

 

 

Notes 1. The internal flash memory capacity, internal high-speed RAM capacity, and internal expansion RAM capacity can be changed using the internal memory size switching register (IMS) and the internal expansion RAM size switching register (IXS).

2.Since TM01 does not have the following terminal at 78K0/FC2, the function is restricted in part.

μPD78F0881, 78F0882, and 78F0883: TI001, TI011, TO01

μPD78F0884, 78F0885, and 78F0886: TI001

26

User’s Manual U17555EJ4V0UD

 

 

 

 

 

 

 

 

CHAPTER 1

OUTLINE

 

 

 

 

 

 

 

 

 

 

(2/2)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Item

 

μPD78F0881

μPD78F0882

μPD78F0883

μPD78F0884

μPD78F0885

μPD78F0886

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Buzzer output

 

1.22 kHz, 2.44 kHz, 4.88 kHz, 9.77 kHz (high-speed system clock: 10 MHz)

 

 

 

 

 

 

 

 

 

 

 

 

A/D converter

 

10-bit resolution × 8 channels

 

10-bit resolution × 9 channels

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Serial interface

 

CAN

 

 

 

 

 

1 ch

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LIN-UART

 

 

 

 

 

1 ch

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LIN-UART/

 

 

 

 

 

1 ch

 

 

 

 

CSI Note

 

 

 

 

 

 

 

 

 

 

 

 

Multiplier/divider

 

16 bit x 16 bit = 32 bit (Multiplication)

 

 

 

 

 

32 bit ÷ 32 bit = 32 bit remainder of 16 bits (Division)

<R>

 

 

 

 

 

 

 

 

 

 

 

 

 

Vectored

 

Internal

 

 

 

 

 

24

 

 

 

 

 

interrupt sources

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

External

 

 

 

 

 

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Reset

 

• Reset using RESET pin

 

 

 

 

 

Internal reset by watchdog timer

Internal reset by power-on-clear

Internal reset by low-voltage detector

On-chip debug function

 

Provided

Supply voltage

VDD = 1.8 to 5.5 V

 

 

 

TA = −40 to +85°C, −40 to +125°C

 

 

Operating ambient temperature

 

 

 

 

 

 

Package

44-pin plastic LQFP(10x10)

 

48-pin plastic LQFP (Fine pitch) (7x7)

 

 

 

 

Note Select either of the functions of these alternate-function pins.

An outline of the timer is shown below.

 

 

 

 

16-Bit Timer/

 

8-Bit Timer/

8-Bit Timers H0

Watch Timer

Watchdog

 

 

 

Event Counters 00 to 03

Event Counters

and H1

 

Timer

 

 

 

 

 

 

 

50 and 51

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TM00

TM01

TM02

TM03

TM50

TM51

TMH0

TMH1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Operation

Interval timer

1 ch

1 ch

1 ch

1 ch

1 ch

1 ch

Note 1

1 channel

 

1 channel

<R>

mode

 

 

 

 

 

 

 

 

 

 

 

External event counter

1 ch

1 ch

1 ch

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Function

Timer output

1

1 Note 2

1

1

1

1

 

 

PPG output

1

1 Note 2

 

 

PWM output

1

1

1

1

<R>

 

 

 

 

 

 

 

 

 

 

 

 

 

Pulse width measurement

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Square-wave output

1

1 Note2

1

1

1

1

 

 

Interrupt source

2

2

1

1

1

1

1

 

 

 

 

 

 

 

 

 

 

 

 

 

Notes 1. In the watch timer, the watch timer function and interval timer function can be used simultaneously.

2. μPD78F0884, 78F0885, and 78F0886 only.

Remark TM51 and TMH1 can be used in combination as a carrier generator mode.

User’s Manual U17555EJ4V0UD

27

CHAPTER 2 PIN FUNCTIONS

2.1 Pin Function List

There are three types of pin I/O buffer power supplies: AVREF, EVDD/VDD. The relationship between these power supplies and the pins is shown below.

Table 2-1. Pin I/O Buffer Power Supplies

Power Supply

Corresponding Pins

 

 

AVREF

P80 to P87, P90Note

 

 

EVDD/VDD

• Port pins other than P80 to P87, P90Note

 

• Non-port pins

 

 

Note P90 is μPD78F0884, 78F0885, and 78F0886 only.

This section explains the names and functions of the pins of the 78K0/FC2.

(1)Port pins

Table 2-2. Port pins (1/2)

Pin Name

I/O

Function

After Reset

 

Alternate Function

 

 

 

 

 

 

 

P00

I/O

Port 0.

Input

TI000

 

 

3-bit I/O port.

 

 

 

 

P01

 

 

TI010/TO00

 

Input/output can be specified in 1-bit units.

 

 

 

 

 

 

 

 

 

Use of an on-chip pull-up resistor can be specified by a

 

 

 

 

P06 Note

 

 

TI011/TO01

 

software setting.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O

Port 1.

Input

 

 

 

P10

SCK10/TxD61

 

 

8-bit I/O port.

 

 

 

 

P11

 

 

SI10/RxD61

 

Input/output can be specified in 1-bit units.

 

 

 

 

 

 

 

P12

 

 

SO10

 

Use of an on-chip pull-up resistor can be specified by a

 

 

 

 

 

 

 

P13

 

 

TxD60

 

software setting.

 

P14

 

 

 

RxD60

 

 

 

 

 

 

 

P15

 

 

 

TOH0

 

 

 

 

 

 

 

P16

 

 

 

TOH1/INTP5

 

 

 

 

 

 

 

P17

 

 

 

TI50/TO50

 

 

 

 

 

 

 

P30

I/O

Port 3.

Input

INTP1

 

 

4-bit I/O port.

 

 

 

 

P31

 

 

INTP2

 

Input/output can be specified in 1-bit units.

 

 

 

 

 

 

 

P32

 

 

INTP3

 

Use of an on-chip pull-up resistor can be specified by a

 

 

 

 

 

 

 

P33

 

software setting.

 

INTP4/TI51/TO51

 

 

 

 

 

 

 

P40, P41

I/O

Port 4.

Input

 

 

 

 

2-bit I/O port.

 

 

 

 

 

 

Input/output can be specified in 1-bit units.

 

 

 

 

 

 

Use of an on-chip pull-up resistor can be specified by a

 

 

 

 

 

 

software setting.

 

 

 

 

 

 

 

 

 

 

 

Note P06 is μPD78F0884, 78F0885, and 78F0886 only.

 

 

 

 

28

 

User’s Manual U17555EJ4V0UD

 

 

 

 

CHAPTER 2 PIN FUNCTIONS

Table 2-2. Port pins (2/2)

Pin Name

I/O

 

Function

After Reset

Alternate Function

 

 

 

 

 

 

 

P60 to P63 Note

I/O

Port 6.

 

N-ch open drain I/O port.

Input

 

 

4-bit I/O port

 

 

 

 

 

 

Input/output can be

 

 

 

 

 

 

specified in 1-bit units.

 

 

 

 

 

 

 

 

 

 

 

P70

I/O

Port 7.

 

 

Input

CTxD

 

 

4-bit I/O port.

 

 

 

 

P71

 

 

 

 

CRxD

 

Input/output can be specified in 1-bit units.

 

 

 

 

 

P72

 

 

PCL/INTP6

 

Use of an on-chip pull-up resistor can be specified by a

 

 

 

 

 

P73

 

 

BUZ/INTP7

 

software setting.

 

 

 

 

 

 

 

 

 

 

P80 to P87

I/O

Port 8.

 

 

Input

ANI0 to ANI7

 

 

8-bit I/O port.

 

 

 

 

 

 

Input/output can be specified in 1-bit units.

 

 

 

 

 

 

 

 

 

P90 Note

I/O

Port 9.

 

 

Input

ANI8

 

 

1-bit I/O port.

 

 

 

 

 

 

Input/output can be specified in 1-bit units.

 

 

 

 

 

 

 

 

 

P120

I/O

Port 12.

 

 

Input

INTP0/EXLVI

 

 

5-bit I/O port.

 

 

 

 

P121

 

 

 

 

X1

 

Only for P120, use of an on-chip pull-up resistor can be

 

 

 

 

 

P122

 

specified by a software setting.

 

X2/EXCLK

 

 

 

 

 

 

 

P123

 

 

 

 

 

XT1

 

 

 

 

 

 

 

P124

 

 

 

 

 

XT2/EXCLKS

 

 

 

 

 

 

 

P130

Output

Port 13.

 

 

Output

 

 

P130 is 1-bit output-only port.

 

 

 

 

P131 is 1-bit I/O port.

 

 

 

 

P131 Note

I/O

 

 

Input

 

P131 use of an on-chip pull-up resistor can be specified by a

 

 

 

 

 

 

 

software setting.

 

 

 

 

 

 

 

 

 

 

 

Note P63, P90 and P131 are μPD78F0884, 78F0885, and 78F0886 only.

User’s Manual U17555EJ4V0UD

29

CHAPTER 2 PIN FUNCTIONS

(2)Non-port pins

Table 2-3. Non-port pins (1/2)

 

Pin Name

I/O

Function

After Reset

Alternate Function

 

 

 

 

 

 

 

 

 

 

INTP0

Input

External interrupt request input for which the valid edge (rising

Input

P120/EXLVI

 

 

 

 

edge, falling edge, or both rising and falling edges) can be

 

 

 

 

 

INTP1

 

 

P30

 

 

specified

 

 

 

 

 

 

 

 

 

 

INTP2

 

 

P31

 

 

 

 

 

 

 

 

 

 

 

 

 

 

INTP3

 

 

 

P32

 

 

 

 

 

 

 

 

 

 

INTP4

 

 

 

P33/TI51/TO51

 

 

 

 

 

 

 

 

 

 

INTP5

 

 

 

P16/TOH1

 

 

 

 

 

 

 

 

 

 

INTP6

 

 

 

P72/PCL

 

 

 

 

 

 

 

 

 

 

INTP7

 

 

 

P73/BUZ

 

 

 

 

 

 

 

 

 

 

SI10

Input

Serial data input to serial interface

Input

P11/RxD61

 

 

 

 

 

 

 

 

 

 

SO10

Output

Serial data output from serial interface

Input

P12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SCK10

I/O

Clock input/output for serial interface

Input

P10/TxD61

 

 

 

 

 

 

 

 

 

 

RxD60

Input

Serial data input to asynchronous serial interface

Input

P14

 

 

 

 

 

 

 

 

 

 

RxD61

 

 

 

P11/SI10

 

 

 

 

 

 

 

 

 

 

TxD60

Output

Serial data output from asynchronous serial interface

Input

P13

 

 

 

 

 

 

 

 

 

 

TxD61

 

 

 

 

 

 

 

 

 

 

P10/SCK10

 

 

 

 

 

 

 

 

 

 

 

TI000

Input

External count clock input to 16-bit timer/event counter 00

Input

P00

 

 

 

 

Capture trigger input to capture registers (CR000, CR010) of

 

 

 

 

 

 

 

 

16-bit timer/event counter 00

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TI010

 

Capture trigger input to capture register (CR000) of 16-bit

 

P01/TO00

 

 

 

 

timer/event counter 00

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TI011

 

Capture trigger input to capture register (CR001) of 16-bit

 

P06/TO01

 

 

 

 

timer/event counter 01

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TO00

Output

16-bit timer/event counter 00 output

Input

P01/TI010

 

 

 

 

 

 

 

 

 

 

TO01

 

16-bit timer/event counter 01 output

 

P06/TI011

 

 

 

 

 

 

 

 

 

 

TI50

Input

External count clock input to 8-bit timer/event counter 50

Input

P17/TO50

 

 

 

 

 

 

 

 

 

 

TI51

 

External count clock input to 8-bit timer/event counter 51

 

P33/TO51/INTP4

 

 

 

 

 

 

 

 

 

 

TO50

Output

8-bit timer/event counter 50 output

Input

P17/TI50

 

 

 

 

 

 

 

 

 

 

TO51

 

8-bit timer/event counter 51 output

 

P33/TI51/INTP4

 

 

 

 

 

 

 

 

 

 

TOH0

 

8-bit timer H0 output

 

P15

 

 

 

 

 

 

 

 

 

 

TOH1

 

8-bit timer H1 output

 

P16/INTP5

 

 

 

 

 

 

 

 

 

 

PCL

Output

Clock output (for trimming of high-speed system clock,

Input

P72/INTP6

 

 

 

 

subsystem clock)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BUZ

Output

Buzzer output

Input

P73/INTP7

 

 

 

 

 

 

 

 

 

 

ANI0 to ANI8 Note

Input

A/D converter analog input

Input

P80 to P87, P90

 

 

 

 

 

 

 

 

 

Note ANI8 is μPD78F0884, 78F0885, and 78F0886 only.

30

User’s Manual U17555EJ4V0UD

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