NEC PD78F0714 User Manual
μ
μ
User’s Manual
PD78F0714
8-Bit Single-Chip Microcontroller
PD78F0714
Document No. U16928EJ2V0UD00 (2nd edition)
Date Published September 2007 NS
©
Printed in Japan
2004
[MEMO]
2
User’s Manual U16928EJ2V0UD
NOTES FOR CMOS DEVICES
1
VOLTAGE APPLICATION WAVEFORM AT INPUT PIN
Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the
CMOS device stays in the area between V
malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed,
and also in the transition period when the input level passes through the area between V
V
IH
(MIN).
HANDLING OF UNUSED INPUT PINS
2
Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is
possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS
devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed
high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to V
via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must
be judged separately for each device and according to related specifications governing the device.
3
PRECAUTION AGAINST ESD
A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as
much as possible, and quickly dissipate it when it has occurred. Environmental control must be
adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that
easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static
container, static shielding bag or conductive material. All test and measurement tools including work
benches and floors should be grounded. The operator should be grounded using a wrist strap.
Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for
PW boards with mounted semiconductor devices.
IL
(MAX) and VIH (MIN) due to noise, etc., the device may
IL
(MAX) and
DD
or GND
4
STATUS BEFORE INITIALIZATION
Power-on does not necessarily define the initial status of a MOS device. Immediately after the power
source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does
not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the
reset signal is received. A reset operation must be executed immediately after power-on for devices
with reset functions.
5
POWER ON/OFF SEQUENCE
In the case of a device that uses different power supplies for the internal operation and external
interface, as a rule, switch on the external power supply after switching on the internal power supply.
When switching the power supply off, as a rule, switch off the external power supply and then the
internal power supply. Use of the reverse power on/off sequences may result in the application of an
overvoltage to the internal elements of the device, causing malfunction and degradation of internal
elements due to the passage of an abnormal current.
The correct power on/off sequence must be judged separately for each device and according to related
specifications governing the device.
6
INPUT OF SIGNAL DURING POWER OFF STATE
Do not input signals or an I/O pull-up power supply while the device is not powered. The current
injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and
the abnormal current that passes in the device at this time may cause degradation of internal elements.
Input of signals during the power off state must be judged separately for each device and according to
related specifications governing the device.
User’s Manual U16928EJ2V0UD
3
EEPROM is a trademark of NEC Electronics Corporation.
Windows, Windows NT, and Windows XP are registered trademarks or trademarks of Microsoft Corporation in
the United States and/or other countries.
PC/AT is a trademark of International Business Machines Corporation.
HP9000 series 700 and HP-UX are trademarks of Hewlett-Packard Company.
SPARCstation is a trademark of SPARC International, Inc.
Solaris and SunOS are trademarks of Sun Microsystems, Inc.
TRON is an abbreviation of The Realtime Operating system Nucleus.
ITRON is an abbreviation of Industrial TRON.
®
SuperFlash
is a registered trademark of Silicon Storage Technology, Inc. in several countries including the
United States and Japan.
4
User’s Manual U16928EJ2V0UD
Caution: This product uses SuperFlash
®
technology licensed from Silicon Storage Technology, inc.
•
The information in this document is current as of August, 2007. The information is subject to
change without notice. For actual design-in, refer to the latest publications of NEC Electronics data
sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not
all products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
No part of this document may be copied or reproduced in any form or by any means without the prior
•
written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may
appear in this document.
•
NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from the use of NEC Electronics products listed in this document
or any other liability arising from the use of such products. No license, express, implied or otherwise, is
granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others.
Descriptions of circuits, software and other related information in this document are provided for illustrative
•
purposes in semiconductor product operation and application examples. The incorporation of these
circuits, software and information in the design of a customer's equipment shall be done under the full
responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by
customers or third parties arising from the use of these circuits, software and information.
•
While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products,
customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To
minimize risks of damage to property or injury (including death) to persons arising from defects in NEC
Electronics products, customers must incorporate sufficient safety measures in their design, such as
redundancy, fire-containment and anti-failure features.
•
NEC Electronics products are classified into the following three quality grades: "Standard", "Special" and
"Specific".
The "Specific" quality grade applies only to NEC Electronics products developed based on a customerdesignated "quality assurance program" for a specific application. The recommended applications of an NEC
Electronics product depend on its quality grade, as indicated below. Customers must check the quality grade of
each NEC Electronics product before using it in a particular application.
The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC
Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications
not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to
determine NEC Electronics' willingness to support a given application.
(Note)
(1)
"NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its
majority-owned subsidiaries.
(2)
"NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as
defined above).
M8 E 02 . 11-1
User’s Manual U16928EJ2V0UD
5
INTRODUCTION
Readers This manual is intended for user engineers who wish to understand the functions of the
μ
PD78F0714 and design and develop application systems and programs for this
device.
The target product is as follows.
μ
PD78F0714
Purpose This manual is intended to give users an understanding of the functions described in the
Organization below.
Organization The
How to Read This Manual It is assumed that the readers of this manual have general knowledge of electrical
Conventions Data significance: Higher digits on the left and lower digits on the right
Active low representations: ××× (overscore over pin and signal name)
Note: Footnote for item marked with Note in the text.
Caution: Information requiring particular attention
Remark: Supplementary information
Numerical representations: Binary
Decimal
Hexadecimal
μ
PD78F0714 manual is separated into two parts: this manual and the instructions
edition (common to the 78K/0 Series).
μ
PD78F0714
User’s Manual
(This Manual)
• Pin functions
• Internal block functions
• Interrupts
• Other on-chip peripheral functions
• Electrical specifications
engineering, logic circuits, and microcontrollers.
• To gain a general understanding of functions:
→ Read this manual in the order of the CONTENTS. The mark “<R>” shows major
revised points. The revised points can be easily searched by copying an “<R>” in
the PDF file and specifying it in the “Find what:” field.
• How to interpret the register format:
→ For a bit number enclosed in brackets, the bit name is defined as a reserved word
in the assembler, and is already defined in the header file named sfrbit.h in the C
compiler.
• To check the details of a register when you know the register name.
→ See APPENDIX B REGISTER INDEX.
• To know details of the 78K/0 Series instructions.
→ Refer to the separate document 78K/0 Series Instructions User’s Manual
(U12326E).
78K/0 Series
User’s Manual
Instructions
• CPU functions
• Instruction set
• Explanation of each instruction
...
×××× or ××××B
...
××××
...
××××H
6
User’s Manual U16928EJ2V0UD
<R>
Related Documents The related documents indicated in this publication may include preliminary versions.
However, preliminary versions are not marked as such.
Documents Related to Devices
Document Name Document No.
μ
PD78F0714 User’s Manual
78K/0 Series Instructions User’s Manual U12326E
This manual
Documents Related to Development Tools (Software) (User’s Manuals)
Document Name Document No.
<R>
RA78K0 Ver. 3.80 Assembler Package
ID78K0-QB Ver. 2.94 Integrated Debugger Operation U18330E
PM+ Ver. 5.20 U16934E
Operation U17199E
Language U17198E
Structured Assembly Language U17197E
Operation U17201E CC78K0 Ver. 3.70 C Compiler
Language U17200E
Documents Related to Development Tools (Hardware) (User’s Manuals)
Document Name Document No.
QB-780714 In-Circuit Emulator U17081E
QB-78K0MINI On-Chip Debug Emulator U17029E
QB-78K0MINI2 On-Chip Debug Emulator with Programming Function U18371E
Documents Related to Flash Memory Programming
Document Name Document No.
PG-FP4 Flash Memory Programmer User’s Manual U15260E
Other Documents
Document Name Document No.
SEMICONDUCTOR SELECTION GUIDE − Products and Packages −
Semiconductor Device Mount Manual Note
Quality Grades on NEC Semiconductor Devices C11531E
NEC Semiconductor Device Reliability/Quality Control System C10983E
Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge (ESD) C11892E
X13769X
Note See the “Semiconductor Device Mount Manual” website (http://www.necel.com/pkg/en/mount/index.html).
Caution The related documents listed above are subject to change without notice. Be sure to use the latest
version of each document when designing.
User’s Manual U16928EJ2V0UD
7
CONTENTS
CHAPTER 1 OUTLINE............................................................................................................................. 16
1.1 Features ..................................................................................................................................... 16
1.2 Applications .............................................................................................................................. 17
1.3 Ordering Information ................................................................................................................ 17
1.4 Pin Configuration (Top View)................................................................................................... 18
1.5 Block Diagram........................................................................................................................... 20
1.6 Outline of Functions ................................................................................................................. 21
CHAPTER 2 PIN FUNCTIONS ............................................................................................................... 23
2.1 Pin Function List....................................................................................................................... 23
2.2 Description of Pin Functions................................................................................................... 27
2.2.1 P00 to P03 (port 0)....................................................................................................................... 27
2.2.2 P10 to P17 (port 1)....................................................................................................................... 27
2.2.3 P20 to P27 (port 2)....................................................................................................................... 28
2.2.4 P30 to P33 (port 3)....................................................................................................................... 28
2.2.5 P40 to P47 (port 4)....................................................................................................................... 29
2.2.6 P50 to P57 (port 5)....................................................................................................................... 29
2.2.7 P64 to P67 (port 6)....................................................................................................................... 30
2.2.8 P70 to P73 (port 7)....................................................................................................................... 30
2.2.9 TW0TO0/RTP10 to TW0TO5/RTP15........................................................................................... 30
2.2.10 AVREF............................................................................................................................................ 30
2.2.11 AVSS ............................................................................................................................................. 30
2.2.12 RESET ......................................................................................................................................... 30
2.2.13 X1 and X2..................................................................................................................................... 30
2.2.14 VDD and EVDD ............................................................................................................................... 30
2.2.15 VSS and EVSS................................................................................................................................31
2.2.16 FLMD0 ......................................................................................................................................... 31
2.3 Pin I/O Circuits and Recommended Connection of Unused Pins........................................ 32
CHAPTER 3 CPU ARCHITECTURE ...................................................................................................... 34
3.1 Memory Space........................................................................................................................... 34
3.1.1 Internal program memory space...................................................................................................35
3.1.2 Internal data memory space......................................................................................................... 36
3.1.3 Special function register (SFR) area ............................................................................................36
3.1.4 Data memory addressing ............................................................................................................. 36
3.2 Processor Registers ................................................................................................................. 38
3.2.1 Control registers........................................................................................................................... 38
3.2.2 General-purpose registers............................................................................................................ 42
3.2.3 Special function registers (SFRs)................................................................................................. 43
3.3 Instruction Address Addressing ............................................................................................. 49
3.3.1 Relative addressing...................................................................................................................... 49
3.3.2 Immediate addressing.................................................................................................................. 50
3.3.3 Table indirect addressing ............................................................................................................. 51
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User’s Manual U16928EJ2V0UD
3.3.4 Register addressing ......................................................................................................................52
3.4 Operand Address Addressing................................................................................................. 53
3.4.1 Implied addressing........................................................................................................................53
3.4.2 Register addressing ......................................................................................................................54
3.4.3 Direct addressing ..........................................................................................................................55
3.4.4 Short direct addressing .................................................................................................................56
3.4.5 Special function register (SFR) addressing................................................................................... 57
3.4.6 Register indirect addressing..........................................................................................................58
3.4.7 Based addressing .........................................................................................................................59
3.4.8 Based indexed addressing............................................................................................................60
3.4.9 Stack addressing...........................................................................................................................61
CHAPTER 4 PORT FUNCTIONS ........................................................................................................... 62
4.1 Port Functions .......................................................................................................................... 62
4.2 Port Configuration .................................................................................................................... 64
4.2.1 Port 0 ............................................................................................................................................65
4.2.2 Port 1 ............................................................................................................................................66
4.2.3 Port 2 ............................................................................................................................................70
4.2.4 Port 3 ............................................................................................................................................71
4.2.5 Port 4 ............................................................................................................................................73
4.2.6 Port 5 ............................................................................................................................................74
4.2.7 Port 6 ............................................................................................................................................76
4.2.8 Port 7 ............................................................................................................................................77
4.3 Registers Controlling Port Function....................................................................................... 78
4.4 Port Function Operations ........................................................................................................82
4.4.1 Writing to I/O port..........................................................................................................................82
4.4.2 Reading from I/O port....................................................................................................................82
4.4.3 Operations on I/O port...................................................................................................................82
4.5 Cautions on 1-Bit Manipulation Instruction for Port Register n (Pn) .................................. 83
CHAPTER 5 CLOCK GENERATOR ...................................................................................................... 84
5.1 Functions of Clock Generator ................................................................................................. 84
5.2 Configuration of Clock Generator........................................................................................... 84
5.3 Registers Controlling Clock Generator .................................................................................. 86
5.4 System Clock Oscillator .......................................................................................................... 93
5.4.1 X1 oscillator ..................................................................................................................................93
5.4.2 Examples of Incorrect Resonator Connection...............................................................................94
5.4.3 Internal oscillator...........................................................................................................................95
5.4.4 Prescaler.......................................................................................................................................95
5.5 Clock Generator Operation...................................................................................................... 96
5.6 Time Required to Switch Between Internal Oscillation Clock and X1 Input Clock.......... 101
5.7 Time Required for CPU Clock Switchover ........................................................................... 102
5.8 Clock Switching Flowchart and Register Setting................................................................ 103
5.8.1 Switching from internal oscillation clock to X1 input clock...........................................................103
5.8.2 Switching from X1 input clock to internal oscillation clock...........................................................104
5.8.3 Register settings .........................................................................................................................105
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CHAPTER 6 10-BIT INVERTER CONTROL TIMER............................................................................. 106
6.1 Outline of 10-Bit Inverter Control Timer ............................................................................... 106
6.2 Function of 10-Bit Inverter Control Timer ............................................................................ 106
6.3 Configuration of 10-Bit Inverter Control Timer.................................................................... 106
6.4 Registers Controlling 10-Bit Inverter Control Timer ........................................................... 110
6.5 Registers Controlling 10-Bit Inverter Control Timer ........................................................... 115
CHAPTER 7 16-BIT UP/DOWN COUNTER ITENC20 .......................................................................... 122
7.1 Functions of 16-Bit Up/Down Counter ITENC20.................................................................. 122
7.2 Configuration of 16-bit Up/Down Counter ITENC20............................................................ 124
7.3 16-Bit Up/down Counter ITENC20 Control Registers.......................................................... 131
7.4 16-Bit Up/down Counter ITENC20 Operations ..................................................................... 139
7.4.1 Basic operation........................................................................................................................... 139
7.4.2 Operation in general-purpose timer mode.................................................................................. 140
7.4.3 Operation in UDC mode............................................................................................................. 143
7.5 Internal Operation of 16-Bit Up/down Counter ITENC20 .................................................... 149
7.5.1 Clearing of count value in UDC mode B..................................................................................... 149
7.5.2 Clearing of count value upon occurrence of compare match...................................................... 150
7.5.3 Transfer operation...................................................................................................................... 150
7.5.4 Interrupt signal output upon compare match.............................................................................. 151
7.5.5 IT20UBD flag (bit 0 of IT20STS register) operation.................................................................... 151
CHAPTER 8 16-BIT TIMER/EVENT COUNTER 00 ........................................................................... 152
8.1 Functions of 16-Bit Timer/Event Counter 00........................................................................ 152
8.2 Configuration of 16-Bit Timer/Event Counter 00 ................................................................. 153
8.3 Registers Controlling 16-Bit Timer/Event Counter 00......................................................... 157
8.4 Operation of 16-Bit Timer/Event Counter 00........................................................................ 163
8.4.1 Interval timer operation............................................................................................................... 163
8.4.2 PPG output operations............................................................................................................... 166
8.4.3 Pulse width measurement operations ........................................................................................ 169
8.4.4 External event counter operation................................................................................................ 177
8.4.5 Square-wave output operation ................................................................................................... 180
8.4.6 One-shot pulse output operation ................................................................................................ 182
8.5 Cautions for 16-Bit Timer/Event Counter 00 ........................................................................ 187
CHAPTER 9 8-BIT TIMER/EVENT COUNTERS 50 AND 51........................................................... 190
9.1 Functions of 8-Bit Timer/Event Counters 50 and 51 ........................................................... 190
9.2 Configuration of 8-Bit Timer/Event Counters 50 and 51..................................................... 192
9.3 Registers Controlling 8-Bit Timer/Event Counters 50 and 51 ............................................ 194
9.4 Operations of 8-Bit Timer/Event Counters 50 and 51 ......................................................... 199
9.4.1 Operation as interval timer ......................................................................................................... 199
9.4.2 Operation as external event counter .......................................................................................... 201
9.4.3 Square-wave output operation ................................................................................................... 202
9.4.4 PWM output operation................................................................................................................ 203
9.5 Cautions for 8-Bit Timer/Event Counters 50 and 51............................................................ 207
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User’s Manual U16928EJ2V0UD
CHAPTER 10 8-BIT TIMER H0 ........................................................................................................... 208
10.1 Functions of 8-Bit Timer H0................................................................................................... 208
10.2 Configuration of 8-Bit Timer H0 ............................................................................................ 208
10.3 Registers Controlling 8-Bit Timer H0.................................................................................... 211
10.4 Operation of 8-Bit Timer H0................................................................................................... 214
10.4.1 Operation as interval timer/square-wave output..........................................................................214
10.4.2 Operation as PWM output mode.................................................................................................217
CHAPTER 11 WATCHDOG TIMER ..................................................................................................... 223
11.1 Functions of Watchdog Timer............................................................................................... 223
11.2 Configuration of Watchdog Timer ........................................................................................ 225
11.3 Registers Controlling Watchdog Timer................................................................................ 226
11.4 Operation of Watchdog Timer............................................................................................... 228
11.4.1 Watchdog timer operation when “Internal oscillator cannot be stopped” is selected by option byte ...228
11.4.2 Watchdog timer operation when “internal oscillator can be stopped by software” is selected by
option byte ..................................................................................................................................229
11.4.3 Watchdog timer operation in STOP mode (when “Internal oscillator can be stopped by software” is
selected by option byte) ..............................................................................................................230
11.4.4 Watchdog timer operation in HALT mode (when “Internal oscillator can be stopped by software” is
selected by option byte) ..............................................................................................................232
CHAPTER 12 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER............................................... 233
12.1 Functions of Clock Output/Buzzer Output Controller ........................................................ 233
12.2 Configuration of Clock Output/Buzzer Output Controller.................................................. 234
12.3 Register Controlling Clock Output/Buzzer Output Controller ........................................... 234
12.4 Clock Output/Buzzer Output Controller Operations........................................................... 237
12.4.1 Clock output operation ................................................................................................................237
12.4.2 Operation as buzzer output.........................................................................................................237
CHAPTER 13 REAL-TIME OUTPUT PORT ....................................................................................... 238
13.1 Function of Real-Time Output Port....................................................................................... 238
13.2 Configuration of Real-Time Output Port .............................................................................. 238
13.3 Registers Controlling Real-Time Output Port...................................................................... 243
13.4 Operation of Real-Time Output Port..................................................................................... 249
13.5 Using Real-Time Output Port ................................................................................................ 259
13.6 Notes on Real-Time Output Port........................................................................................... 260
CHAPTER 14 DC INVERTER CONTROL FUNCTION ......................................................................... 261
CHAPTER 15 A/D CONVERTER ......................................................................................................... 262
15.1 Functions of A/D Converter................................................................................................... 262
15.2 Configuration of A/D Converter ............................................................................................ 263
User’s Manual U16928EJ2V0UD
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15.3
Registers Used in A/D Converter .......................................................................................... 265
15.4 Relationship Between Input Voltage and A/D Conversion Results................................... 272
15.5 A/D Converter Operations...................................................................................................... 273
15.5.1 Basic operations of A/D converter .............................................................................................. 273
15.5.2 Trigger modes ............................................................................................................................ 275
15.5.3 Operation modes........................................................................................................................ 276
15.5.4 Power-fail monitoring function .................................................................................................... 279
15.6 How to Read A/D Converter Characteristics Table ............................................................. 283
15.7 Cautions for A/D Converter.................................................................................................... 285
CHAPTER 16 SERIAL INTERFACE UART00 .................................................................................... 288
16.1 Functions of Serial Interface UART00 .................................................................................. 288
16.2 Configuration of Serial Interface UART00............................................................................ 289
16.3 Registers Controlling Serial Interface UART00 ................................................................... 292
16.4 Operation of Serial Interface UART00................................................................................... 297
16.4.1 Operation stop mode.................................................................................................................. 297
16.4.2 Asynchronous serial interface (UART) mode ............................................................................. 298
16.4.3 Dedicated baud rate generator................................................................................................... 304
CHAPTER 17 SERIAL INTERFACE CSI10 ........................................................................................ 309
17.1 Functions of Serial Interface CSI10 ...................................................................................... 309
17.2 Configuration of Serial Interface CSI10 ................................................................................ 310
17.3 Registers Controlling Serial Interface CSI10 ....................................................................... 312
17.4 Operation of Serial Interface CSI10....................................................................................... 316
17.4.1 Operation stop mode.................................................................................................................. 316
17.4.2 3-wire serial I/O mode ................................................................................................................ 317
CHAPTER 18 MULTIPLIER/DIVIDER ................................................................................................... 325
18.1 Functions of Multiplier/Divider .............................................................................................. 325
18.2 Configuration of Multiplier/Divider........................................................................................ 325
18.3 Register Controlling Multiplier/Divider ................................................................................. 330
18.4 Operations of Multiplier/Divider ............................................................................................ 331
18.4.1 Multiplication operation............................................................................................................... 331
18.4.2 Division operation....................................................................................................................... 333
CHAPTER 19 INTERRUPT FUNCTIONS............................................................................................. 335
19.1 Interrupt Function Types........................................................................................................ 335
19.2 Interrupt Sources and Configuration.................................................................................... 335
19.3 Registers Controlling Interrupt Functions ........................................................................... 339
19.4 Interrupt Servicing Operations.............................................................................................. 347
19.4.1 Non-maskable interrupt request acknowledgment operation...................................................... 347
19.4.2 Maskable interrupt request acknowledgement ........................................................................... 349
19.4.3 Software interrupt request acknowledgment .............................................................................. 351
19.4.4 Multiple interrupt servicing.......................................................................................................... 352
19.4.5 Interrupt request hold ................................................................................................................. 355
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CHAPTER 20 STANDBY FUNCTION .................................................................................................. 356
20.1 Standby Function and Configuration ................................................................................... 356
20.1.1 Standby function .........................................................................................................................356
20.1.2 Registers controlling standby function.........................................................................................358
20.2 Standby Function Operation ................................................................................................. 360
20.2.1 HALT mode.................................................................................................................................360
20.2.2 STOP mode ................................................................................................................................364
CHAPTER 21 RESET FUNCTION ....................................................................................................... 368
21.1 Register for Confirming Reset Source ................................................................................. 375
CHAPTER 22 POWER-ON-CLEAR CIRCUIT ..................................................................................... 376
22.1 Functions of Power-on-Clear Circuit.................................................................................... 376
22.2 Configuration of Power-on-Clear Circuit ............................................................................. 377
22.3 Operation of Power-on-Clear Circuit .................................................................................... 377
22.4 Cautions for Power-on-Clear Circuit .................................................................................... 378
CHAPTER 23 LOW-VOLTAGE DETECTOR ....................................................................................... 380
23.1 Functions of Low-Voltage Detector...................................................................................... 380
23.2 Configuration of Low-Voltage Detector................................................................................ 380
23.3 Registers Controlling Low-Voltage Detector....................................................................... 381
23.4 Operation of Low-Voltage Detector ...................................................................................... 382
23.5 Cautions for Low-Voltage Detector ...................................................................................... 386
CHAPTER 24 OPTION BYTES ............................................................................................................ 390
CHAPTER 25 FLASH MEMORY.......................................................................................................... 391
25.1 Internal Memory Size Switching Register ............................................................................ 391
25.2 Writing with Flash Memory Programmer ............................................................................. 392
25.3 Programming Environment ................................................................................................... 396
25.4 Communication Mode ............................................................................................................ 396
25.5 Processing of Pins on Board ................................................................................................ 399
25.5.1 FLMD0 pin ..................................................................................................................................399
25.5.2 FLMD1 pin ..................................................................................................................................399
25.5.3 Serial interface pins.....................................................................................................................400
25.5.4 RESET pin ..................................................................................................................................402
25.5.5 Port pins......................................................................................................................................402
25.5.6 Other signal pins .........................................................................................................................402
25.5.7 Power supply ..............................................................................................................................402
25.6 Programming Method ............................................................................................................ 403
25.6.1 Controlling flash memory ............................................................................................................403
25.6.2 Flash memory programming mode .............................................................................................403
User’s Manual U16928EJ2V0UD
13
25.6.3 Selecting communication mode.................................................................................................. 404
25.6.4 Communication commands........................................................................................................ 405
25.7 Flash Memory Programming by Self-Writing....................................................................... 406
25.7.1 Registers used for self-programming function ............................................................................ 407
25.8 Boot Swap Function ............................................................................................................... 411
25.8.1 Outline of boot swap function ..................................................................................................... 411
25.8.2 Memory map and boot area ....................................................................................................... 412
CHAPTER 26 ON-CHIP DEBUG FUNCTION ..................................................................................... 413
CHAPTER 27 INSTRUCTION SET....................................................................................................... 414
27.1 Conventions Used in Operation List..................................................................................... 414
27.1.1 Operand identifiers and specification methods........................................................................... 414
27.1.2 Description of operation column ................................................................................................. 415
27.1.3 Description of flag operation column .......................................................................................... 415
27.2 Operation List.......................................................................................................................... 416
27.3 Instructions Listed by Addressing Type .............................................................................. 424
CHAPTER 28 ELECTRICAL SPECIFICATIONS ................................................................................. 427
CHAPTER 29 PACKAGE DRAWINGS ................................................................................................ 440
CHAPTER 30 CAUTIONS FOR WAIT................................................................................................. 441
30.1 Cautions for Wait .................................................................................................................... 441
30.2 Peripheral Hardware That Generates Wait........................................................................... 442
30.3 Example of Wait Occurrence ................................................................................................. 443
APPENDIX A DEVELOPMENT TOOLS............................................................................................... 444
A.1 Software Package...................................................................................................................... 448
A.2 Language Processing Software............................................................................................... 448
A.3 Control Software........................................................................................................................ 449
A.4 Flash Memory Programming Tools ......................................................................................... 450
A.4.1 When using flash memory programmer PG-FP5, FL-PR5, PG-FP4, FL-PR4, and PG-FPL ......... 450
A.4.2 When using on-chip debug emulator with programming function QB-MINI2 ................................. 450
A.5 Debugging Tools (Hardware)................................................................................................. 451
A.5.1 When using in-circuit emulator QB-780714 ................................................................................... 451
A.5.2 When using on-chip debug emulator QB-78K0MINI...................................................................... 451
A.5.3 When using on-chip debug emulator with programming function QB-MINI2 ................................. 452
A.6 Debugging Tools (Software)..................................................................................................... 452
14
User’s Manual U16928EJ2V0UD
APPENDIX B REGISTER INDEX ......................................................................................................... 453
B.1 Register Index (In Alphabetical Order with Respect to Register Names)......................... 453
B.2 Register Index (In Alphabetical Order with Respect to Register Symbol)........................ 457
APPENDIX C REVISION HISTORY ..................................................................................................... 461
C.1 Major Revisions in This Edition............................................................................................... 461
User’s Manual U16928EJ2V0UD
15
CHAPTER 1 OUTLINE
1.1 Features
{ Minimum instruction execution time can be changed from high speed (0.1
clock) to low-speed (8.33
{ General-purpose register: 8 bits × 32 registers (8 bits × 8 registers × 4 banks)
{ On-chip multiplier/divider
• 16 bits × 16 bits = 32 bits (multiplication)
• 32 bits ÷ 16 bits = 32 bits, 16 bits remainder (division)
{ ROM, RAM capacities
μ
s: @ 240 kHz operation with internal oscillation clock)
μ
s: @ 20 MHz operation with X1 input
Part Number
μ
PD78F0714
Item
Flash memory 32 KB 1024 bytes
Program Memory
(ROM)
{ On-chip single-power-supply flash memory
{ Self-programming (with boot swap function)
{ On-chip debug function
{ On-chip power-on-clear (POC) circuit and low-voltage detector (LVI)
{ Short startup is possible via the CPU default start using the internal oscillator
{ On-chip watchdog timer (operable with internal oscillation clock)
{ On-chip clock output/buzzer output controller00
{ On-chip real-time output ports
{ I/O ports: 48
{ Timer: 7 channels
{ Serial interface: 2 channels (UART: 1 channel, CSI: 1 channel)
{ 10-bit resolution A/D converter: 8 channels
{ Supply voltage: V
{ Operating ambient temperature: T
DD = 4.0 to 5.5 V
A = −40 to +85°C
Data Memory
(Internal High-Speed RAM)
16
User’s Manual U16928EJ2V0UD
CHAPTER 1 OUTLINE
<R>
1.2 Applications
{ Household electrical appliances
• Refrigerator
• Dish washer
• Washing machine, Dryer
• Outdoor air conditioner units
• Microwave ovens, electric rice cookers
{ Industrial equipment
• Pumps
1.3 Ordering Information
Part Number Package
μ
PD78F0714GK-9ET 64-pin plastic TQFP (fine pitch) (12 × 12)
User’s Manual U16928EJ2V0UD
17
1.4 Pin Configuration (Top View)
• 64-pin plastic TQFP (fine pitch) (12 × 12)
CHAPTER 1 OUTLINE
P20/ANI0
P21/ANI1
P22/ANI2
P23/ANI3
P24/ANI4
P25/ANI5
P26/ANI6
P27/ANI7
P73
P72
P71
P70
P67
P66
P65
P64
AVREF
AVSS
FLMD0
VDD
VSS
X1
X2
RESET
ADTRG/INTP3/P03
INTP2/P02
INTP1/P01
TW0TOFFP/INTP0/P00
BUZ/P30
PCL/P31
P32
P33
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
646362616059585756555453525150
171819202122232425262728293031
SS
DD
EV
EV
49
32
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
P47/RTP07
P46/RTP06
P45/RTP05
P44/RTP04
P43/RTP03
P42/RTP02
P41/RTP01
P40/RTP00
P17/SO10/FLMD1
P16/SI10
P15/SCK10
P14/TxD00
P13/RxD00
P12
P11
P10
Caution Connect the AV
18
SS pin to VSS.
P50/TI50/TO50
P51/TI51/TO51
P54/TI001/TO00
P53/TI000/INTP5
P52/TOH0/INTP4
P55/TIT20IUD/INTP6
P56/TIT20CUD/TIT20CC0/INTP7
P57/TIT20CLR/TIT20CC1/TIT20TO
User’s Manual U16928EJ2V0UD
TW0TO0/RTP10
TW0TO1/RTP11
TW0TO2/RTP12
TW0TO3/RTP13
TW0TO4/RTP14
TW0TO5/RTP15
CHAPTER 1 OUTLINE
Pin Identification
ADTRG: A/D trigger input
ANI0 to ANI7: Analog input
AV
REF: Analog reference voltage
AVSS: Analog ground
BUZ: Buzzer output
EV
DD: Power supply for port
EVSS: Ground for port
FLMD0, FLMD1: Flash programming mode
INTP0 to INTP7: External interrupt input
P00 to P03: Port 0
P10 to P17: Port 1
P20 to P27: Port 2
P30 to P33: Port 3
P40 to P47: Port 4
P50 to P57: Port 5
P64 to P67: Port 6
P70 to P73: Port 7
PCL: Programmable clock output
RESET: Reset
RTP00 to RTP07: Real-time output port
RxD00: Receive data
SCK10 Serial clock input/output
SI10: Serial data input
SO10: Serial data output
TI000, TI001: Timer input
TI50, TI51: Timer input
TIT20CLR: Up/down counter clear
TIT20CUD: Up/down counter clock select
TIT20CC0, TIT20CC1: Up/down counter capture input
TIT20IUD: Up/down counter clock
TIT20TO: Up/down counter output
TO00: Timer output
TO50, TO51: Timer output
TOH0: Timer output
TW0TO0 to TW0TO5: Timer output
TW0TOFFP: Timer output off
TxD00: Transmit data
V
DD: Power supply
VSS: Ground
X1, X2: Crystal oscillator (X1 input clock)
RTP10 to RTP15: Real-time output port
User’s Manual U16928EJ2V0UD
19
1.5 Block Diagram
CHAPTER 1 OUTLINE
TW0TO0 to TW0TO5
TW0TOFFP/P00
TIT20CLR/TIT20CC1/
TIT20CUD/TIT20CC0/P56
TIT20TO/P57
TIT20IUD/P55
TO00/TI001/P54
TI000/P53
TI50/TO50/P50
TI51/TO51/P51
TOH0/P52
RTP00/P40 to RTP07/P47
RTP10 to RTP15
10-bit INVERTER
6
CONTROL TIMER
W0
16-bit UP/DOWN
COUNTER
ITENC20
16-bit TIMER/
EVENT COUNTER 00
8-bit TIMER/
EVENT COUNTER 50
8-bit TIMER/
EVENT COUNTER 51
8-bit TIMER
WATCH TIMER
WATCHDOG TIMER
8
REAL-TIME
OUTPUT PORT
6
H0
78K/0
CPU
CORE
FLASH
MEMORY
PORT 0
PORT 1
PORT 2
PORT 3
PORT 4
PORT 5
PORT 6
PORT 7
BUZZER OUTPUT
CLOCK OUTPUT
CONTROL
POWER ON CLEAR/
LOW VOLTAGE
INDICATOR
RESET CONTROL
4
P00 to P03
8
P10 to P17
8
P20 to P27
4
P30 to P33
8
P40 to P47
8
P50 to P57
4
P64 to P67
4
P70 to P73
BUZ/P30
PCL/P31
POC/LVI
CONTROL
RxD00/P13
TxD00/P14
SI10/P16
SO10/P17
SCK10/P15
ADTRG/P03
ANI0/P20 to
ANI7/P27
AV
REF
AV
INTP0/P00 to
INTP3/P03
INTP4/P52,
INTP5/P53
INTP6/P55,
INTP7/P56
INTERNAL
HIGH-SPEED
RAM
INTERNAL
OSCILLATOR
SERIAL
INTERFACE UART0
SERIAL
SYSTEM
CONTROL
RESET
X1
X2
INTERFACE CSI10
8
A/D CONVERTER
SS
4
INTERRUPT
2
CONTROL
2
MULTIPLIER &
DIVIDER
VDD,
EV
VSS,
FLMD0,
SS
DD
EV
FLMD1
20
User’s Manual U16928EJ2V0UD
CHAPTER 1 OUTLINE
1.6 Outline of Functions
Item
Flash memory (self-
memory
programming supported)
High-speed RAM 1 KB
Memory space 64 KB
X1 input clock (oscillation frequency) Ceramic/crystal/external clock oscillation
Internal oscillation clock (oscillation
frequency)
General-purpose registers
Minimum instruction execution time
Instruction set
I/O ports
32 KB Internal
[20 MHz (V
DD = 4.0 to 5.5 V)]
Internal oscillator (240 kHz (TYP.))
8 bits × 32 registers (8 bits × 8 registers × 4 banks)
0.1 μs/0.2 μs/0.4 μs/0.8 μs/1.6 μs (X1 input clock: @ fXP = 20 MHz operation)
8.3 μs/16.6 μs/33.2 μs/66.4 μs/132.8 μs (TYP.) ( Internal oscillation clock: @ fR = 240
kHz (TYP.) operation)
• 16-bit operation • Multiply/divide (8 bits × 8 bits, 16 bits ÷ 8 bits)
• Bit manipulate (set, reset, test, and Boolean operation) • BCD adjust, etc.
Total: 48
μ
PD78F0714
<R>
CMOS I/O 40
CMOS input 8
Timers • 10-bit inverter control timer: 1 channel
• 16-bit up/down counter: 1 channel
• 16-bit timer/event counter: 1 channel
• 8-bit timer/event counter: 2 channels
• 8-bit timer: 1 channel
• Watchdog timer: 1 channel
Timer outputs 11 (inverter control output: 6)
Clock output 156.25 kHz, 312.5 kHz, 625 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz, 20MHz
(X1 input clock: 20 MHz)
Buzzer output 2.44 kHz, 4.88 kHz, 9.77 kHz, 19.5kHz (X1 input clock: 20 MHz)
Real-time output ports
• 8 bits × 1 or 4 bits × 2
• 6 bits × 1 or 4 bits × 2
A/D converter
10-bit resolution × 8 channels
Serial interface • UART mode: 1 channel
• 3-wire serial I/O mode: 1 channel
Multiplier/divider
• 16 bits × 16 bits = 32 bits (multiplication)
• 32 bits ÷ 16 bits = 32 bits remainder of 16 bits (division)
Internal Non-maskable: 1, Maskable: 19 Vectored
interrupt sources
Reset
External 8
• Reset using RESET pin
• Internal reset by watchdog timer
• Internal reset by power-on-clear
• Internal reset by low-voltage detector
Supply voltage VDD = 4.0 to 5.5 V
T
Operating ambient temperature
Package
A = −40 to +85°C
64-pin plastic TQFP (fine pitch) (12 × 12)
User’s Manual U16928EJ2V0UD
21
An outline of the timer is shown below.
10-Bit Inverter
Control Timer
Operation
mode
Function
Interval timer 1 channel 1 channel 1 channel 1 channel 1 channel 1 channel
External
event counter
Timer output 6 outputs 1 output 1 output 1 output 1 output 1 output
PPG output
PWM output 6 outputs 1 output
Pulse width
measurement
Square-wave
output
Watchdog
Timer
Interrupt
source
−
− −
− −
−
− − − − − −
4 4 2 1 1 1
CHAPTER 1 OUTLINE
16-Bit Up/down
Counter
ITENC20
1 channel 1 channel 1 channel 1 channel
1 output 1 output 1 output 1 output 1 output
16-Bit Timer/
Event Counter
00
1 output
−
2 inputs
8-Bit Timer/
Event Counters
50 and 51
TM50 TM51
− − − −
1 output 1 output 1 output
− − − −
8-Bit Timer
Watchdog
H0
− −
Timer
1 channel
−
−
−
−
−
22
User’s Manual U16928EJ2V0UD
CHAPTER 2 PIN FUNCTIONS
2.1 Pin Function List
There are three types of pin I/O buffer power supplies: AVREF, EVDD, and VDD. The relationship between these
power supplies and the pins is shown below.
Table 2-1. Pin I/O Buffer Power Supplies
Power Supply Corresponding Pins
AVREF P20 to P27
EVDD Port pins other than P20 to P27
VDD Pins other than port pins
(1) Port pins (1/2)
Pin Name I/O Function After Reset Alternate Function
P00 INTP0/TW0TOFFP
P01 INTP1
P02 INTP2
P03
P10
P11
P12
P13 RxD00
P14 TxD00
P15 SCK10
P16 SI10
P17
P20 to P27 Input Port 2.
P30 BUZ
P31 PCL
P32
P33
P40 to P47 I/O Port 4.
I/O Port 0.
4-bit I/O port.
Input/output can be specified in 1-bit units.
Use of an on-chip pull-up resistor can be specified by a
software setting.
I/O Port 1.
8-bit I/O port.
Input/output can be specified in 1-bit units.
Use of an on-chip pull-up resistor can be specified by a
software setting.
8-bit input-only port.
I/O Port 3.
4-bit I/O port.
Input/output can be specified in 1-bit units.
Use of an on-chip pull-up resistor can be specified by a
software setting.
8-bit I/O port.
Input/output can be specified in 1-bit units.
Use of an on-chip pull-up resistor can be specified by a
software setting.
Input
INTP3/ADTRG
Input
SO10/FLMD1
Input ANI0 to ANI7
Input
Input RTP00 to RTP07
−
−
−
−
−
User’s Manual U16928EJ2V0UD
23
CHAPTER 2 PIN FUNCTIONS
(1) Port pins (2/2)
Pin Name I/O Function After Reset Alternate Function
P50 TI50/TO50
P51 TI51/TO51
P52 TOH0/INTP4
P53 TI000/INTP5
24
User’s Manual U16928EJ2V0UD
CHAPTER 2 PIN FUNCTIONS
(2) Non-port pins (1/2)
Pin Name I/O Function After Reset Alternate Function
INTP0 P00/TW0TOFFP
INTP1 P01
INTP2 P02
INTP3 P03/ADTRG
INTP4 P52/TOH0
INTP5 P53/TI000
INTP6 P55/TIT20IUD
INTP7
SI10 Input Serial data input to serial interface Input P16
SO10 Output Serial data output from serial interface Input P17/FLMD1
SCK10 I/O Clock input/output for serial interface Input P15
RxD00 Input Serial data input to asynchronous serial interface Input P13
TxD00 Output Serial data output from asynchronous serial interface Input P14
TW0TOFFP Input External input to stop 10-bit inverter control timer output Input P00/INTP0
TW0TO0TW0TO5
TIT20IUD External count clock input to 16-bit up/down counter P55/INTP6
TIT20CUD Count operation switching input to 16-bit up/down counter P56/TIT20CC0
TIT20CC0 P56/TIT20CUD
TIT20CC1
TIT20CLR
TIT20TO Output Pulse signal output of 16-bit up/down counter Input P57/TIT20CLR
TI000 External count clock input to 16-bit timer/event counter 00
TI001
TO00 Output 16-bit timer/event counter 00 output Input P54/TI001
TI50 External count clock input to 8-bit timer/event counter 50 P50/TO50
TI51
TO50 8-bit timer/event counter 50 output P50/TI50
TO51 8-bit timer/event counter 51 output P51/TI51
TOH0
Input External interrupt request input for which the valid edge (rising
edge, falling edge, or both rising and falling edges) can be
specified
Output 10-bit inverter control timer output Output RTP10-RTP15
Input
External capture trigger input to 16-bit up/down counter
External clear input to 16-bit up/down counter
Input
Capture trigger input to capture registers (CR000, CR010) of
16-bit timer/event counter 00
Capture trigger input to capture register (CR000) of 16-bit
timer/event counter 00
Input
External count clock input to 8-bit timer/event counter 51
Output
8-bit timer H0 output
Input
Input
Input
Input
Input
P56/TIT20CC0
/TIT20CUD
/INTP7
/INTP7
P57/TIT20CLR
/TIT20TO
P57/TIT20CC1
/TIT20TO
/TIT20CC1
P53/INTP5
P54/TO00
P51/TO51
P52/INTP4
User’s Manual U16928EJ2V0UD
25
CHAPTER 2 PIN FUNCTIONS
(2) Non-port pins (2/2)
Pin Name I/O Function After Reset Alternate Function
PCL Output Clock output (for trimming of X1 input clock) Input P31
BUZ Output Buzzer output Input P30
RTP00 to
RTP07
RTP10 to
RTP15
ADTRG Input A/D converter trigger input Input P03/INTP3
ANI0 to ANI7 Input A/D converter analog input Input P20 to P27
AVREF Input A/D converter reference voltage input and positive power supply
AVSS
RESET Input System reset input
X1 Input
X2
VDD
EVDD
VSS
EVSS
FLMD0
FLMD1 Input
Output Real-time output port 0 output Input P40 to P47
Output Real-time output port 1 output Output TW0TO0 to
TW0TO5
− −
for port 2
−
A/D converter ground potential. Make the same potential as
SS or VSS.
EV
Connecting resonator for X1 input clock oscillation
−
−
Positive power supply (except for ports)
−
Positive power supply for ports
−
Ground potential (except for ports)
−
Ground potential for ports
− − −
Flash memory programming mode setting
− −
− −
− −
− −
− −
− −
− −
− −
Input P17/SO10
26
User’s Manual U16928EJ2V0UD
CHAPTER 2 PIN FUNCTIONS
2.2 Description of Pin Functions
2.2.1 P00 to P03 (port 0)
P00 to P03 function as a 4-bit I/O port. These pins also function as external interrupt request input, timer output
stop external signal, and A/D converter trigger input.
The following operation modes can be specified in 1-bit units.
(1) Port mode
P00 to P03 function as a 4-bit I/O port. P00 to P03 can be set to input or output in 1-bit units using port mode
register 0 (PM0). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 0 (PU0).
(2) Control mode
P00 to P03 function as external interrupt request input, timer output stop external signal, and A/D converter
trigger input.
(a) INTP0 to INTP3
These are the external interrupt request input pins for which the valid edge (rising edge, falling edge, or both
rising and falling edges) can be specified. INTP2 also functions as an external trigger signal input pin of the
real-time output port when a valid edge is input.
(b) TW0TOFFP
This is an external input pin to stop timer output (TW0TO0 to TW0TO5).
(c) ADTRG
This is an external trigger signal input pin of the A/D converter.
2.2.2 P10 to P17 (port 1)
P10 to P17 function as an 8-bit I/O port. These pins also function as pins for serial interface data I/O, clock I/O,
and flash memory programming mode setting.
The following operation modes can be specified in 1-bit units.
(1) Port mode
P10 to P17 function as an 8-bit I/O port. P10 to P17 can be set to input or output in 1-bit units using port mode
register 1 (PM1). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 1 (PU1).
(2) Control mode
P10 to P17 function as serial interface data I/O and clock I/O.
(a) SI10
This is a serial interface serial data input pin.
(b) SO10
This is a serial interface serial data output pin.
(c) SCK10
This is a serial interface serial clock I/O pin.
(d) RxD00
This is the serial data input pin of the asynchronous serial interface.
User’s Manual U16928EJ2V0UD
27
(e) TxD00
This is the serial data output pin of the asynchronous serial interface.
(f) FLMD1
This pin sets the flash memory programming mode.
2.2.3 P20 to P27 (port 2)
P20 to P27 function as an 8-bit input-only port. These pins also function as pins for A/D converter analog input.
The following operation modes can be specified in 1-bit units.
(1) Port mode
P20 to P27 function as an 8-bit input-only port.
<R>
Caution Use P20 to P27 at EV
(2) Control mode
P20 to P27 function as A/D converter analog input pins (ANI0 to ANI7). When using these pins as analog input
pins, see (5) ANI0/P20 to ANI7/P27 in 15.6 Cautions for A/D Converter.
2.2.4 P30 to P33 (port 3)
P30 to P33 function as a 4-bit I/O port. These pins also function as pins for clock output, and buzzer output.
The following operation modes can be specified in 1-bit units.
(1) Port mode
P30 to P33 function as a 4-bit I/O port. P30 to P33 can be set to input or output in 1-bit units using port mode
register 3 (PM3). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 3 (PU3).
(2) Control mode
P30 to P33 function as clock output, and buzzer output pins.
(a) BUZ
This is a buzzer output pin.
(b) PCL
This is a clock output pin.
Caution Be sure to pull down P31 after reset to prevent malfunction.
Remark The P31 and P32 pins of the
CHAPTER 2 PIN FUNCTIONS
DD = AVREF when using them in the port mode.
μ
PD78F0714 can be used to set the on-chip debug mode when the
on-chip debug function is used. For details, see CHAPTER 26 ON-CHIP DEBUG FUNCTION.
28
User’s Manual U16928EJ2V0UD
CHAPTER 2 PIN FUNCTIONS
2.2.5 P40 to P47 (port 4)
P40 to P47 function as an 8-bit I/O port. These pins also function as real-time output port pins.
The following operation modes can be specified.
(1) Port mode
P40 to P47 function as an 8-bit I/O port. P40 to P47 can be set to input or output in 1-bit units using port mode
register 4 (PM4). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 4 (PU4).
(2) Control mode
P40 to P47 function as the pins for the real-time output port (RTP00 to RTP07) that outputs data in
synchronization with a trigger.
2.2.6 P50 to P57 (port 5)
P50 to P57 function as an 8-bit I/O port. These pins also function as external interrupt request input and timer I/O.
The following operation modes can be specified.
(1) Port mode
P50 to P57 function as an 8-bit I/O port. P50 to P57 can be set to input or output in 1-bit units using port mode
register 5 (PM5). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 5 (PU5).
(2) Control mode
P50 to P57 function as the pins for the external interrupt request input and timer I/O.
(a) INTP4 to INTP7
These are the external interrupt request input pins for which the valid edge (rising edge, falling edge, or both
rising and falling edges) can be specified.
(b) TI50, TI51
These are the pins for inputting an external count clock to 8-bit timer/event counter 50 and 51.
(c) TO50, TO51
These are timer output pins from 8-bit timer/event counters 50 and 51.
(d) TI000
This is the pin for inputting an external count clock to 16-bit timer/event counters 00 and is also for inputting a
capture trigger signal to the capture registers (CR00, CR01).
(e) TI001
This is the pin for inputting a capture trigger signal to the capture register (CR00) of 16-bit timer/event
counters 00.
(f) TO00, TOH0
These are timer output pins from 16-bit timer/event counter 00 and 8-bit timer H0.
(g) TIT20IUD
This is the pin for inputting an external count clock to 16-bit up/down counter ITENC20.
(h) TIT20IUD
This is the pin for inputting an count operation switching signal to 16-bit up/down counter ITENC20.
User’s Manual U16928EJ2V0UD
29
CHAPTER 2 PIN FUNCTIONS
(i) TIT20CLR
This is the pin for inputting a clear signal to 16-bit up/down counter ITENC20.
(j) TIT20CC0, TIT20CC1
These are the pins for inputting an external capture trigger to 16-bit up/down counter ITENC20.
(k) TIT20TO
This is a 16-bit up/down counter ITENC20 output pin.
2.2.7 P64 to P67 (port 6)
P64 to P67 function as a 4-bit I/O port. P64 to P67 can be set to input port or output port in 1-bit units using port
mode register 6 (PM6).
Use of an on-chip pull-up resistor can be specified for P64 to P67 by pull-up resistor option register 6 (PU6).
2.2.8 P70 to P73 (port 7)
P70 to P73 function as a 4-bit I/O port. P70 to P73 can be set to input or output in 1-bit units using port mode
register 7 (PM7). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 7 (PU7).
2.2.9 TW0TO0/RTP10 to TW0TO5/RTP15
These are 10-bit inverter control timer output pins.
And, these pins function also as real-time output port pins.
2.2.10 AV
REF
This is the A/D converter reference voltage input pin.
When the A/D converter is not used, connect this pin directly to EV
DD or VDD
Note
.
Note Connect port 2 directly to EV
DD when it is used as a digital port.
2.2.11 AV
SS
This is the A/D converter ground potential pin. Even when the A/D converter is not used, always use this pin with
the same potential as the EV
SS pin or VSS pin.
2.2.12 RESET
This is the active-low system reset input pin.
2.2.13 X1 and X2
These are the pins for connecting a resonator for the X1 input clock.
When supplying an external clock, input a signal to the X1 pin and input the inverse signal to the X2 pin.
Remark The X1 and X2 pins of the product with an on-chip debug function (part number pending) can be used to
set the on-chip debug mode when the on-chip debug function is used. For details, see CHAPTER 26
ON-CHIP DEBUG FUNCTION.
2.2.14 V
DD and EVDD
DD is the positive power supply pin for other than ports.
V
EV
DD is the positive power supply pin for ports.
30
User’s Manual U16928EJ2V0UD
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