NEC America, Inc. reserves the right to change the
specifications, functions, or features, at any time, without notice.
NEC America, Inc. has prepared this document for use by its
employees and cus tomers. The info rmation conta ined herein is
the property of N EC America, In c. and shall n ot be reproduc ed
without prior written approval from NEC America, Inc.
LIST OF TA BLESND-70182 (E)
Page viii
Revision 4.0
CHAPTER 1INTRODUCTION
1. General
This manual provides the circuit card description for the NEAX2400 IMX system.
This manual is for those persons who are involved in the system setup and administration activities for the
NEAX2400 IMX. For each circuit card the following items are explained:
•General function
•Slot to mount the circuit card
•Precautions for mounting the card
•Location of the electronic devices on the card surface
•Description of the LED
•Description of the switches
•Physical interface
The circuit cards explained in this manual are divided into two categories, the Control Circuit Cards and the
Line/Trunk Circuit Cards. You can easily define the card category by the pull tab color of the circuit card.
•Control Circuit Card
White or red pull tab circu it cards are ca tegorized as con trol circuit car d. Also, the c ircuit cards in the
Central Processor Rack (CPR) have white or red pull tabs.
•Line/Trunk Circuit Ca rd
Blue or yellow pull tab circuit cards are categorized as line/trunk circuit cards.
Note:
This manual is inten ded to desc ribe only t he basic l ine/tru nk interf ace circuit cards of the NEAX2400 IMX.
When you use circuit cards not shown in this manual, you may refer to the NEAX2400 ICS Circuit Card
Manual with the following changes:
•The line/trunk circuit card shown in the above mentioned manual is compatible with NE A X2400 I MX ;
however, the exceptions are PA-CS02-C (2AT1) and PA-CS08B (H/MATI).
•The external appearanc e of PIM U (which is the st anda rd port interface mod ule of NEAX2400 IMX) is
the same as the PIM J of the NEAX2400 ICS.
•The PCM highway running in PIM is different. More details are explained in this manual’s section on
PH-PC36 (M U X ).
ND-70182 (E)CHAPTER 1
Page 1
Revision 4.0
INTRODUCTION
Mounting Location of Circuit Card
2. Mounting Location of Circuit Card
The control circuit cards for the 1 IMG system should be mounted in their dedicated slots, as shown in Figure
1-1. The control circuit cards for the 4 IMG system should be mounted in their dedicated slots, as shown in
Figure 1-2 through Figure 1-2. The control circuit cards for the IMX-U system should be mounted in their
dedicated slots as shown in Figure 1-3 through Figure 1-3.
As a general rule, the blue pull tab line/trunk circuit cards are mounted in the universal slots that are located in
Slots 04 - 12 and 15 - 23 of the Port Interface Module (PIM).
The yellow pull tab line/trunk circuit cards (MIS C) are mounte d in Slots 00 - 02 of the LPM.
Additional GT/LANI cards are mounted in the CPR.
Figure 1-3 Card Mounting Slot for the IMX-U System (5/5)
CHAPTER 1ND-70182 (E)
Page 12
Revision 4.0
CHAPTER 2CONTROL CIRCUIT CARD REFERENCE
This chapter ex plains the following items fo r each Control C ircuit Card.
•General Function
Explains the general function and purpose of each control circuit card.
•Mounting Location/Condition
Explains the mounting loca tion (mounting module name and slot number , etc.) fo r each circuit card. If there
are any conditions pertaining to mounting the circuit cards, they are also explained.
•Face Layout of Lamps, Switches, and Connectors
The locations of the lamps, switche s, and conne ctors pro vided on ea ch circu it car d are illust rate d by a fac e
layout.
•Lamp Indications
The names, colors, and indication states of lamps mounted on each circuit card are listed.
•Switch Settings
Each circuit card's switches are listed with their names, switch numbers, their setting and its meaning,
standard setting, etc.
•External Inte rface
If the lead outputs of the circuit card are provided by an LT connector, the relation between the mounting
slots and the LT connectors is illustrated by an LT Connector Lead Face Layout. If the lead outputs are
provided by other than an LT connector, or are provided by the circuit card front connector, the connector
lead locations and the connecting routes are shown.
In addition, a Switch Setting Sheet, which may be used to record the switch settings, is provided at the end of
the explanation for each circ uit card.
ND-70182 (E)CHAPTER 2
Page 13
Revision 4.0
SN1374 CPRP-A
CPU Board
SN1374 CPRP-A
CPU Board
1.General Function
The Central Pr o cessing Rack ( CPR) consists o f the following components.
(a) CPU BOARD: Contains the Main Processor Unit (MPU), R OM, a nd 128 Mbyte of Random Acces s
(b) DSP: Contains the CPR switches and the CPR status indicator lamps.
(c) FDD/HDD: Floppy Disk Drive (FDD) and Hard Disk Drive (HDD) are mounted on a circuit
(d) PWR: Supplies the operating power to the CPR, and also the MISC slots of the LPM.
Memory (RAM). Also, this board may be equipped with the ISAGT (PZ-GT16) on
its Industrial St andard Architecture (ISA) and LANI (PZ-PC19) on the Peripheral
Component Interconnect (PCI).
card, which can be extracted and/or inserted while the system is in operation, if
required.
To HUB
To HUB
To I/O local bus
LANI
DSP
CPULANI
CPR#0
ISAGTISAGT
To MISC bus
DSP
CPULANI
CPR#1
LANI
Figure 2-1 Location of SN1374 CPRP-A (CPR) in the System
To HUB
To HUB
CHAPTER 2ND-70182 (E)
Page 14
Revision 4.0
SN1374 CPRP-A
CPU Board
2.Mounting Location/Condition
The CPR is composed of a CPU BO ARD, DSP, FDD/HDD and PWR, and is l ocated in the Loca l Processor
Module (LPM) as shown below. Since the CPR provides the Industry Standard Architecture (ISA) bus and
Peripheral Component Interconnect (PCI) bus, the GT and LANI cards are located in those busses
respectively.
Mounting Module
PIM0
LPM
CPR
LPM
BSCM
PZ-GT16 (ISAGT)
PZ-PC19 (LANI)
PZ-PW92 (PWR)
Figure 2-2 CPR Location
PT-2200 (CPU BOARD)
PZ-DK224 (DSP)
PZ-IO27(FDD/HDD)
ND-70182 (E)CHAPTER 2
Page 15
Revision 4.0
SN1374 CPRP-A
CPU Board
3.Face Layout of Lamps, Switches and Connectors
The CPR has the following lamps, switches and connectors.
Slot numbers 0-3 provide the Peripheral Component Interconnect (PCI) bus, and slot numbers 4-6 are the
Industrial Standard Architecture (ISA) bus.
PWR (PZ-PW92)
FDD/HDD (PZ-IO27)DSP (PZ-DK224)
PZ-PW92
DC-40V~-58.6V
SW
I
O
-48V OUT
OUTPWR
INPWR
ON
OFF
5A
125V
AC/DC
PALM
ON
ALM
HDD
CPU OPE
MBR
ON
GT1
SYSTEM SELECT0STATUS
ON
14
SYSTEM SELECT1
ON
112
SYSTEM SELECT2
ON
1320
WDT
GT0
GT2
GT3
SENSE
CPURST
SLOT NO.0123456
AB
Figure 2-3 Front View of CPR
CHAPTER 2ND-70182 (E)
Page 16
Revision 4.0
4.Lamp Indications
LAMP NAMECOLORDESCRIPTION
ON (PWR)GreenLights green when the PWR is supplied.
ALM (PWR)RedLights red when the PWR is abnormal.
HDD
(HDD)
RedLights red while the HDD is being accessed.
SN1374 CPRP-A
CPU Board
WDT
(DSP)
CPU OPE
(DSP)
IMG0
(DSP)
IMG1 (DSP)GreenNot used.
IMG2 (DSP)GreenNot used
IMG3 (DSP)GreenNot used
RedLights red when Watch-dog Timer (WD T) time-out has occurred.
GreenLights green when the CPU is in active state.
Lights green when PZ-GT16 (located in Slot 6) is in active state.
Green
Flashes green when PZ-GT16 (located in Slot 6) is in stand-by state
ND-70182 (E)CHAPTER 2
Page 17
Revision 4.0
SN1374 CPRP-A
CPU Board
LAMP
NAME
STATUS
(DSP)
DESCRIPTION
Two sets of “7-segment LED” show the CPR processing status. The CPR processing status is determined by
the Sense switch settings, and the new processing status starts when the CPURST button is pressed. The 7segment LED indication on each CPR processing status is listed belo w.
SENSE
1
2
3Not used“c”“c” indicated when copying the dat a from FD to HD
4Not used“d”“d” indicated whil e mak i ng the directory on the HD
STATUS
LEFTRIGHT
“F”
Not used
Not used“1”
“0-9”“0-9”
Not used
Not used
“c”
“d”
“S”
“b”
“y”
“1”
1. When Program Install
The HD in the CPR initializes and the program installs. (These processes
execute)
“F” indicated during HD format.
“c” indicated when copyin g dat a from FD
“d” indicated while creating the directory on the HD
2. When Program Load
After program installation, th e prog ram should b e transferre d from the HD to
the memory.
“1” indicated during this process.
3. On-line active CPR
The active CPR in ON LINE status indi cate s th e CPU occupanc y rate in
percentages (00-99%)
4. On-line stand-by CPR
The stand-by CPR in ON LINE status indicates “S,” “b,” “y”
5. Program & Office data load
“0”
“1” indicated during the Program and Office data transfer from the HD to
memory
“0” indicated during the Office data load.
DESCRIPTION
The CPR is starting-up with ON LINE (OAI memory clear restart).
5Not used
6Not used“F”“F” indi cated during HD format.
CN ot used “H”
“1”
“0”
“1” indicated during the Program load.
“0” indicated during the process.
The CPR is starting-up with OFF LINE.
“H” indicated during the ROM data loading.
Note:
The segment spinning indication shows a processing status has completed successfully, or “E” means the
processing failed.
Segment Spinning Indication
CHAPTER 2ND-70182 (E)
Page 18
Revision 4.0
5.Switch Settings
SN1374 CPRP-A
CPU Board
SWITCH
NAME
SW
(PWR)
MB Note
(FDD/HDD)
MBR
(DSP)
CPURST——
SYSTEM
SELECT0
(DSP)
SWITCH
NO.
—
—
—
1OFF ×Not used
2OFF ×Not used
3OFF ×Not used
4
1
SETTING
ON (Up)Make-busy of the FDD/HDD.
OFF (Down)×Normal setting
ON (Up)
OFF (Down)×Normal setting
STANDARD
SETTING
ON×PWR is supplied to the CPR.
OFFPWR is not supplied to the CPR.
Make-busy Request of the CPR in which GT is
located.
Execute the CPR processing according to the
SENSE setting.
ONWatchdog Timer time-out is not detected.
OFF×Watchdog Timer time-out is detected.
ONPCI Card (Slot 0) MBR ON
OFFPCI Card (Slot 0) MBR OFF
MEANING
SYSTEM
SELECT1
SYSTEM
SELECT2
Note:
2
ONPCI Card (Slot 1) MBR ON
OFFPCI Card (Slot 1) MBR OFF
ONPCI Card (Slot 2) MBR ON
OFFPCI Card (Slot 2) MBR OFF
ONPCI Card (Slot 3) MBR ON
(DSP)
3
4
OFFPCI Card (Slot 3) MBR OFF
5~8OFF×Fixed to “OFF.”
1~8OFF×Not used
(DSP)
Make-busy of this circuit card is not allowed while the Floppy Disk Drive or Hard Disk Drive is being
accessed.
ND-70182 (E)CHAPTER 2
Page 19
Revision 4.0
SN1374 CPRP-A
CPU Board
SWITCH
NAME
SENSE
Note
Note:
The SENSE switch designates the CPR processing status. The new processing status starts when the
CPRRST switch on the DSP is pressed while setting the SENSE switch.
6.External Interface
See the NEAX2400 IMX Installation Manual.
SETTING
STANDARD
SETTING
MEANING
The following three processes are executed at the FDD/HDD.
1
•HD format
•File copied from FDD to HD
•Directory created on the HD
2On-line mode
3File copied from FDD to HD in the FDD/HD
4The directory created on the HD of the FDD/HDD
5
OAI memory cleared, and the CPR started up in ON LINE mode b y
loading the ROM data
6HD format of the FDD/HDD
CThe CPR starts up in OFF LINE mode by loading the ROM data.
7.Switch Setting Sheet
SWITCH NAMESWITCH S HAPEREMARKS
SW
(PWR)
MB
(FDD/HDD)
MBR
(DSP)
NMI-SEL
SYSTEM
SELECT0
(DSP)
1 2 3
ON
OFF
ON
ON
ON
ON
4
CHAPTER 2ND-70182 (E)
Page 20
Revision 4.0
SWITCH NAMESWITCH S HAPEREMARKS
SN1374 CPRP-A
CPU Board
SYSTEM
SELECT1
(DSP)
SYSTEM
SELECT2
(DSP)
SENSE
(DSP)
1 2 3
1
2 3
4
4
5 6 7
5
6 7
ON
8
ON
8
ND-70182 (E)CHAPTER 2
Page 21
Revision 4.0
SN1401 CPRAC-A
CPU Board
SN1401 CPRAC-A
CPU Board
1.General
The CPR consists of the following components.
(a) CPU BOARD: Contains the Main Processor Unit (MPU), R OM, a nd 128 Mbyte of Random Acces s
(b) DSP:Contains the CPR switches and the CPR status indicator lamps.
(c) FDD/HDD: Floppy Disk Drive (FDD) and Hard Disk Drive (HDD) are mounted on a circuit
(d) PWR: Supplies the operating power to the CPR and also the MISC slots of the LPM.
Memory (RAM). Additionally, this board may be equipped with the ISAGT (PZGT13) on its Industrial Standard Architecture (ISA) bus, and LANI (PZ-PC19) on
the Peripheral Component Interconnect (PCI).
card, which can be extracted and/or inserted while the system is in operation, if
necessary.
To HUB
To HUB
To I/O loc al bus
DSP
CPU
LANI
LANI
LANI
LANI
DSP
CPU
ISAGT
To MISC bus
ISAGT
Figure 2-4 Location of SN1401 CPRAC-A (CPR) in the System
To HUB
To HUB
CHAPTER 2ND-70182 (E)
Page 22
Revision 4.0
SN1401 CPRAC-A
CPU Board
2.Mounting Location/Condition
The CPR is composed of the CPU BOARD, DSP, FDD/HDD, and PWR and is located in the Local
Processor Module (LPM) as shown below. Since the CPR provides the Industrial Standard Architecture
(ISA) bus and Peripheral Component Interconnect (PCI) bus, the GT and LANI cards are located in those
busses respectively.
PIM0
BSCM
LPM
CPR
PZ-PC19 (LANI)
PZ-PW92 (PWR)
PZ-GT13 (ISAGT)
CPU BOARD
PZ-DK224 (DSP)
PZ-IO27(FDD/HDD)
Figure 2-5 CPR Location
ND-70182 (E)CHAPTER 2
Page 23
Revision 4.0
SN1401 CPRAC-A
CPU Board
3.Face Layout of Lamps, Switches, and Connectors
The CPR has the following lamps, switches and connectors.
Slots 0-3 provide the Peripheral Component Interconnect (PCI) bus, and Slots 4-6 are the Industrial
Standard Architecture (ISA) bus.
PWR(PZ-PW92)
FDD/HDD(PZ-IO27)DSP(PZ-DK224)
PZ-PW92
DC-40V~-58.6V
SW
I
O
-48V OUT
OUTPWR
INPWR
ON
OFF
5A
125V
AC/DC
PALM
ON
ALM
HDD
CPU OPE
MBR
ON
IMG1
SYSTEM SELECT0STATUS
ON
14
SYSTEM SELECT1
ON
112
SYSTEM SELECT2
ON
1320
WDT
IMG0
IMG2
IMG3
SENSE
CPURST
SLOT NO.0123456
AB
Figure 2-6 Front View of CPR
4.Lamp Indications
LAMP NAMECOLORDESCRIPTION
ON (PWR)GreenLights green when the PWR is supplied.
ALM (PWR)RedLights red when the PWR is abnormal.
HDD
(FDD/HDD)
WDT (DSP)RedLights red when Watch-dog Timer (WDT) time-out has occurs.
CPU OPE (DSP)GreenLights green when the CPU is in active state.
IMG0 (DSP)Green
IMG1 (DSP)GreenFlashes green when IMG1 is mounted. Note
IMG2 (DSP)GreenFlashes green when IMG2 is mounted. Note
IMG3 (DSP)GreenFlashes green when IMG3 is mounted. Note
Note:
No lamp indication in STBY mode.
RedLights red while the HDD or FDD is being accessed.
Lights green when PZ-GT13 (located in Slot 6) is in active state.
Flashes green when PZ-GT13 (located in Slot 6) is in stand-by state.
CHAPTER 2ND-70182 (E)
Page 24
Revision 4.0
SN1401 CPRAC-A
CPU Board
LAMP
NAME
STATUS
(DSP)
DESCRIPTION
T w o set of “7-segment LED” sho ws the CPR processing status. The CPR processing status is determined by the
SENSE switch settin gs, and the new process ing status starts when t he CPURST switch is press ed. The 7-segment
LED indication on each CPR processing status is listed below.
SENSE
1
2
3Not used“c”“c” indicated during copy the data from FD to HD
4Not used“d”“d” indicated while making the directory on the HD
5Not used
6Not used“F”“F” indicated during HD format.
CNot used “H”
STATUS
LEFTRIGHT
“F”
Not used
Not used“1”
“0-9”“0-9”
Not used
Not used
“c”
“d”
“S”
“b”
“y”
“1”
“1”
1. When Program Install
The HD in the CPR initializes and the program is installed. (These processes ex-
ecute)
“F” indicated during HD format.
“c” indicated when copying the data from FD to HD
“d” indicated while creating the directory on the HD
2. When Program Load
After the program installation, the program should b e transferred from the HD to
the memory.
“1” indicated during this process.
3. On-line active CPR
The active CPR which is in ON LINE status indicates the CPU occupancy rate in
percentages. (00-99%)
4. On-line stand-by CPR
The stand-by CPR which is in ON LINE status indicates “S,” “b,” “y”
5. Program & Office data load
“0”
“0”
“1” indicated during the Program and Office data transferred from the HD to
the memory
“0” indicated during the Office data load
The CPR is starting-up with ON LINE (OAI memory clear restart).
“1” indicated during the Program load.
“0” indicated during the process.
The CPR is starting-up with OFF LINE.
“H” indicated during the ROM data loading.
DESCRIPTION
Note:
The segme nt spinni ng indi cation shows a processing status has completed successful ly, or else “E” means
the processing failed.
Segment Spinning Indication
ND-70182 (E)CHAPTER 2
Page 25
Revision 4.0
SN1401 CPRAC-A
CPU Board
5.Switch Settings
SWITCH NAME
SW
(PWR)
Note
MB
(FDD/HDD)
MBR
(DSP)
CPURST——
SYSTEM
SELECT0
(DSP)
SWITCH
NO.
—
—
—
1OFF ×Not used
2OFF ×Not used
3OFF ×Not used
4
1
SETTING
ON×PWR is supplied to the CPR.
OFFPWR is not supplied to the CPR.
ON (Up)Make-busy of the FDD/HDD.
OFF (Down)×Normal setting.
ON (Up)
OFF (Down)×Normal setting.
ONWatchdog Timer time-out is not detected.
OFF×Watchdog Timer time-out is detected.
ONPCI Card (Slot 0) MBR ON
OFFPCI Card (Slot 0) MBR OFF
STANDARD
SETTING
MEANING
Make-busy Request of the CPR in which the
GT is located.
Execute the CPR processing according to the
SENSE setting.
Note:
ONPCI Card (Slot 1) MBR ON
OFFPCI Card (Slot 1) MBR OFF
ONPCI Card (Slot 2) MBR ON
OFFPCI Card (Slot 2) MBR OFF
ONPCI Card (Slot 3) MBR ON
OFFPCI Card (Slot 3) MBR OFF
SYSTEM
SELECT1
(DSP)
SYSTEM
SELECT2
(DSP)
2
3
4
5~8OFF×Fixed to “OFF.”
1~8OFF×Not used
Make-busy of this circuit card is not allowed while the Floppy Disk Drive or Hard Disk Drive is being
accessed.
CHAPTER 2ND-70182 (E)
Page 26
Revision 4.0
SN1401 CPRAC-A
CPU Board
SWITCH
NAME
SETTING
SENSE
Note
Note:
The SENSE switch designates the CPR processing status. The new processing status starts when the
CPRRST switch on the DSP is pressed while setting the SENSE switch.
6.External Interface
See the NEAX2400 IMX Installation Manual.
STANDARD
SETTING
MEANING
The following three process are executed at the FDD/HDD.
1
•HD format
•File copied from FDD to HD
•Directory created on the HD
2×On line mode.
3File copied from FDD to HD within the FDD/HDD.
4Directory created on the HD of the FDD/HDD.
5
OAI memory clear, and the CPR starts up in ON LINE mode by loading the
ROM data.
6HD format of the FDD/HDD.
CThe CPR starts up in OFF LINE mode by loading the ROM data.
7.Switch Setting Sheet
SWITCH NAMESWITCH SHAPEREMARKS
SW
(PWR)
MB
ON
OFF
ON
(FDD/HDD)
MBR
ON
(DSP)
NMI-SEL
ON
SYSTEM
1
2 3 4
ON
SELECT0
SYSTEM
1
5
2 3
6 7
4
ON
8
SELECT1
SYSTEM
1 2 3
4
5 6 7
ON
8
SELECT2
SENSE
ND-70182 (E)CHAPTER 2
Page 27
Revision 4.0
PH-GT09
Gate
PH-GT09
Gate
1.General Function
The PH-GT09 (GT) circuit card provides both the TSW I/O Local bus and the MISC bus interface. The
CPR controls TSW, PLO, DLKC, and MISC via the ISAGT and GT.
TDSW I/O
Local Bus
PLO0
TDSW03
TDSW02
PLO1
TDSW13
TDSW I/O
Local Bus
TDSW12
TDSW11
To HUB
To HUB
LANI
TDSW01
TDSW00
CPULANI
CPR #0
DLKC0
DSP
ISAGT
MISC Bus
GT
MISC Bus
MISC
EMA
GT
ISAGT
MISC Bus
DLKC1
DSP
TDSW10
CPU
CPR #1
LANI
LANI
To HUB
To HUB
IOC/
MISC
Figure 2-7 Location of PH-GT09 (GT) Card in the System
CHAPTER 2ND-70182 (E)
Page 28
Revision 4.0
2.Mounting Location/Condition
This circuit card is mounted in the TSWM of the slot shown below.
PH-GT09
Gate
Mounting Module
00 01 02 03 04 05 06 07 08 09
TSWM
10 11 12 13 14 15 16 17 18 19 20 21 22 23
GT1
GT0
3.Face Layout of Lamps, Switches, and Connectors
The face layout of lamps, switches, and connector s is shown in Figure 2-8.
OPE/MB
Figure 2-8 Face Layout of PH-GT09 (GT)
MB
MBR
ND-70182 (E)CHAPTER 2
Page 29
Revision 4.0
PH-GT09
Gate
4.Lamp Indications
Lamp indications for this circuit card are shown in the table below.
LAMP NAMECOLORSTATE
OPE/MBGreenRemains lit while this circuit card is in ACT state.
5.Switch Settings
Standard settings for switches on this circuit card are shown in the table below.
SWITCH
NAME
MB
MBR
Note
Note:
SETTING
UPMake-busy of circuit card
DOWN×Normal setting
UP
DOWN×Normal setting.
Prior to extracting the GT card, flip the MBR switch on and then flip the MB switch on.
STANDARD
SETTING
MEANING
When the ACT side of GT’s MBR switch is flipped, the ST - BY side of
TSW, DLKC, and GT is forced to switch over the ACT side. (When the
TSW is dual configuration.)
6.External Interface
See the NEAX2400 IMX Installation Manual.
7.Switch Setting Sheet
SWITCH NAMESWITCH SHAPEREMARKS
MB
ON
MBR
CHAPTER 2ND-70182 (E)
Page 30
Revision 4.0
ON
SN1455 CPRAQ-A/SN1531 CPRAS-A
CPU Board
1.General Function
The CPR consists of the following components.
(a) CPU BOARD: Contains the Main Processor Unit (MPU), R OM, a nd 128 Mbyte of Random Acces s
Memory (RAM). This board may also contain the ISAGT (PZ-GT13/PZ-GT20) on
its Industrial Standard Architecture (ISA) bus, and LANI (PZ-PC19) on the
Peripheral Component Interconnect (PCI).
(b) DSP:Contains the CPR switches and the CPR status indicator lamps.
(c) FDD/HDD: Floppy Disk Drive (FDD) and Hard Disk Drive (HDD) are mounted on a circuit
card, which , if necessar y, can be extracted and/or inserted while the system is in
operation.
(d) PWR: Supplies the operating power to the CPR and also the MISC slots of the LPM.
SN1455 CPRAQ-A/SN1531 CPRAS-A
CPU Board
To HUB
To HUB
To I/O local bus
HDD
FDD
LANI
LANI
Figure 2-9 Location of SN1455 CPRAQ-A/SN1531 CPRAS-A (CPR)
DSP
CPUCPU
CPR#0CPR#1
ISAGTISAGT
To MISC bus
DSP
HDD
FDD
LANI
LANI
To HUB
To HUB
ND-70182 (E)CHAPTER 2
Page 31
Revision 4.0
SN1455 CPRAQ-A/SN1531 CPRAS-A
CPU Board
2.Mounting Location/Condition
The CPR is composed of the CPU BOARD, DSP, FDD/HDD, and PWR and is located in the Local
Processor Module (LPM) as shown in Figure 2-10. Since the CPR provides the Industrial Standard
Architecture (ISA) bu s and Perip heral Component Interconne ct (PCI) b us, the ISAGT and LANI cards are
located in those busses respectively.
ISWM/PIM0
LPM
BSCM
Note:
PZ-GT20 (ISAGT) Note
CPR
PZ-PW92 (PWR)
PZ-PC19 (LANI)
PZ-DK224 (DSP)
PZ-IO27(FDD/HDD)
This card is mounted in the IMG0 of the IMX-U system only.
Figure 2-10 CPR Location
PZ-PC19
(LANI)
PZ-GT13
(ISAGT)
CPU BOARD
CHAPTER 2ND-70182 (E)
Page 32
Revision 4.0
SN1455 CPRAQ-A/SN1531 CPRAS-A
CPU Board
3.Face Layout of Lamps, Switches, and Connectors
The CPR contains the following lamps, switches and connectors.
Slots 0-3 provide the Peripheral Component Interconnect (PCI) bus, and Slots 4-6 are the Industrial
Standard Architecture (ISA) bus.
PWR(PZ-PW92)
FDD/HDD(PZ-IO27)DSP(PZ-DK224)
PZ-PW92
DC-40V~-58.6V
SW
I
O
-48V OUT
OUTPWR
INPWR
5A
125V
AC/DC
ON
OFF
ALM
PALM
ON
HDD
WDT
CPU OPE
MBR
ON
IMG1
IMG2
SYSTEM SELECT0STATUS
ON
14
SYSTEM SELECT1
ON
112
SYSTEM SELECT2
ON
1320
SENSE
CPURST
IMG0
IMG3
SLOT NO.0123456
AB
Note
Note:
This card is mounted in the IMG0 of the IMX-U sys te m only.
Figure 2-11 Front View of CPR
4.Lamp Indications
Lamp Indications va ry depending on the node. The following shows the lamp indications for the CPR in
the IMG.
LAMP NAMECOLORDESCRIPTION
ON (PWR)GreenLights green when the PWR is supplied.
ALM (PWR)RedLights red when the PWR is abnormal.
HDD
(FDD/HDD)
WDT (DSP)RedLights red when Watch-dog Timer (WDT) time-out has occurred.
CPU OPE (DSP)GreenLights green when the CPU is in active state.
CPU OPE (DSP)GreenLights green when the CPU is in active state.
RedLights red while the HDD or FDD is being accessed.
ND-70182 (E)CHAPTER 2
Page 33
Revision 4.0
SN1455 CPRAQ-A/SN1531 CPRAS-A
CPU Board
LAMP NAMECOLORDESCRIPTION
IMG0 (DSP)GreenFlashes green when PZ-GT13 (located in slot number 6) is in operation.
IMG1 (DSP)GreenFlashes green when IMG1 is mounted. Note
IMG2 (DSP)GreenFlashes green when IMG2 is mounted. Note
IMG3 (DSP)GreenFlashes green when IMG3 is mounted. Note
Note:
No lamp indication in STBY mode.
The following shows the lamp indication for the CPR in the ISW
LAMP NAMECOLORDESCRIPTION
ON (PWR)GreenLights green when the PWR is supplied.
ALM (PWR)RedLights red when the PWR is abnormal.
HDD (FDD/HDD)RedLights red while the HDD or FDD is being accessed.
WDT (DSP)RedLights red when Watch-dog Ti mer (WDT) time-out has occu rred.
CPU OPE (DSP)GreenLights green when the CPU of the ISW is in active state.
IMG0 (DSP)Green
IMG1 (DSP)GreenLights green when the TSW1 of the ISW is used. Note
IMG2 (DSP)GreenLights green when the TSW2 of the ISW is used. Note
IMG3 (DSP)GreenLights green when the TSW3 of the ISW is used. Note
Note:
No lamp indication in STBY mode.
Lights green when the CPU of the ISW is in active state.
Flashes green when the CPU of the ISW is in stand-by state.
CHAPTER 2ND-70182 (E)
Page 34
Revision 4.0
SN1455 CPRAQ-A/SN1531 CPRAS-A
CPU Board
LAMP
NAME
STATUS
(DSP)
DESCRIPTION
Two sets of “7-segment LED” sho w the CPR pro cessing s tatus. The CPR p rocessing status is determined by th e
SENSE switch settin gs, and the new process ing status starts when t he CPURST switch is press ed. The 7-segment
LED indication on each CPR processing status is listed below.
SENSE
1
2
3Not used“c”“c” indicated when copying the data from FD to HD
4Not used“d”“d” indicated while making th e dir e c to r y on the HD
5Not used
6Not used“F”“F” indicated during HD format.
CNot used “H”
STATUS
LEFTRIGHT
“F”
Not used
Not used“1”
“0-9”“0-9”
Not used
Not used
“c”
“d”
“S”
“b”
“y”
“1”
“1”
1. When Program Install
The HD in the CPR is initialized and the program is installed. (Th ese three
processes execute)
“F” indicated during HD format.
“c” indicated when copying data from FD to HD
“d” indicated while making the directory on the HD
2. When Program Load
After program installation, the program should be transfe rred from th e HD
to memory.
“1” is indicated during this process.
3. On-line active CPR
The active CPR which is in ON LINE status indicates the CPU occupancy
rate by percentage. (00-99%)
4. On-line stand-by CPR
The stand-by CPR which is in ON LINE status indicates “S,” “b,” “y”
5. Program & Office data load
“0”
“0”
“1” indicated during the Program and Office data transfer from the HD to
the memory
“0” indicated during the Office data load
The CPR is starting-up with ON LINE (OAI memory clear restart).
“1” indi cat ed during the Program load.
“0” indi cat ed duri ng the process.
The CPR is starting-up OFF LINE.
“H” indicated during the ROM data loading.
DESCRIPTION
Note:
The segment spinning indication shows a processing status has completed successfully, or indicates “E”
meaning the processing failed.
Segment Spinning Indication
ND-70182 (E)CHAPTER 2
Page 35
Revision 4.0
SN1455 CPRAQ-A/SN1531 CPRAS-A
CPU Board
5.Switch Settings
SWITCH NAME
SW
(PWR)
Note
MB
(FDD/HDD)
MBR
(DSP)
CPURST
(DSP)
SYSTEM
SELECT0
(DSP)
SWITCH
NO.
—
—
—
——
1OFF×Not used
2OFF×Not used
3OFF×Not used
4
1
SETTING
ON×PWR is supplied to the CPR.
OFFPWR is not supplied to the CPR.
ON (Up)Make-busy of the FDD/HDD.
OFF (Down)×Normal setting.
ON (Up)
OFF (Down)×Normal setting.
ONWatchdog Timer time-out is not detected.
OFF×Watchdog Timer time-out is detected.
ONPCI Card (Slot 0) MBR ON.
OFFPCI Card (Slot 0) MBR OFF.
STANDARD
SETTING
MEANING
Make-busy Request of the CPR in which GT is
located.
Execute the CPR processing according to the
SENSE setting.
Note:
ONPCI Card (Slot 1) MBR ON.
OFFPCI Card (Slot 1) MBR OFF.
ONPCI Card (Slot 2) MBR ON.
OFFPCI Card (Slot 2) MBR OFF.
ONPCI Card (Slot 3) MBR ON.
OFFPCI Card (Slot 3) MBR OFF.
ONIMX-U System
OFF1 IMG/4 IMG System
SYSTEM
SELECT1
(DSP)
SYSTEM
SELECT2
(DSP)
2
3
4
5~7OFF×Fixed to “OFF.”
8
1~8OFF×Not used
Make-busy of this circuit card is not allowed while the Floppy Disk Drive or Hard Disk Drive is being
accessed.
CHAPTER 2ND-70182 (E)
Page 36
Revision 4.0
SN1455 CPRAQ-A/SN1531 CPRAS-A
CPU Board
SWITCH
NAME
SENSE
(DSP)
Note
Note:
SETTING
1
2×On-line mode.
3File copied from FDD to HD within the FDD/HDD.
4Directory created on the HD of the FDD/HDD.
5
6HD format of the FDD/HDD.
CThe CPR starts up in OFF LINE mode by loading the ROM data.
STANDARD
SETTING
MEANING
The following three processes are executed at the FDD/HDD.
•HD formatted
•File copied from FDD to HD
•Directory created on the HD
OAI memory cleared, and the CPR star ted up in ON LINE mode by loading
the ROM data.
The SENSE switch designates the CPR processing status. The new processing status starts when the
CPRRST switch on the DSP is pressed while setting the SENSE switch.
ND-70182 (E)CHAPTER 2
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Revision 4.0
SN1455 CPRAQ-A/SN1531 CPRAS-A
CPU Board
6.External Interface
See the NEAX2400 IMX Installation Manual.
7.Switch Setting Sheet
SWITCH NAMESWITCH SHAPEREMARKS
SW
(PWR)
MB
(PWR:PZ-PW106)
MB
(FDD/HDD)
MBR
(DSP)
SYSTEM
SELECT0
(DSP)
SYSTEM
SELECT1
(DSP)
SYSTEM
SELECT2
(DSP)
SENSE
(DSP)
1
1
1
2 3 4
2 3 4
2 3 4
5
5
6 7 8
6 7 8
ON
OFF
ON
ON
ON
ON
ON
ON
CHAPTER 2ND-70182 (E)
Page 38
Revision 4.0
PH-GT10
Input Output Gate
1.General Function
The PH-GT10 circuit card provides the TSW I/O bus interface for permitting the CPU board to cont rol the
TSW, HSW, and PLO cards within the Inter-node Switch Module (ISWM) of the ISW. Additionally, this
circuit card is equipped with the copy function to be consistent with the data of TSW I/O bus in both
systems (single/dual). This circuit card is used for the IMX-U system.
PH-GT10
Input Output Gate
ISWM
RESRES
LANI
LANI
HSW01
HSW00
TSW03
TSW02
TSW01
TSW00
PLO 1
PLO 0
(IOGT1)
PH-GT10
ISAGT BUSISAGT BUS
ISAGT
(IOGT0)
PH-GT10
MISC
IOC
EMA
MISC I/O BUS
RES
CPUCPU
HSW11
HSW10
TSW13
TSW12
TSW11
TSW10
TSW I/O BUSTSW I/O BUS
RES
ISAGT
LPM
LANI
LANI
Figure 2-12 Location of PH-GT10 (IOGT)
ND-70182 (E)CHAPTER 2
Page 39
Revision 4.0
PH-GT10
Input Output Gate
2.Mounting Location/Condition
This circuit card can be mounted in the shaded slots shown below.
3.Face Layout of Lamps, Switches, and Connectors
The face layout of lamps, switches, and connectors are shown in Figure 2-13.
OPE/MB
MB
MBR
Figure 2-13 Face Layout of PH-GT10 (IOGT)
CHAPTER 2ND-70182 (E)
Page 40
Revision 4.0
PWRALM
CA4L
COPY
4.Lamp Indications
The contents of lamp indications on this circuit card are shown in the table below.
LAMP NAMECOLORMEANING
GreenLights when this circuit card is in ACT state.
PH-GT10
Input Output Gate
TSW ACT
PWRALMRedLights when On-B oard P ower Supply for this circuit card is abnormal.
CA4LRedLights when 4MHz clock supplied for Local I/O Bus is faulty.
COPYGreenLights when this circuit card is in COPY mode.
OFFThis circuit card is in ST-BY state.
RedLights when this circuit card is in make-busy state.
5.Switch Settings
Standard settings of switches on this circuit card are shown in the table below.
SWITCH
NAME
MB
MBR
SETTING
UPCircuit Card make busy
DOWN×Circuit Card make busy cancel
UPMake busy request
DOWN×Make busy request cancel
STANDARD
SETTING
MEANING
6.External Interface
See the NEAX2400 IMX Installation Manual.
7.Switch Setting Sheet
SWITCH NAMESWITCH SHAPE
MB
MBR
ON
ON
Note:
Note:
Normal operating mode is down.
Normal operating mode is down.
ND-70182 (E)CHAPTER 2
Revision 4.0
Page 41
PA-PC94
Data Link Multiplexer
PA-PC94
Data Link Multiplexer
1.General Function
This circui t card mai nly provide s the two fun ctions : 1) collec tion of BL F/TGBL in forma tion (ass ociated
with Attendant/Desk Console operation) from DLKC cards of all nodes in an IMX-U system, and 2)
distributi on of the col lected dat a to ATI cards o f all nodes . While a DLKC car d can manage t his proces sing
solely on an accommodated node basis, the use of this card makes possible the BLF/TGBL management
even on a system basis, via the Inter-node Switch (ISW). Note that this card is mounted in a PIM of any
node, and if necessary, can have an optional dual configuration.
For details on BLF/TGBL information, refer to the following service features explained in the “Feature
Programming Manual”.
•Busy Lamp Field-Flexible [B-2]
•Trunk Group Busy Lamp [T-9]
This figure shows an example where a pair o f DLMX cards (No. 0/No. 1 system) is accommodated in a PIM of LN0.
IMX-U System
LN 0
(DLMX 1)
OUT
Note
DLMX 0
IN
ATI
(DLKC 1)
DLKC 0
: Circuit Card
: Circuit Card (No. 1 System)
: BLF/TGBL data from DLKC
: BLF/TGBL data to ATI
: BLF/TGBL data from DLKC
(No. 1 system)
: BLF/TGBL data to ATI
(No. 1 system)
BLF: Busy Lamp Field - Flexible
TGBL: Trunk Group Busy Lamp
(TSW 1)(TSW 1)
TSW 0TSW 0
ISW
TSW/HSW 1
TSW/HSW 0
(TSW 1)
TSW 0
(TSW 1)
TSW 0
LN 1
ATI
(DLKC 1)
DLKC 0
LN 2
ATI
(DLKC 1)
DLKC 0
LN 3
ATI
(DLKC 1)
DLKC 0
Note:IN - DLMX card gathers BLF/TGBL informa tion from DLKC card of each node, via ISW.
OUT - DLMX card sends the collected BLF/TGBL information to ATI card(s) of each node, via ISW.
Figure 2-14 Location of PA-PC94 (DLMX)
CHAPTER 2ND-70182 (E)
Page 42
Revision 4.0
2.Mounting Location/Condition
When this circuit car d is used in a si ngl e configuration.
Mount this circuit card in any of the shaded slots
Mounting conditions of this circuit card are as follows:
1. A pair of DLMX card No. 0/No. 1 systems must be mounted in the same Highway Block (HW).
2. This circuit card cannot be mounted in 32-port slot (10, 11,12, 21, 22, 23) .
3. This card is used in odd-number group (G) of the shaded slots above.
4. To use this card, be sure to assign “RT=938” on the ASDT command.
ND-70182 (E)CHAPTER 2
Page 43
Revision 4.0
PA-PC94
Data Link Multiplexer
3.Face Layout of Lamps and Switches
The face layout of lamps and switches is shown in Figure 2-15.
OPE
MB KEY
LYR
LB
LOAD
ACT
PWALM
MNT
MODE
Figure 2-15 Face Layout of PA-PC94 (DLMX)
4.Lamp Indications
The contents of lamp indications on this circuit card are shown in the table below:
LAMP NAMECOLORSTATE
OPEGreenRemains lit while this circuit card is in normal operation.
ACT
LYROFFOff when this circuit card is in normal operation.
LBOFFOff when this circuit card is in normal operation.
LOADOFFOff when this circuit card is in normal operation.
PWALMRedLights when OBP alarm
CHAPTER 2ND-70182 (E)
Page 44
Revision 4.0
GreenLights when this circuit card is in a active state.
OFFOff when this circuit card is in a stand-by state.
5.Switch Settings
Standard settings of switches on this circuit card are shown in the table below.
PA-PC94
Data Link Multiplexer
SWITCH
NAME
SWITCH
No.
MB
0OFF×Fixed to OFF.
1OFF×Fixed to OFF.
MNT
2OFF×Fixed to OFF.
3
0×Standard setting. (TSW fixed connection)
MODE
1-7Not used
6.Switch Setting Sheet
SWITCH
NAME
MB
SWITCH SHAPEREMARKS
SETTING
STANDARD
SETTING
MEANING
UPCircuit card make-busy.
DOWNCircuit card make-busy cancel
ONMake-busy-request.
OFFCancel the make-busy-request.
ON
MNT
MODE
ON
3
2
1
0
0
ND-70182 (E)CHAPTER 2
Page 45
Revision 4.0
PA-PW54-A
Dual Pow er
PA-PW54-A
Dual Power
1.General Function
The PA-PW54-A (DPWR) c ir cuit ca rd suppli es ope ra ti ng power to circuit cards located in the PIM. The
-48 V input power source, which is converted to +5 V, -5 V, and +12 V, is distributed to each circuit card in
the PIM. This card also has a Ringing Generator Unit (RG U ), whose output frequency and voltage can be
selected from 20 Hz, 25 Hz, 75 Vrms, 90 Vrms by switch setting on this card. In addition, a Howler Tone
circuit resides on this card.
PA-PW55-A (PWR)
HOW
REL
DC-DC
RGU
SUB
PWR
NFB
+5V, +12V, -5V
CR (For LC)
HOW (For LC)
-48 V (For LC, TRK)
+80 V (For MWL)
PA-PW54-A (DPWR)
DC-DC
RGU
HOW
SUB
PWR
NFB
REL
-48 V
Note:
The +80V input is required for activating Message Waiting Lamps (MWLs) .
Figure 2-16 Location of PA-PW54-A (DPWR) Card in the System
CHAPTER 2ND-70182 (E)
Page 46
Revision 4.0
+80V (Option)
Note
2.Mounting Location/Conditions
This circui t card is mounted in the following slot.
3.Face Layout of Lamps, Switches, and Connectors
The face layout of lamps, switches, and connec tor s o n this circuit card is shown in Figure 2-17.
SW4
-48V SW
-48V
DC
INPUT
+80VOUT
5A
125V
AC/DC
5.0
A
PAPW54
-A
U
P
( )
-48VSW-48V
CONN
IN
FUSE
FUSE
SIDE VIEW
Figure 2-17 Face Layout of PA-PW54-A (DPWR) Card
MB
0.5
A
RST
RGUOUT
0.5A
125V
AC/DC
HOW ALM
25A
+80V ON
-48V ON
RGU ON
DC ON
OPE
CPU ALM
DC ALM
RGU ALM
-48VOUT
AC250V
DC125V
FRONT VIEW
25A
CHAPTER 2ND-70182 (E)
Page 48
Revision 4.0
4.Lamp Indications
Lamp indications for this circuit card are shown in the table below.
LAMP NAMECOLORSTATE
+80V ONGreenRemains lit while +80 V input power is being supplied.
–48 V ONGreenR emai ns lit while –48 V input power is being supplied.
RGU ONGreenRemains lit whil e RGU output is in progress.
DC ONGreenRemains lit while +5 V, +12 V, and –5 V are being output normally.
OPEGreenLights when information exchange with the CPU is possible.
CPUALMRedLights when reset of the microprocessor has been activated.
DCALMRedLights when +5 V, +12 V, or –5 V outputs alarm.
RGUALMRedLights when RGU voltage alarm.
HOWALMRedLights when howler alarm.
5.Switch Settings
PA-PW54-A
Dual Power
This circuit card has the fo llowing switches.
SWITCH
NAME
–48V SW—
RESET—
MB—
SW4
SWITCH
No.
1
2
6.External Interface
No cable connections are required.
SETTING
ON×–48 V input power is supplied.
OFF–48 V input power is not supplied.
PUSHHardware reset of the circuit card.
—×Normal setting.
ONMake-busy of the circuit card.
OFF×Normal setting.
ONFrequency of Ringing Signal: 25 [Hz]
OFF×Frequency of Ringing Signal: 20 [Hz]
ON×Voltage of Ringing Signal: 90 [Vrms]
OFFVoltage of Ringing Signal: 75 [Vrms]
STANDARD
SETTING
DESCRIPTION
ND-70182 (E)CHAPTER 2
Page 49
Revision 4.0
PA-PW54-A
Dual Pow er
7.Switch Setting Sheet
SWITCH
NAME
–48 V
RESET
MBDOWNCircuit card Make-busy cancel
SWITCH SHAPEREMARKS
1
2
ON
SW4
20 [Hz]
90 [Vrms]
CHAPTER 2ND-70182 (E)
Page 50
Revision 4.0
PA-PW54-B
Dual Power
1.General Function
The PA-PW54-B (DPWR) circuit ca rd supplies operating po wer to ci rcuit cards accommodated in the PIM.
The -48V input power source, which is conver ted to +5V, -5V, and +12V, is distributed to each circui t card
in the PIM. This card is also equipped with a Ringing Generator Unit (RGU), whose output frequenc y and
voltage ca n be sel ected among 20Hz, 25Hz, 75Vrms, 90Vrms by s witch setting on this ca rd. In addition, a
Howler Tone circuit resides on this card.
PA-PW54-B
Dual Power
PA-PW55-B (PWR)
REL
DC-DC
RGU
HOW
SUB
PWR
NFB
+5V, +12V, -5V
CR (For LC)
HOW (For LC)
-48 V (For LC, TRK)
+80 V (For MWL)
PA-PW54-B (DPWR)
DC-DC
RGU
HOW
SUB
PWR
NFB
REL
Note:
-48 V
+80V (Option)
Note
The +80V input is required for activating Message Waiting Lamps (MWLs).
Figure 2-18 Location of PA-PW54-B (DPWR) Card within the System
ND-70182 (E)CHAPTER 2
Page 51
Revision 4.0
PA-PW54-B
Dual Pow er
2.Mounting Location/Conditions
This circui t card is mounted in the following slot.
3.Face Layout of Lamps, Switches, and Connectors
The face layout of lamps, switches, and connec tor s o n this circuit card is shown in Figure 2-19.
-48V
-48VSW-48V
DC
SW4
-48V SW
INPUT
+80VOUT
125V
AC/DC
CONN
5A
5.0
A
PAPW54
- B
U
P
( )
IN
PA-PW54-B
Dual Power
FUSE
FUSE
SIDE VIEW
Figure 2-19 Face Layout of PA-PW54-B (DPWR) Card
MB
0.5
A
RST
RGUOUT
-48VOUT
0.5A
125V
AC250V
AC/DC
DC125V
+80V ON
-48V ON
RGU ON
DC ON
OPE
CPU ALM
DC ALM
RGU ALM
HOW ALM
FRONT VIEW
25A
20A
ND-70182 (E)CHAPTER 2
Page 53
Revision 4.0
PA-PW54-B
Dual Pow er
4.Lamp Indications
The contents of lamp indications on this circuit card are shown in the table below.
LAMP NAMECOLORSTATE
+80V ONGreenRemains lit while +80 V input power is being supplied.
–48 V ONGreenRemains lit while –48 V input power is being supplied.
RGU ONGreenRemains lit while RGU output is in progress.
DC ONGreenRemains lit while +5 V, +12 V, and –5 V are being output normally .
OPEGreenLights when information exchange with the CPU is possible.
CPUALMRedLights when reset of the microprocessor has been activated.
DCALMRedLights in the case of +5 V, +12 V, or –5 V outputs alarm.
RGUALMRedLights in the case of RGU voltage alarm.
HOWALMRedLights in the case of howler alarm.
5.Switch Settings
This circuit card has the fo llowing switches.
SWITCH
NAME
–48V SW—
RESET—
MB—
SW4
SWITCH
No.
1
2
6.External Interface
No cable connections are required.
SETTING
ON×–48V input power is supplied.
OFF–48V input power is not supplied.
PUSHHardware reset of the circuit card.
—×Normal setting
ONMake busy of the circuit card.
OFF×Normal setting
ONFrequenc y of Ringing Signal: 25 [Hz]
OFF×Frequency of Ringing Signal: 20 [Hz]
ON×Voltage of Ri nging Signal: 90 [Vrms]
OFFVoltage of Ringing Signal: 75 [Vrms]
STANDARD
SETTING
DESCRIPTION
CHAPTER 2ND-70182 (E)
Page 54
Revision 4.0
7.Switch Setting Sheet
PA-PW54-B
Dual Power
SWITCH
NAME
–48 V
RESET
MBDOWNCircuit card make busy cancel
SW4
SWITCH SHAPEREMARKS
20 [Hz]
90 [Vrms]
ON
1
2
ND-70182 (E)CHAPTER 2
Page 55
Revision 4.0
PA-PW55-A
Power
PA-PW55-A
Power
1.General Function
The PA-PW55-A (PWR) circuit card supplies operating po we r to circ uit car ds locat ed in the PIM. The -48
V input power source , which is converted to +5 V, -5 V, and +12 V, is distribut ed to ea ch circuit card in the
associated PIM. This card also has a Ringing Generator Unit (RGU), whose output frequency and voltage
can be selected fro m 20 Hz, 25 Hz, 75 Vrms, 90 Vrms by s witch s etting o n th is card. I n addi tion, a Howler
Tone circuit resides on this card.
PA-PW55-A (PWR)
DC-DC
HOW
REL
RGU
SUB
PWR
NFB
+5V, +12V, -5V
CR (For LC)
HOW (For LC)
-48 V (For LC, TRK)
+80 V (For MWL)
PA-PW54-A (DPWR)
DC-DC
RGU
HOW
SUB
PWR
NFB
REL
-48 V
Note:
The +80V input is r equired for activating Message Waiting Lamps (MWLs) .
Figure 2-20 Location of PA-PW55-A (PWR) Card in the System
CHAPTER 2ND-70182 (E)
Page 56
Revision 4.0
+80V (Option)
Note
2.Mounting Location/Conditions
This circui t card is mounted in the following slots.
3.Face Layout of Lamps, Switches, and Connectors
The face layout of lamps, switches, and connec tor s o n this circuit card is shown in Figure 2-21.
SW4
-48V SW
-48V
DC
INPUT
+80VOUT
5A
125V
AC/DC
5.0
A
PAPW55
-A
U
P
( )
-48VSW-48V
CONN
IN
FUSE
FUSE
SIDE VIEW
Figure 2-21 Face Layout of PA-PW55-A Card
MB
0.5
A
RST
RGUOUT
0.5A
125V
AC/DC
HOW ALM
25A
+80V ON
-48V ON
RGU ON
DC ON
OPE
CPU ALM
DC ALM
RGU ALM
-48VOUT
AC250V
DC125V
FRONT VIEW
25A
CHAPTER 2ND-70182 (E)
Page 58
Revision 4.0
4.Lamp Indications
Lamp indications for this circuit card are shown in the table below.
LAMP NAMECOLORSTATE
+80V ONGreenRemains lit while +80 V input power is being supplied.
–48 V ONGreenR emai ns lit while –48 V input power is being supplied.
RGU ONGreenRemains lit whil e RGU output is in progress.
DC ONGreenRemains lit while +5 V, +12 V, and –5 V are being output normally.
OPEGreenLights when information exchange with the CPU is possible.
CPUALMRedLights when reset of the microprocessor has been activated.
DCALMRedLights when +5 V, +12 V, or –5 V outputs alarm.
RGUALMRedLights when RGU voltage alarm.
HOWALMRedLights when howler alarm.
5.Switch Settings
PA-PW55-A
Power
This circuit card has the fo llowing switches.
SWITCH
NAME
–48 V SW
RESET
MB—
SW4
SWITCH
No.
1
2
6.External Interface
No cable connections are required.
SETTING
ON×–48 V input power is supplied.
OFF–48 V input power is not suppli e d.
PUSHHardware reset of the circuit card.
—×Normal setting
ONMake-busy of the circuit card.
OFF×Normal setting
ONFrequency of Ringing Signal: 25 [Hz]
OFF×Frequency of Ringing Signal: 20 [Hz]
ON×Voltage of Ringing Signal: 90 [Vrms]
OFFVoltage of Ringing Signal: 75 [Vrms]
STANDARD
SETTING
DESCRIPTION
ND-70182 (E)CHAPTER 2
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Revision 4.0
PA-PW55-A
Power
7.Switch Setting Sheet
SWITCH
NAME
–48 V
RESET
MBDOWNCircuit card Make-busy cancel.
SWITCH SHAPEREMARKS
12
ON
SW4
20 [Hz]
90 [Vrms]
CHAPTER 2ND-70182 (E)
Page 60
Revision 4.0
PA-PW55-B
Power
1.General Function
The PA-PW55-B (PWR) circuit card supplies operating power to circuit cards accommodated in the PIM.
The -48V input power source, which is conver ted to +5V, -5V, and +12V, is distributed to each circui t card
in the associat ed PIM. This card is al so equipped with a Ri nging Generator U nit (RGU), whose out put
frequency and voltage can be selected among 20Hz, 25 Hz, 75Vrms, 90Vrms by swi tch set ting on thi s card.
In addition, a Howler Tone circuit resides on this card.
PA-PW55-B
Power
PA-PW55-B (PWR)
REL
DC-DC
RGU
HOW
SUB
PWR
NFB
+5V, +12V, -5V
CR (For LC)
HOW (For LC)
-48 V (For LC, TRK)
+80 V (For MWL)
PA-PW54-B (DPWR)
DC-DC
RGU
HOW
SUB
PWR
NFB
REL
Note:
-48 V
+80V (Option)
Note
The +80V input is r equi red for activating Message Waiting Lamps (MWLs).
Figure 2-22 Location of PA-PW55-B (PWR) Card Within the System
ND-70182 (E)CHAPTER 2
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Revision 4.0
PA-PW55-B
Power
2.Mounting Location/Conditions
This circui t card is mounted in the following slots.
3.Face Layout of Lamps, Switches, and Connectors
The face layout of lamps, switches, and connec tor s o n this circuit card is shown in Figure 2-23.
-48V
-48VSW-48V
DC
SW4
-48V SW
INPUT
+80VOUT
125V
AC/DC
CONN
5A
5.0
A
PAPW55
-B
U
P
( )
IN
PA-PW55-B
Power
FUSE
FUSE
SIDE VIEW
Figure 2-23 Face Layout of PA-PW55-B Card
MB
0.5
A
RST
RGUOUT
-48VOUT
0.5A
125V
AC250V
AC/DC
DC125V
+80V ON
-48V ON
RGU ON
DC ON
OPE
CPU ALM
DC ALM
RGU ALM
HOW ALM
FRONT VIEW
25A
20A
ND-70182 (E)CHAPTER 2
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Revision 4.0
PA-PW55-B
Power
4.Lamp Indications
The contents of lamp indications on this circuit card are shown in the table below.
LAMP NAMECOLORSTATE
+80V ONGreenRemains lit while +80 V input power is being supplied.
–48 V ONGreenRemains lit while –48 V input power is being supplied.
RGU ONGreenRemains lit while RGU output is in progress.
DC ONGreenRemains lit while +5 V, +12 V, and –5 V are being output normally .
OPEGreenLights when information exchange with the CPU is possible.
CPUALMRedLights when reset of the microprocessor has been activated.
DCALMRedLights in the case of +5 V, +12 V, or –5 V outputs alarm.
RGUALMRedLights in the case of RGU voltage alarm.
HOWALMRedLights in the case of howler alarm.
5.Switch Settings
This circuit card has the fo llowing switches.
SWITCH
NAME
–48V SW
RESET
MB—
SW4
SWITCH
No.
1
2
6.External Interface
No cable connections are required.
SETTING
ON
OFF–48V input power is not supplied.
PUSHHardware reset of the circuit card.
—
ONMake busy of the circuit card.
OFF
ONFrequenc y of Ringing Signal: 25 [Hz]
OFF
ON
OFFVoltage of Ringing Signal: 75 [Vrms]
STANDARD
SETTING
×
×
×
×
×
DESCRIPTION
–48V input power is supplied.
Normal setting
Normal setting
Frequency of Ringi ng Sign al : 20 [Hz]
Voltage of Ringing Signal: 90 [Vrms]
CHAPTER 2ND-70182 (E)
Page 64
Revision 4.0
7.Switch Setting Sheet
PA-PW55-B
Power
SWITCH
NAME
–48 V
RESET
MBDOWNCircuit card make busy cancel
SW4
SWITCH SHAPEREMARKS
12
ON
20 [Hz]
90 [Vrms]
ND-70182 (E)CHAPTER 2
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Revision 4.0
PH-IO24
Input/Output Controller
PH-IO24
Input/Output Controller
1.General Function
The PH-IO24 (IOC) circuit card supplies the system with a serial interface, which conforms to RS-232C,
between external equipment such as the Maintenance Administration Terminal (MAT), Station Message
Detail Recording System (SMDR), Message Center Interface (MCI). Property Management System
(PMS). The relationship between the IOC card and the associated cards is as follows, when the CPU is
composed in a dual configuration.
Note:
Firmware SP-3290 IO24 LV2 PROG-A is required in the Hotel system for PMS and Ho tel Printer.
FDD/HDD #0
CPU
BOARD
#0
I/O
GT #1
Business
MAT
SMDR
MCI
MISC/IOC
IOC
for
MISC
EMA
Hotel Printer
GT #0
IOC
for
Hotel
PMS
MISC I/O BUS
CPU
BOARD
#1
I/O
FDD/HDD #1
Figure 2-24 Location of PH-IO24 (IOC) Card within the System
CHAPTER 2ND-70182 (E)
Page 66
Revision 4.0
2.Mounting Location/Condition
The IOC cards can be accommodated in the shaded slots (02, 03) as shown below.
PH-IO24
Input/Output Controller
Note:
When using Business system and Hotel system, prepare the circuit card for each system.
Mounting Module
00 01 02 03 04
IOC #1
IOC #0
LPM
3.Face Layout of Lamps, Switches and Connectors
The face layout of lamps, switches and connectors on this circuit ca rd is shown in Figure 2-25.
OPE
MB
MBR
IOC ALM
PORT0
PORT1
PORT2
SW50
PORT3
Figure 2-25 Face Layout of PH-IO24 (IOC) Card
ND-70182 (E)CHAPTER 2
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Revision 4.0
PH-IO24
Input/Output Controller
4.Lamp Indications
The table below shows lamp indications on this circuit card.
LAMP NAMECOLORDESCRIPTION
OPE/MBGreenThis circuit card is operating normally .
RedThis circuit card is placed in the make busy state.
IOC ALMRedClock down WDT alarm occurs to the microprocessor.
POR T 0 - PORT3RS-232C signal status indi cati on . n = port number (0-3)
SDnGreenSD:Send Data
RDnGreenRD:Receive Data
ERnGreenER:Equipment Ready
DRnGreenDR:Data Ready
CDnGreenCD:Carrier Detect
5.Switch Settings
The following is a brief description of the switches on this circuit card. When a switch has a standard set-
ting, it is indicated with “×” in the table below.
SWITCH
NAME
MB
MBR
SW50
SWITCH
NO.
SETTING
UPThe circuit card is placed into a make busy status.
DOWN
UPThe circuit card is placed into a make busy request status.
DOWN
ONThis circuit card is used as the extended I/O circuit card #1.
1
OFFThis circuit card is used as the extended I/O circuit card #0.
ON
2
OFF
ONFree Wheeling with ACK signal (For Hotel System Only).
2
OFF
STANDARD
SETTING
×
×
×
×
DESCRIPTION
Cancellation of Make Busy.
Cancellation of Make Busy Request.
Not used (For Busi nes s Sy stem O nl y).
Free Wheeling.
3
4
CHAPTER 2ND-70182 (E)
Page 68
Revision 4.0
ON
OFF
ON
OFF
×
Not used
Not used
×
Input/Output Controller
6.External Interface
As illustrated below , the “68PH S 2PORTS CA-A” cable is required to connect e xternal equipment such as
the MAT, SMDR, MCI and PRT.
Securely insert the connector of the 68PH S 2PORTS CA-A into the appropriate MISC connector. Refer to the table listed below.
RS-232C cable (Note 2)
MISC 3B/4B (Note 1)
Backplane
PH-IO24
(IOC)
AMPAMP
68PH S 2PORTS CA-A
Circuit #0
Circuit #1
TYP0TYP1
To RS-232C
Terminal
PH-IO24
Note 1:
The relationship between the MISC connectors and the mounting
slot of the IOC (PH-IO24) circuit card is shown below.
Mounting Slot
02
03
Note 2:
The type of cables varies depending on a connected terminal and/or
whether modems are used or not. More detailed information on the
connecting cables is explained in the “Installation Procedure
Manual”.
1.General Function
This circuit card controlled by CPU is used for line test of a subscriber’s line. Th e circuit card su pports to
send Howler Tone to ex t ernal test equipmen t, besides the circuit car d can detect or send various tones, and
send PB (DTMF) signal for automatic trunk test.
Note:
A system cannot send Howler Tone during line test. The number of available lines within the line test/automatic trunk test at the sam e time is only one.
TEL
TEL
PIM
LPRA
TEST
EQ
LTST
EXTENDED I/O BUS
LC
LC
EXTENDED I/O BUS
I
N
T
GT
EXGT
TSW
CPU
Figure 2-30 Location of PH-M16/PH-M23 (LTST) Card Within the System
CHAPTER 2ND-70182 (E)
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Revision 4.0
2.Mounting Location/Condition
The LTST circuit card can be accommodated in the shaded slots (00, 01, 02) as shown below:
1.General Function
The PH-PC36 (MUX) circuit card is an interface card for mounting line cir cui ts and/or trunks. In between
the CPR and the Port Microprocessor (PM) of the line/trunk circuit, this circuit card provides an interface
for PM control and management by the CPU. Lik ewi se in between the TSW and th e line circuit /trunks, this
circuit card pro vides an inter face for mult iplexi ng/de-multi plexing of voice Pu lse Code Modulat ion (PCM)
information and digital data information.
PH-PC36
Multiplexer
LC/TRK
PM
LC/TRK
PM
LC/TRK
PM
LC/TRK
PM
CPR
GT
TSW/INT/PLO
MUX
MUX
PCM HW
PM BUS
MUX
PCM HW
PM BUS
MUX
PCM HW
PM BUS
PCM HW
PM BUS
Figure 2-33 Location of PH-PC36 (MUX) Card in the 1 IMG System
ND-70182 (E)CHAPTER 2
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Revision 4.0
PH-PC36
Multiplexer
CPR 1
ISAGT
CPR 0
ISAGT
GT 0
DLKC 1
DLKC 0
GT 1
TDSW
13
TDSW
03
TDSW
12
TDSW
02
TDSW
11
TDSW
01
TDSW
10
TDSW
00
MUX
MUX
MUX
MUX
MUX
MUX
MUX
MUX
MUX
MUX
MUX
MUX
MUX
MUX
MUX
MUX
PCM HW
PM BUS
PCM HW
PM BUS
PCM HW
PM BUS
PCM HW
PM BUS
PCM HW
PM BUS
PCM HW
PM BUS
PCM HW
PM BUS
PCM HW
PM BUS
PCM HW
PM BUS
PCM HW
PM BUS
PCM HW
PM BUS
PCM HW
PM BUS
PCM HW
PM BUS
PCM HW
PM BUS
PCM HW
PM BUS
PCM HW
PM BUS
Line/Trunk PM
Line/Trunk PM
IMG 3
Line/Trunk PM
Line/Trunk PM
Line/Trunk PM
Line/Trunk PM
IMG 2
Line/Trunk PM
Line/Trunk PM
Line/Trunk PM
Line/Trunk PM
IMG 1
Line/Trunk PM
Line/Trunk PM
Line/Trunk PM
Line/Trunk PM
IMG 0
Line/Trunk PM
Line/Trunk PM
Figure 2-34 Location of PH-PC36 (MUX) Card in the 4 IMG System
CHAPTER 2ND-70182 (E)
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Revision 4.0
PH-PC36
Multiplexer
LN
LC/TRK
LC/TRK
LC/TRK
LC/TRK
LC/TRK
LC/TRK
LC/TRK
LC/TRK
DLKC0
PLO 0
MUX00
MUX01
MUX02
MUX03
TSW00
MUX
TSW01
TSW02
TSW03
TSW10
TSW11
TSW12
TSW13
MUX
MUX10
MUX11
MUX12
MUX13
LC/TRK
LC/TRK
LC/TRK
LC/TRK
DLKC1
PLO 1
LC/TRK
LC/TRK
LC/TRK
LC/TRK
ISW
HSW00
PLO 0
TSW00
TSW01
TSW02
TSW03
HSW01
HSW10
HSW11
TSW10
TSW11
TSW12
TSW13
Figure 2-35 Location of PH-PC36 (MUX) Card in the IMX-U System
ND-70182 (E)CHAPTER 2
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Revision 4.0
PH-PC36
Multiplexer
The PCM highway running is illustrated in the figure below. There are sixteen 2Mbps PCM highways
(HW0 - HW15) in the PIM. Each PCM highw ay runs from a card slot to the MUX ci rcuit card. For inst ance,
highway number zero (HW0) appears in Slot 04 and also Slot 05, thus the HW0 carries the PCM of the
Group 0, 1, 2 and 3.
Likewise, the HW6, 7, 14, 15 cover the Groups 24 through 31. However, the time slots of Groups 24 and
25 are exclusively used for the Speech Path Memory (SPM).
All highways in the PIM lea d to a MUX card, so 512 ti me s lot s (32 time slots per highw ay × 16 highw ays
= 512 time slots) of PCM are multiplexed/de-multiplexed at a MUX and sent/received to/from the TSW
circuit card across the 32.786Mbps of the Low Voltage Differential Signaling (LVDS).
Also the MUX card pro vides the PM bus in terf ace. The CPR con trols and a dministra tes the PM of th e line/
trunk circuit card via the TSW and the MUX.
In addition, this circuit card supports 3-P arty Conference (CFT) function and is equipped with eight circuit s
of 3-Party Conference. The CFT appear in time Slots 8 through 3 1 of the HW13 (Group 21 - 23).
Slot number of the PIM U-A
Group (G) number of the LENS
000102 0304050607 080910 11
PWR
(24)
Group 24 and 25 are used
for the SPM
HW6
PWR
01
23
45
HW0HW1HW2
(25)
2627
2829
HW7
3130
1011
89
12131415
HW4
HW3
67
16171819
8 circuits of CFTs
13141516 17181920212223
12
MUX#1
MUX#0
89
3031
11
10
HW11
20212223
HW5
5
3
67
2
4
4
HW9HW10
2829
HW15
01
HW8
2627
HW1
2Mbps (32 time slots) of PCM highway
1415
13
12
19
18
1617
HW12
23
22
21
20
HW13
Figure 2-36 PCM Highway Running
CHAPTER 2ND-70182 (E)
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Revision 4.0
2.Mounting Location/Condition
For the 1 IMG system, the PH-PC36 (MUX) card is mount ed in the PIM 1, 2, and 3.
For the 4 IMG system, the PH-PC36 (M UX) card is required in all PIMs.