January 1988
MM54HC365/MM74HC365 Hex TRI-STATEÉBuffer
MM54HC366/MM74HC366 Inverting Hex TRI-STATE Buffer
MM54HC367/MM74HC367 Hex TRI-STATE Buffer
MM54HC368/MM74HC368 Inverting Hex TRI-STATE Buffer
General Description
These TRI-STATE buffers are general purpose high speed
inverting and non-inverting buffers that utilize advanced silicon-gate CMOS technology. They have high drive current
outputs which enable high speed operation even when driving large bus capacitances. These circuits possess the low
power dissipation of CMOS circuitry, yet have speeds comparable to low power Schottky TTL circuits. All 4 circuits are
capable of driving up to 15 low power Schottky inputs.
The MM54/74HC366 and the MM54/74HC368 are inverting
buffers, where as the MM54/74HC365 and the MM54/
74HC367 are non-inverting buffers. The MM54/74HC365
and the MM54/74HC366 have two TRI-STATE control inputs (G1
and G2) which are NORed together to control all
Connection Diagrams Dual-In-Line Packages/Top Views
six gates. The MM54/74HC367 and the MM54/74HC368
also have two output enables, but one enable (G1
4 gates and the other (G2
All inputs are protected from damage due to static discharge by diodes to V
) controls the remaining 2 gates.
and ground.
CC
) controls
Features
Y
Typical propagation delay: 15 ns
Y
Wide operating voltage range: 2V –6V
Y
Low input current: 1 mA maximum
Y
Low quiescent current: 80 mA maximum (74 Series)
Y
Output drive capability: 15 LS-TTL loads
MM54HC365/MM54HC366/MM54HC367/MM54HC368/
MM74HC365/MM74HC366/MM74HC367/MM74HC368
Order Number MM54HC365 or MM74HC365
Order Number MM54HC367 or MM74HC367
TRI-STATEÉis a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
TL/F/5209
TL/F/5209– 1
Order Number MM54HC366 or MM74HC366
TL/F/5209– 3
Order Number MM54HC368 or MM74HC368
TL/F/5209– 2
TL/F/5209– 4
Absolute Maximum Ratings (Notes1&2)
Operating Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V
CC
)
DC Input Voltage (VIN)
DC Output Voltage (V
OUT
)
Clamp Diode Current (IIK,IOK)
DC Output Current, per pin (I
OUT
)
DC VCCor GND Current, per pin (ICC)
Storage Temperature Range (T
STG
b
b
)
b
0.5 toa7.0V
1.5 to V
CC
0.5 to V
CC
g
g
b
g
65§Ctoa150§C
a
1.5V
a
0.5V
20 mA
35 mA
70 mA
Supply Voltage (V
)26V
CC
DC Input or Output Voltage 0 V
(V
IN,VOUT
)
Operating Temp. Range (TA)
MM74HC
MM54HC
Input Rise or Fall Times
e
V
2.0V(tr,tf) 1000 ns
CC
e
V
4.5V 500 ns
CC
e
V
6.0V 400 ns
CC
Power Dissipation (PD)
(Note 3) 600 mW
S.O. Package only 500 mW
Lead Temp. (T
) (Soldering 10 seconds) 260§C
L
DC Electrical Characteristics (Note 4)
e
T
25§C
Symbol Parameter Conditions V
CC
A
Typ Guaranteed Limits
V
Minimum High Level Input 2.0V 1.5 1.5 1.5 V
IH
Voltage 4.5V 3.15 3.15 3.15 V
6.0V 4.2 4.2 4.2 V
V
Maximum Low Level Input 2.0V 0.5 0.5 0.5 V
IL
Voltage** 4.5V 1.35 1.35 1.35 V
6.0V 1.8 1.8 1.8 V
V
Minimum High Level Output V
OH
Voltage
e
VIHor V
l
IN
I
OUT
IL
s
20 mA 2.0V 2.0 1.9 1.9 1.9 V
l
4.5V 4.5 4.4 4.4 4.4 V
6.0V 6.0 5.9 5.9 5.9 V
e
V
VIHor V
IN
I
l
OUT
I
l
OUT
l
IN
I
OUT
e
V
Maximum Low Level Output V
OL
Voltage
IL
s
6.0 mA 4.5V 4.2 3.98 3.84 3.7 V
l
s
7.8 mA 6.0V 5.7 5.48 5.34 5.2 V
l
VIHor V
IL
s
20 mA 2.0V 0 0.1 0.1 0.1 V
l
4.5V 0 0.1 0.1 0.1 V
6.0V 0 0.1 0.1 0.1 V
e
V
VIHor V
IN
I
l
OUT
I
l
OUT
I
IN
I
OZ
I
CC
Maximum Input Current V
Maximum TRI-STATE Output V
Leakage Current G
Maximum Quiescent Supply V
Current I
Note 1: Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package:
Note 4: For a power supply of 5V
with this supply. Worst case V
) occur for CMOS at the higher voltage and so the 6.0V values should be used.
I
OZ
**V
limits are currently tested at 20% of VCC. The above VILspecification (30% of VCC) will be implemented no later than Q1, CY’89.
IL
g
10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing
and VILoccur at V
IH
IN
OUT
e
IN
OUT
CC
e
e
e
IL
s
6.0 mA 4.5V 0.2 0.26 0.33 0.4 V
l
s
7.8 mA 6.0V 0.2 0.26 0.33 0.4 V
l
VCCor GND 6.0V
e
VCCor GND 6.0V
V
IH
g
0.1
g
0.5
VCCor GND 6.0V 8.0 80 160 mA
e
0 mA
b
12 mW/§C from 65§Cto85§C; ceramic ‘‘J’’ package:b12 mW/§C from 100§Cto125§C.
5.5V and 4.5V respectively. (The VIHvalue at 5.5V is 3.85V.) The worst case leakage current (IIN,ICC, and
74HC 54HC
eb
T
40 to 85§CT
A
g
1.0
g
5.0
Min Max Units
CC
b
b
40
55
eb
A
a
85
a
125
55 to 125§C
g
1.0 mA
g
10 mA
V
§
§
Units
C
C
2
AC Electrical Characteristics MM54HC365/MM74HC365
e
e
e
5V, T
V
CC
A
25§C, t
Symbol Parameter Conditions Typ
t
PHL,tPLH
t
PZH,tPZL
t
PHZ,tPLZ
Maximum Propagation C
Delay
Maximum Output Enable R
Time C
Maximum Output Disable R
Time C
e
t
6ns
r
f
Guaranteed
e
45 pF 15 22 ns
L
e
1kX 29 40 ns
L
e
45 pF
L
e
1kX 25 36 ns
L
e
5pF
L
AC Electrical Characteristics MM54HC365/MM74HC365
e
V
2.0–6.0V, C
CC
Symbol Parameter Conditions V
t
PHL,tPLH
t
PZH,tPZL
t
PHZ,tPLZ
t
THL,tTLH
C
PD
C
IN
C
OUT
Note 5: CPDdetermines the no load dynamic power consumption, P
e
L
50 pF, t
e
e
t
6 ns (unless otherwise specified)
r
f
CC
e
T
25§C
A
Typ Guaranteed Limits
Maximum Propagation C
Delay C
Maximum Output Enable R
Time C
Maximum Output Disable R
Time C
Maximum Output Rise C
and Fall Time 4.5V 7 12 15 18 ns
Power Dissipation Any Enabled 45 pF
Capacitance (Note 5) A Input
Maximum Input 5 10 10 10 pF
Capacitance
Maximum Output 10 20 20 20 pF
Capacitance
e
50 pF 2.0V 35 105 130 150 ns
L
e
150 pF 2.0V 45 135 168 205 ns
L
e
50 pF 4.5V 14 24 30 36 ns
C
L
e
150 pF 4.5V 17 29 36 45 ns
C
L
e
50 pF 6.0V 11 19 24 28 ns
C
L
e
C
150 pF 6.0V 15 24 30 36 ns
L
e
1kX
L
e
50 pF 2.0V 90 230 287 345 ns
L
e
C
150 pF 2.0V 98 245 306 367 ns
L
e
50 pF 4.5V 31 44 55 66 ns
C
L
e
150 pF 4.5V 38 53 66 80 ns
C
L
e
50 pF 6.0V 25 35 43 52 ns
C
L
e
150 pF 6.0V 29 41 51 62 ns
C
L
e
1kX 2.0V 58 175 218 260 ns
L
e
50 pF 4.5V 26 44 55 66 ns
L
e
50 pF 2.0V 25 60 75 90 ns
L
6.0V 22 37 46 55 ns
6.0V 6 10 13 15 ns
Any Disabled 8 pF
A Input
2
e
CPDV
D
faICCVCC, and the no load dynamic current consumption, I
CC
Limit
Units
74HC 54HC
eb
T
40 to 85§CT
A
eb
A
55 to 125§C
e
CPDVCCfaICC.
S
Units
Truth Table
’HC365
Inputs Output
G1 G2 AY
HXX Z
XHX Z
LLH H
LLL L
3