This Quad 2-to-1 line data selector/multiplexer utilizes advanced silicon-gate CMOS technology. Along with the high
noise immunity and low power dissipation of standard
CMOS integrated circuits, these possess the ability to drive
LS-TT loads. The large output drive capability with the
TRI-STATE feature make this device ideal for interfacing
with bus lines in a bus organized system. When the Output
Control line is taken high, the outputs of all four multiplexers
are sent into a high impedance state. When the Output Control line is low, A
54HC/74HC logic family is speed, function, and pin-out
compatible with the standard 54LS/74LS logic family.
or B data is selected for the HC258. The
Multiplexer (Inverted Output)
É
All inputs are protected from damage due to static discharge by internal diode clamps to V
Features
Y
Typical propagation delays: 16 ns
Y
Wide power supply range: 2V –6V
Y
Low quiescent supply current: 80 mA maximum
(74HC Series)
Y
TRI-STATE outputs for connection to system buses
Y
Added circuitry allows data input levels to float during
TRI-STATE with no additional power consumption
high level, Lelow level, Xeirrelevant, Zehigh impedance, (off)
Logic Diagram
TL/F/9392– 1
TL/F/9392– 2
TRI-STATEÉis a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor CorporationRRD-B30M115/Printed in U. S. A.
TL/F/9392
Page 2
Absolute Maximum Ratings (Notes1&2)
Operating Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
)
b
0.5 toa7.0V
b
1.5 to V
b
CC
0.5 to V
CC
b
65§Ctoa150§C
a
a
g
g
g
1.5V
0.5V
20 mA
35 mA
70 mA
Supply Voltage (V
CC
)
DC Input Voltage (VIN)
DC Output Voltage (V
OUT
)
Clamp Diode Current (IIK,IOK)
DC Output Current, per pin (I
OUT
)
DC VCCor GND Current, per pin (ICC)
Storage Temperature Range (T
STG
Supply Voltage (V
)26V
CC
DC Input or Output Voltage0V
(V
IN,VOUT
)
Operating Temp. Range (TA)
MM74HC
MM54HC
Input Rise or Fall Times
e
V
2.0V(tr,tf)1000ns
CC
e
V
4.5V500ns
CC
e
V
6.0V400ns
CC
Power Dissipation (PD)
(Note 3)600 mW
S.O. Package only500 mW
Lead Temp. (T
) (Soldering, 10 sec.)260§C
L
DC Electrical Characteristics (Note 4)
SymbolParameterConditionsV
CC
A
e
T
25§C
TypGuaranteed Limits
V
Minimum High Level2.0V1.51.51.5V
IH
Input Voltage4.5V3.153.153.15V
6.0V4.24.24.2V
V
Maximum Low Level2.0V0.50.50.5V
IL
Input Voltage**4.5V1.351.351.35V
6.0V1.81.81.8V
V
Minimum High LevelV
OH
Output Voltage
e
VIHor V
l
IN
I
OUT
IL
s
20 mA2.0V2.01.91.91.9V
l
4.5V4.54.44.44.4V
6.0V6.05.95.95.9V
e
V
VIHor V
IN
I
l
OUT
I
l
OUT
l
IN
I
OUT
e
V
Maximum Low LevelV
OL
Output Voltage
IL
s
6.0 mA4.5V4.23.983.843.7V
l
s
7.8 mA6.0V5.75.485.345.2V
l
VIHor V
IL
s
20 mA2.0V00.10.10.1V
l
4.5V00.10.10.1V
6.0V00.10.10.1V
e
V
VIHor V
IN
I
l
OUT
I
l
OUT
I
IN
I
OZ
I
CC
Maximum InputV
Current
Maximum TRI-STATE V
Output LeakageOCeV
Maximum QuiescentV
Supply CurrentI
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package:
Note 4: For a power supply of 5V
designing with this supply. Worst case V
, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
I
CC
**V
limits are currently tested at 20% of VCC. The above VILspecification (30% of VCC) will be implemented no later than Q1, CY’89.
IL
e
IN
OUT
e
IN
OUT
g
10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when
and VILoccur at V
IH
IL
s
6.0 mA4.5V0.20.260.330.4V
l
s
7.8 mA6.0V0.20.260.330.4V
l
VCCor GND6.0V
e
VCCor GND 6.0V
IH
g
0.1
g
0.5
VCCor GND6.0V8.080160mA
e
0 mA
b
12 mW/§C from 65§Cto85§C; ceramic ‘‘J’’ package:b12 mW/§C from 100§Cto125§C.
e
5.5V and 4.5V respectively. (The VIHvalue at 5.5V is 3.85V.) The worst case leakage current (IIN,
CC
74HC54HC
eb
T
40 to 85§CT
A
g
1.0
g
5.0
MinMaxUnits
V
§
§
Units
b
b
40
55
A
eb
55 to 125§C
g
g
CC
a
85
a
125
1.0mA
10mA
C
C
2
Page 3
AC Electrical Characteristics V
CC
5V, T
e
A
25§C, t
e
e
t
6ns
r
f
e
SymbolParameterConditionsTypUnits
t
PHL,tPLH
t
PHL,tPLH
t
PZH,tPZL
t
PHZ,tPLZ
Maximum PropagationC
Delay, SELECT to any Y Output
Maximum PropagationC
Delay, A or B to any Y Output
Maximum Output EnableR
Time, any Y Output to a Logic LevelC
Maximum Output DisableR
Time, any Y Output to a High Impedance StateC
e
45 pF
L
e
45 pF
L
e
1kX
L
e
45 pF
L
e
1kX
L
e
5pF
L
18ns
16ns
27ns
14ns
AC Electrical Characteristics V
CC
e
SymbolParameterConditions V
t
PHL,tPLH
t
PHL,tPLH
t
PZH,tPZL
t
PHZ,tPLZ
t
THL,tTLH
C
PD
Maximum PropagationC
Delay, SELECT to any
Y Output
Maximum PropagationC
Delay, A or B to any
Y Output
Maximum OutputR
Enable Time,
any Y Output to a Logic Level
Maximum Output DisableR
Time, any Y Output to a HighC
Impedance State6.0V202631ns
Maximum Output RiseC
and Fall Time4.5V8121518ns
Power Dissipation(per mux)
Capacitance (Note 5)Enable44pF
e
50 pF2.0V120150180ns
L
e
C
50 pF4.5V17243036ns
L
e
C
50 pF6.0V202631ns
L
e
50 pF2.0V90115135ns
L
e
C
50 pF4.5V14182327ns
L
e
50 pF6.0V152023ns
C
L
e
1kX
L
e
C
50 pF2.0V160200240ns
L
e
C
50 pF4.5V25324048ns
L
e
C
50 pF6.0V273441ns
L
e
1kX2.0V120150180ns
L
e
50 pF4.5V15243036ns
L
e
50 pF2.0V607590ns
L
Disabled
C
IN
Note 5: CPDdetermines the no load dynamic power consumption, P
Maximum Input
Capacitance
2.0V to 6.0V, C
CC
e
L
e
T
A
50 pF, t
25§C
e
e
t
6 ns (unless otherwise specified)
r
f
74HC54HC
eb
T
40 to 85§CT
A
A
eb
55 to 125§C
TypGuaranteed Limits
6.0V101315ns
5101010pF
2
e
CPDV
D
faICCVCC, and the no load dynamic current consumption, I
CC
e
CPDVCCfaICC.
S
Units
3
Page 4
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM54HC258J or MM74HC258J
NS Package Number J16A
Molded Dual-In-Line Package (N)
Order Number MM74HC258N
NS Package Number N16E
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or2. A critical component is any component of a life
systems which, (a) are intended for surgical implantsupport device or system whose failure to perform can
into the body, or (b) support or sustain life, and whosebe reasonably expected to cause the failure of the life
failure to perform, when properly used in accordancesupport device or system, or to affect its safety or
with instructions for use provided in the labeling, caneffectiveness.
be reasonably expected to result in a significant injury
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CorporationEuropeHong Kong Ltd.Japan Ltd.
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Tel: 1(800) 272-9959Deutsch Tel: (
Fax: 1(800) 737-7018English Tel: (
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.